WO2005002163A3 - Method and apparatus for improving the equalisation of block coded signals - Google Patents

Method and apparatus for improving the equalisation of block coded signals Download PDF

Info

Publication number
WO2005002163A3
WO2005002163A3 PCT/US2004/020360 US2004020360W WO2005002163A3 WO 2005002163 A3 WO2005002163 A3 WO 2005002163A3 US 2004020360 W US2004020360 W US 2004020360W WO 2005002163 A3 WO2005002163 A3 WO 2005002163A3
Authority
WO
WIPO (PCT)
Prior art keywords
decision feedback
block coded
symbol estimates
improved
feedback equalizer
Prior art date
Application number
PCT/US2004/020360
Other languages
French (fr)
Other versions
WO2005002163A2 (en
Inventor
John E Smee
Haitao Zhang
Original Assignee
Qualcomm Inc
John E Smee
Haitao Zhang
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc, John E Smee, Haitao Zhang filed Critical Qualcomm Inc
Priority to CN200480017800.9A priority Critical patent/CN1813453B/en
Priority to MXPA05013707A priority patent/MXPA05013707A/en
Publication of WO2005002163A2 publication Critical patent/WO2005002163A2/en
Publication of WO2005002163A3 publication Critical patent/WO2005002163A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • H04L25/03063—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure using fractionally spaced delay lines or combinations of fractionally and integrally spaced taps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03171—Arrangements involving maximum a posteriori probability [MAP] detection

Abstract

Improved decision directed adaptation and decision feedback equalizers are provided in a block coded digital communication system. The performance of a receiver is significantly improved by allowing the decision feedback equalizer to perform time-tracking and residual frequency offset compensation during the data portion of a frame. This is accomplished by capitalizing on the inherent correlation among the chips of a code word in a block coded digital communication system to identify certain instances where more reliable symbol estimates can be derived from a sliced chip without introduction the delay inherent in decoding. As the more reliable symbol estimates are fed back into the chip slicer, the total efficiency of the decision feedback equalizer is improved and the more reliable symbol estimates can be used to replace older content in the feedback filter to further improve the accuracy of the modified slicer input and further decrease the effects of error propagation by the decision feedback equalizer.
PCT/US2004/020360 2003-06-24 2004-06-23 Method and apparatus for improving the equalisation of block coded signals WO2005002163A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN200480017800.9A CN1813453B (en) 2003-06-24 2004-06-23 Slicer input and feedback filter contents for block coded digital communications
MXPA05013707A MXPA05013707A (en) 2003-06-24 2004-06-23 Method and apparatus for improving the equalisation of block coded signals.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/602,508 2003-06-24
US10/602,508 US7342952B2 (en) 2003-06-24 2003-06-24 Slicer input and feedback filter contents for block coded digital communications

Publications (2)

Publication Number Publication Date
WO2005002163A2 WO2005002163A2 (en) 2005-01-06
WO2005002163A3 true WO2005002163A3 (en) 2005-03-24

Family

ID=33539562

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/020360 WO2005002163A2 (en) 2003-06-24 2004-06-23 Method and apparatus for improving the equalisation of block coded signals

Country Status (4)

Country Link
US (2) US7342952B2 (en)
CN (1) CN1813453B (en)
MX (1) MXPA05013707A (en)
WO (1) WO2005002163A2 (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8761321B2 (en) 2005-04-07 2014-06-24 Iii Holdings 1, Llc Optimal feedback weighting for soft-decision cancellers
US7808937B2 (en) 2005-04-07 2010-10-05 Rambus, Inc. Variable interference cancellation technology for CDMA systems
US7876810B2 (en) * 2005-04-07 2011-01-25 Rambus Inc. Soft weighted interference cancellation for CDMA systems
US8005128B1 (en) 2003-09-23 2011-08-23 Rambus Inc. Methods for estimation and interference cancellation for signal processing
US7715508B2 (en) 2005-11-15 2010-05-11 Tensorcomm, Incorporated Iterative interference cancellation using mixed feedback weights and stabilizing step sizes
US7324590B2 (en) * 2003-05-28 2008-01-29 Qualcomm Incoporated Equalizer with combined CCK encoding-decoding in feedback filtering of decision feedback equalizer
US7463681B2 (en) * 2004-05-13 2008-12-09 Ittiam Systems (P) Ltd. Architecture for feedback loops in decision feedback equalizers
US7457357B2 (en) * 2004-05-13 2008-11-25 Ittiam Systems (P) Ltd. Decision feedback equalizer design with interference removal and reduced error propagation
US7826516B2 (en) 2005-11-15 2010-11-02 Rambus Inc. Iterative interference canceller for wireless multiple-access systems with multiple receive antennas
US7711075B2 (en) 2005-11-15 2010-05-04 Tensorcomm Incorporated Iterative interference cancellation using mixed feedback weights and stabilizing step sizes
US7991088B2 (en) * 2005-11-15 2011-08-02 Tommy Guess Iterative interference cancellation using mixed feedback weights and stabilizing step sizes
US7702048B2 (en) * 2005-11-15 2010-04-20 Tensorcomm, Incorporated Iterative interference cancellation using mixed feedback weights and stabilizing step sizes
US20070110135A1 (en) 2005-11-15 2007-05-17 Tommy Guess Iterative interference cancellation for MIMO-OFDM receivers
US20090296803A1 (en) * 2008-06-03 2009-12-03 Mediatek Inc. Block-based equalizer and method thereof
CN102437978B (en) * 2010-09-29 2015-03-25 中兴通讯股份有限公司 Method and device for balancing digital microwaves
CN103326980B (en) * 2012-03-23 2016-04-20 联芯科技有限公司 OFDM system residual frequency offset tracking and device
US9621445B2 (en) 2015-01-25 2017-04-11 Valens Semiconductor Ltd. Utilizing known data for status signaling
US10256920B2 (en) 2015-01-25 2019-04-09 Valens Semiconductor Ltd. Mode-conversion digital canceller for high bandwidth differential signaling
KR101796650B1 (en) 2015-01-25 2017-11-10 발렌스 세미컨덕터 엘티디. Transceiver and method to recover within less than 1ms from quality degradation
US10171182B2 (en) 2015-01-25 2019-01-01 Valens Semiconductor Ltd. Sending known data to support fast convergence
US9685991B2 (en) 2015-01-25 2017-06-20 Valens Semiconductor Ltd. Reducing transmission rate to support fast convergence
TWI748326B (en) * 2020-01-16 2021-12-01 瑞昱半導體股份有限公司 Signal processing device and signal processing method
US11212143B1 (en) * 2020-06-29 2021-12-28 Huawei Technologies Co., Ltd. Sliding block decision equalizer
US11133963B1 (en) 2020-09-03 2021-09-28 Xilinx, Inc. Dsp cancellation of track-and-hold induced ISI in ADC-based serial links

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000072540A1 (en) * 1999-05-21 2000-11-30 Home Wireless Networks, Inc. Equalization techniques for communication systems using orthogonal signaling
US6426972B1 (en) * 1998-06-19 2002-07-30 Nxtwave Communications Reduced complexity equalizer for multi mode signaling
US20040101068A1 (en) * 2002-11-25 2004-05-27 Tzu-Pai Wang Digital receiver capable of processing modulated signals at various data rates

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5790537A (en) * 1996-05-15 1998-08-04 Mcgill University Interference suppression in DS-CDMA systems
US6012161A (en) * 1997-11-26 2000-01-04 At&T Corp. System and method for joint coding and decision feedback equalization
US6678310B1 (en) * 1998-01-16 2004-01-13 Intersil Americas Inc Wireless local area network spread spectrum transceiver with multipath mitigation
US6603801B1 (en) * 1998-01-16 2003-08-05 Intersil Americas Inc. Spread spectrum transceiver for use in wireless local area network and having multipath mitigation
US6337878B1 (en) * 1999-03-03 2002-01-08 Nxt Wave Communications Adaptive equalizer with decision directed constant modulus algorithm
US6233273B1 (en) * 1999-06-29 2001-05-15 Intersil Americas Inc. Rake receiver with embedded decision feedback equalizer
US6690715B2 (en) * 1999-06-29 2004-02-10 Intersil Americas Inc. Rake receiver with embedded decision feedback equalizer
US6614836B1 (en) * 2000-01-28 2003-09-02 Intersil Americas Inc. Biased-corrected rake receiver for direct sequence spread spectrum waveform
US6661857B1 (en) * 2000-07-10 2003-12-09 Intersil Americas Inc. Rapid estimation of wireless channel impulse response
US6700929B1 (en) * 2000-07-31 2004-03-02 Rf Micro Devices, Inc. Method and apparatus for multipath parameter estimation in spread-spectrum communications systems
US6728324B1 (en) * 2000-07-31 2004-04-27 Rf Micro Devices, Inc. Method and apparatus for multipath signal compensation in spread-spectrum communications systems
US6647077B1 (en) * 2000-07-31 2003-11-11 Rf Micro Devices, Inc. Multipath parameter estimation in spread-spectrum communications systems
US7190710B2 (en) * 2001-06-08 2007-03-13 Broadcom Corporation Successive interference canceling for CMDA
ATE283580T1 (en) * 2001-07-05 2004-12-15 Mitsubishi Electric Inf Tech MULTI-USER DETECTION IN A MC-CDMA TELECOMMUNICATIONS SYSTEM
US7088673B2 (en) * 2001-11-02 2006-08-08 Intel Corporation Dynamically-scalable system and method for multiple user access utilzing multi-bit and multi-code orthogonal multiplexing
US7263119B1 (en) * 2001-11-29 2007-08-28 Marvell International Ltd. Decoding method and apparatus
US7027538B2 (en) * 2002-02-14 2006-04-11 Koninklijke Philips Electronics N.V. Method and system for joint decision feedback equalization and complementary code key decoding using a trellis
US7054396B2 (en) * 2002-08-20 2006-05-30 Rf Micro Devices, Inc. Method and apparatus for multipath signal compensation in spread-spectrum communications systems
US7606293B2 (en) * 2002-10-25 2009-10-20 Gct Semiconductor, Inc. Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
US7206365B2 (en) * 2003-01-24 2007-04-17 Via Technologies Inc Decision sequence generating method and associated receiver with a decision feedback equalizer
US7324590B2 (en) * 2003-05-28 2008-01-29 Qualcomm Incoporated Equalizer with combined CCK encoding-decoding in feedback filtering of decision feedback equalizer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6426972B1 (en) * 1998-06-19 2002-07-30 Nxtwave Communications Reduced complexity equalizer for multi mode signaling
WO2000072540A1 (en) * 1999-05-21 2000-11-30 Home Wireless Networks, Inc. Equalization techniques for communication systems using orthogonal signaling
US20040101068A1 (en) * 2002-11-25 2004-05-27 Tzu-Pai Wang Digital receiver capable of processing modulated signals at various data rates

Also Published As

Publication number Publication date
US20040264552A1 (en) 2004-12-30
CN1813453A (en) 2006-08-02
CN1813453B (en) 2013-12-25
US8290025B2 (en) 2012-10-16
US7342952B2 (en) 2008-03-11
MXPA05013707A (en) 2006-03-13
WO2005002163A2 (en) 2005-01-06
US20080285641A1 (en) 2008-11-20

Similar Documents

Publication Publication Date Title
WO2005002163A3 (en) Method and apparatus for improving the equalisation of block coded signals
WO2002015502A3 (en) Adaptive linear equalisation for walsh-modulated
UA83627C2 (en) Techniques for processing data for a multipath cannel with multiple inputs and multiple outputs (mimo) in mimo communication system (versions), a memory unit, a transmitting unit and a processor of digital sygnals in a mimo system
TW200627823A (en) Wireless communication unit and method of processing a code division multiple access signal
RU2004139116A (en) RECEIVER BETWEEN A CORRECTOR WITH SOLVING FEEDBACK AND A LINEAR CORRECTOR WITH A DIRECT COMMUNICATION
ATE288164T1 (en) TWO-STAGE EQUALIZER FOR TRELLI-CODED SYSTEMS
WO2005101655A8 (en) Advanced digital receiver
AU2001275988A1 (en) Method and apparatus for processing a modulated signal using an equalizer and a rake receiver
FI965244A (en) Compensation for multistage interference using pilot symbols
WO2006071825A3 (en) 16b/10s coding apparatus and method
MXPA03010231A (en) Method and apparatus for processing data in a multiple-input multiple-output (mimo) communication system utilizing channel state information.
US20140325319A1 (en) Statistics adaptive soft decision forward error correction in digital communication
EP1545043A3 (en) Using clock and data recovery phase adjust to set loop delay of a decision feedback equalizer
TW200601756A (en) Apparatus and method for error propagation reduction in a decision feedback equalizer
TW200618468A (en) Linear filter equalizer
ATE464723T1 (en) METHOD FOR REDUCING INTERFERENCE CAUSED BY DELAYED REFLECTION BETWEEN SYMBOLS
TW200711403A (en) Method and apparatus for reducing the processing rate of a chip-level equalizer receiver
TW200711394A (en) Method and apparatus for estimating and correcting baseband frequency error in a receiver
WO2001043384A3 (en) Viterbi slicer for turbo codes
US8369396B2 (en) Communication signal receiver and signal processing method thereof
US9716603B2 (en) Framing scheme for continuous optical transmission systems
WO2002009315A1 (en) Receiving apparatus and receiving method for radio communication
TW200606869A (en) A method and apparatus for creating a substantially DC-controllable code, an encoder including such apparatus and an optical data storage system including such an encoder
ATE545252T1 (en) REUSE OF A TRAINING SEQUENCE BETWEEN FREQUENCY ADJACENT RADIO SIGNALS
TW200623777A (en) Decision feedback equalizer and clock and data recovery circuit for high speed applications

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DPEN Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed from 20040101)
WWE Wipo information: entry into national phase

Ref document number: PA/a/2005/013707

Country of ref document: MX

WWE Wipo information: entry into national phase

Ref document number: 3501/CHENP/2005

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 20048178009

Country of ref document: CN

122 Ep: pct application non-entry in european phase