WO2005015756A1 - 送信装置 - Google Patents
送信装置 Download PDFInfo
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- WO2005015756A1 WO2005015756A1 PCT/JP2004/010680 JP2004010680W WO2005015756A1 WO 2005015756 A1 WO2005015756 A1 WO 2005015756A1 JP 2004010680 W JP2004010680 W JP 2004010680W WO 2005015756 A1 WO2005015756 A1 WO 2005015756A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3282—Acting on the phase and the amplitude of the input signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/002—Transmission systems not characterised by the medium used for transmission characterised by the use of a carrier modulation
- H04B14/008—Polarisation modulation
Definitions
- the present invention relates to a transmission device using polar modulation applied to a wireless communication device.
- FIG. 13 shows a first conventional example of a polar modulation transmitter.
- the polar modulation transmitter is composed of a polar signal generation circuit 1221, an amplitude control circuit 122, a phase modulation signal
- a generating circuit 123 and a non-linear power amplifier 122 In such a polar modulation transmitter, a signal corresponding to the amplitude and phase of a transmission modulation is generated from an input signal by a polar signal generator circuit 201, and an amplitude control circuit is generated based on the generated signal.
- the amplitude signal and the phase modulation signal are generated by the 122 and the phase modulation signal generation circuit 123, respectively.
- the non-linear power amplifier 124 inputs a phase modulation signal while operating in a non-linear saturation mode, and performs amplitude modulation by changing a power supply voltage according to the amplitude signal. By operating the nonlinear power amplifier 124 in the nonlinear saturation mode, the current consumption can be reduced as compared with the case of using the linear power amplifier. It can be extended (for example, see Patent Document 1).
- FIG. 14 is a diagram showing a second conventional example of the polar modulation transmitter.
- the polar modulator transmitter comprises a polar signal generator circuit 1301, a timing adjustment circuit 1302, a amplitude controller circuit 1305, a phase modulation signal generator circuit 1306, and a power amplifier.
- an amplitude signal detection circuit 1308, a phase detection circuit 1309, and a PA calibration table 1310 are further provided.
- the calibration table 1310 to correct the amplitude control circuit 1305 and the phase modulation signal generation circuit 1306, the amplitude-amplitude distortion of the power amplifier 1307 is corrected.
- AM-AM distortion amplitude-phase distortion
- AM-PM distortion amplitude-phase distortion
- the timing adjustment circuit 13 By adjusting the timing of the phase signal, the delay difference in each path of the amplitude signal and the phase signal can be corrected, and the deterioration of transmission quality due to the delay difference can be suppressed (for example, see Patent Document 2).
- transmission quality is represented by ACLR (Adjacent Channel Leakage power Ratio) and EV (Error Vector Magnitude: error vector amplitude (modulation accuracy)).
- FIG. 15 is a diagram showing a third conventional example of a polar modulation transmitter. In this polar modulation transmitter, delay circuits 1412 and 1413 are added to the modulator section 14010.
- FIG. 16 is a diagram showing a fourth conventional example of a polar modulation transmitter.
- the polar modulation transmitter includes phase detection means 1502 and 1503 for detecting the phase of the RF output signal, amplitude detection means 1501 for detecting the amplitude envelope of the RF output signal, and RF output signal. It has synchronization detecting means 1512 for detecting the synchronization between the phase and the amplitude of the signal, and synchronization control means 1513 for controlling the delaying means 1515 based on the detected synchronization. Using these means, the timing of the amplitude signal and the phase signal is adjusted, and the delay difference in each path of the amplitude signal and the phase signal is corrected. Deterioration can be suppressed (for example, see Patent Document 4).
- the first conventional example shown in FIG. 13 cannot correct the delay difference between the amplitude signal and the phase signal in each path because there is no timing adjustment means, and suppresses the deterioration of the transmission quality due to the delay difference. I could't.
- the polar modulation transmitters of the second conventional example shown in FIG. 14 and the third conventional example shown in FIG. 15 do not have a synchronization circuit for automatically synchronizing the amplitude signal and the phase signal. There was no other way to adjust the synchronization than to do it manually. In addition, it was difficult for ordinary consumers to adjust the synchronization for use after the product was shipped.
- the polar modulation transmitter of the fourth conventional example shown in FIG. 16 is configured to detect an amplitude envelope and a phase from an RF output signal of a multiplier or a power amplifier.
- the polar modulation transmitter of the fourth conventional example shown in FIG. 16 is configured to detect an amplitude envelope and a phase from an RF output signal of a multiplier or a power amplifier.
- Patent Document 1 U.S. Patent No. 6,377,784B2
- Patent Document 2 U.S. Patent No. 6,366,177 B1
- Patent Document 3 Japanese Patent Publication No. 6-5 4 8 7 7 (Fig. 6)
- Patent Literature 4 Japanese Patent Application Publication No. 2000-530992 (Patent Document 4)
- the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a transmission device using polar modulation, which is capable of automatically adjusting the synchronization between an amplitude signal and a phase signal.
- a transmission apparatus is a transmission apparatus using polar modulation, comprising: a polar signal generating unit configured to generate, from an input signal, each signal corresponding to the amplitude and phase of a transmission modulation signal; and a signal corresponding to the amplitude.
- An amplitude signal generating means for generating an amplitude signal from the signal; a phase modulation signal generating means for generating a phase modulation signal from a signal corresponding to the phase; and the amplitude signal and the phase modulation signal, the amplitude modulation of the phase modulation signal.
- Amplitude modulation and amplification means for generating a transmission modulation signal, and an amplitude phase for detecting an amplitude signal and a phase signal from an input signal to the amplitude modulation and amplification means and an input signal to the phase modulation signal generation means Detecting means; a signal corresponding to the amplitude generated by the polar signal generating means; a signal corresponding to the phase; and the amplitude signal detected by the amplitude / phase detecting means.
- a delay difference calculating means for calculating a delay difference between the amplitude signal and the phase signal based on the phase signal; and a timing adjustment between the amplitude signal and the phase signal based on the delay difference calculated by the delay difference calculating means. Timing adjusting means.
- the delay difference calculating unit calculates the delay difference based on the signal corresponding to the amplitude and the phase corresponding to the amplitude generated by the polar signal generating unit and the amplitude signal and the phase signal detected by the amplitude / phase detecting unit. Is calculated, and the timing is adjusted based on the obtained delay difference.
- the amplitude and phase detecting means detects, for example, the amplitude signal and the phase signal immediately before the amplitude modulation and amplification means, thereby detecting the delay difference between the amplitude signal and phase signal detection position and the amplitude modulation and amplification means. It can be made smaller than the delay difference required from transmission characteristics such as VM. Further, when the amplitude signal and the phase signal are detected immediately before the amplitude modulation and width means, since the signals are detected from the baseband signal, a circuit having a large delay such as a low-pass filter is detected from the amplitude and phase detection means. Can be eliminated. As a result, it is possible to improve the detection accuracy of the delay difference and the synchronization adjustment accuracy.
- the delay difference calculation unit detects the signal corresponding to the amplitude generated by the polar signal generation unit and the amplitude / phase detection unit. Calculating a correlation function with the amplitude signal, and a correlation function between a signal corresponding to the phase generated by the polar signal generation means and the phase signal detected by the amplitude / phase detection means; Also, the method includes calculating the delay amount of the amplitude signal and the delay amount of the phase signal from the local maximum value of the correlation function relating to the phase and the phase, and calculating the delay difference from the difference between these delay amounts.
- the delay amount of each signal can be calculated based on the maximum value of the correlation function in the amplitude signal and the phase signal.
- the amplitude signal and the phase signal can be calculated. Can be adjusted.
- the amplitude and phase detection means is configured by a digital circuit, and the amplitude signal and the phase signal are input to input units of the amplitude signal and the phase signal. And an analog-to-digital converter for converting the selected amplitude signal or phase signal into a digital signal.
- the analog-to-digital conversion means can be shared for the detection of the amplitude signal and the detection of the phase signal, and the circuit scale and the number of components for the detection of the amplitude signal and the phase signal can be reduced.
- the timing adjustment unit includes a delay unit configured to delay at least one of the amplitude signal and the phase signal, and a delay configured to control a delay amount of the delay unit. And a control means.
- the delay amount of at least one of the amplitude signal and the phase signal can be finely adjusted by the delay control means, and the synchronization adjustment accuracy can be improved.
- the timing adjustment unit is a coarse adjustment unit that performs a coarse adjustment of a delay amount of the amplitude signal and the phase signal, and a fine adjustment of the delay amount is performed. And fine adjustment means for performing the adjustment.
- the delay amount of the amplitude signal and the phase signal can be finely adjusted by the coarse adjustment unit and the fine adjustment unit, and the synchronization adjustment accuracy can be improved.
- the timing adjustment means is configured by a digital circuit, and a delay frequency of the amplitude signal and the phase signal is varied by varying a clock frequency of the digital circuit. Adjusting the amount is also included.
- the delay amount of the amplitude signal and the phase signal can be finely adjusted by changing the peak frequency of the digital circuit, and the synchronization adjustment accuracy can be improved.
- the timing adjustment unit includes, as the delay unit, a plurality of inverters connected in cascade, and a selector that switches and selects an output of the inverter. Is also included.
- the timing adjustment unit includes, as the delay unit, a digital filter that can change a delay time by a control signal.
- the amount of signal delay can be adjusted with a simple configuration.
- the above-described transmission device wherein the amplitude modulation amplification unit includes a power amplifier. Further, as one aspect of the present invention, the above-described transmission device, wherein the amplitude modulation amplification unit includes a variable gain amplifier is also included.
- the above-described transmission device wherein the amplitude modulation amplification unit includes a mixer circuit is also included.
- a synchronization adjustment method is a synchronization adjustment method for an amplitude signal and a phase signal in a transmission apparatus using polar modulation, wherein each signal corresponding to the amplitude and phase of a transmission modulation signal is generated from an input signal. Generating an amplitude signal from the signal corresponding to the amplitude; generating a phase modulation signal from the signal corresponding to the phase; and multiplying the amplitude signal by the phase modulation signal.
- FIG. 1 is a diagram showing a configuration of a polar modulation transmitter according to an embodiment of the present invention.
- Fig. 2 shows an example of transmission characteristics degradation due to the delay difference between the amplitude signal and the phase signal.
- (A) is a diagram showing WCD MA modulation, ACLR characteristics at 5 MHz detuning, and
- (b) is a diagram showing WC DMA.
- FIG. 7 is a diagram illustrating ACLR characteristics in modulation and 10 MHz detuning.
- FIG. 3 shows an example of transmission characteristic degradation due to a delay difference between an amplitude signal and a phase signal, and is a diagram illustrating EVM characteristics in WC DMA modulation.
- FIG. 4 is a diagram showing a specific configuration example of a main part including an amplitude / phase detection circuit in the polar modulation transmitter of the present embodiment.
- FIG. 5 is a diagram showing a specific configuration example of a main part including an amplitude / phase detection circuit in the polar modulation transmitter of the present embodiment.
- FIG. 6 is a flowchart showing a delay difference calculation procedure in the delay difference calculation circuit of the present embodiment.
- FIGS. 7A and 7B are diagrams illustrating an example of an input signal waveform in the delay difference calculation circuit according to the present embodiment.
- FIG. 7A is a diagram illustrating an example of an amplitude signal
- FIG. 7B is a diagram illustrating an example of a phase signal.
- FIG. 8 is a diagram illustrating an example of a correlation function calculated by the delay difference calculation circuit according to the present embodiment, where (a) illustrates an example of an amplitude correlation function, and (b) illustrates a phase correlation function. It is a figure showing an example.
- FIG. 9 is a diagram illustrating a configuration example of the timing adjustment circuit of the present embodiment.
- FIG. 10 is a diagram illustrating a first example of the variable delay circuit in the timing adjustment circuit according to the present embodiment.
- FIG. 11 is a diagram illustrating a second example of the variable delay circuit in the timing adjustment circuit of the present embodiment.
- FIG. 12 is a diagram illustrating a third example of the variable delay circuit in the timing adjustment circuit according to the present embodiment.
- FIG. 13 is a diagram showing a first conventional example of a polar modulation transmitter.
- FIG. 14 is a diagram showing a second conventional example of a polar modulation transmitter.
- FIG. 15 is a diagram showing a third conventional example of a polar modulation transmitter.
- FIG. 16 is a diagram showing a fourth conventional example of a polar modulation transmitter.
- reference numeral 101 denotes a polar signal generating circuit
- 102 denotes a timing adjustment circuit
- 103 denotes an amplitude control circuit
- 104 and 105 denote low-pass filters
- 106 denotes a phase modulation signal generating circuit.
- 107 is a multiplication circuit
- 109 is an amplitude / phase detection circuit
- 110 is a delay difference calculation circuit
- 31 1, 3 1 2 41 2 is a / 0 converter
- 31 3 is a DZA converter
- 4 11 is a switching switch
- 8 0 1 and 8 0 2 are variable delay circuits
- 8 0 3 is a control circuit.
- FIG. 1 is a diagram showing a configuration of a polar modulation transmitter according to an embodiment of the present invention.
- the polar modulation transmitter of this embodiment includes a polar signal generation circuit 101, a timing adjustment circuit 102, an amplitude control circuit 103, a low-pass filter (LPF) 104, 105, phase modulation It comprises a signal generation circuit 106, a multiplication circuit 107, a transmission antenna 108, an amplitude / phase detection circuit 109, and a delay difference calculation circuit 110.
- the polar signal generating circuit 101 corresponds to an example of the polar signal generating means, and the signal corresponding to the amplitude and phase of the transmission modulated wave from the input signal.
- the amplitude control circuit 103 corresponds to an example of an amplitude signal generation unit, and generates an amplitude signal by adjusting the level of a signal corresponding to the amplitude.
- the phase modulation signal generation circuit 106 corresponds to an example of a phase modulation signal generation means, and is composed of, for example, a power VCO, and generates a phase modulation wave (phase modulation signal) from a signal corresponding to a phase.
- the multiplication circuit 107 corresponds to an example of an amplitude modulation amplifying means, and multiplies an amplitude signal by a phase modulation wave to generate a transmission modulation wave (transmission modulation signal) by amplitude modulating the phase modulation wave. I do.
- the modulated transmission wave is radiated from the antenna 108 as a radio wave.
- the multiplication circuit 107 has a function of an amplitude modulation amplification unit that generates a transmission modulation wave by amplitude-modulating a phase modulation wave, and is configured using, for example, a power amplifier operating in a saturation mode. A similar function can be obtained even if a variable gain amplifier or a mixer circuit is used as the multiplication circuit 107.
- the low-pass filters 104 and 105 included in the polar modulation transmitter are not indispensable components in the present embodiment, but each of the amplitude signal corresponding to the amplitude and the phase signal by the phase modulation wave To explain the delay and its synchronization, It is.
- the positions of the low-pass filters 104 and 105 are connected to, for example, the output of a D / A converter for the purpose of cutting off harmonics.
- low-pass filters cause signal delay.
- the cut-off frequency is f (In that case, a delay of 1 to 2 verts fc occurs in the low-frequency region.
- a higher-order one-pass filter If the signal delay and other signal delays occur, the operation does not change. If such a signal delay occurs in the path of the amplitude signal and the path of the phase signal, and there is a difference ⁇ between the respective delays, The characteristics of ACLR, EVM, etc. in the polar modulation transmitter deteriorate, etc.
- Figures 2 and 3 show an example of the deterioration of transmission characteristics due to the delay difference ⁇ , as shown in Figures 2 (a) and (b). Shows ACLR characteristics at 5 MHz and 10 MHz detuning of WC DMA, and Fig. 3 shows EVM characteristics.
- the amplitude / phase detection circuit 109 and the delay difference calculation circuit 110 are provided to prevent deterioration of characteristics due to the delay of each signal of amplitude and phase, and the amplitude / phase detection circuit 109 is provided for the amplitude / phase detection means.
- This corresponds to an example, and detects an amplitude signal and a phase signal from the input of the multiplication circuit 107 and the input of the phase modulation signal generation circuit 106.
- the delay difference calculation circuit 110 corresponds to an example of a delay difference calculation means, and calculates the delay difference of each signal based on the amplitude and phase signals detected by the amplitude / phase detection circuit 109. calculate.
- the timing adjustment circuit 102 is equivalent to an example of timing adjustment means. By performing timing adjustment based on each delay difference, the amplitude signal and the phase signal are automatically synchronized. I have.
- each of the amplitude signal and the phase signal (phase modulated wave) by the amplitude / phase detection circuit 109 is preferably performed immediately before the multiplication circuit 107 as shown in FIG.
- the delay difference between the detection position of each signal of the amplitude signal and the phase signal and the multiplication circuit 107 can be made smaller than a value required from characteristics such as ACLR or EVM.
- a circuit with a large delay such as a filter can be eliminated from the amplitude / phase detection circuit i09.
- the accuracy of delay difference detection can be improved as compared with the related art.
- 4 and 5 are diagrams illustrating a specific configuration example of a main part of the polar modulation transmitter.
- the digital circuit 310 in FIG. 4 and the digital circuit 410 in FIG. 5 have the functions of an amplitude / phase detection circuit 109, a delay difference calculation circuit 110, and a timing adjustment circuit 102, respectively. It is.
- the amplitude / phase detection circuit 109 detects a phase signal and an amplitude signal which are amplitude-modulated by the multiplication circuit 107. At this time, the amplitude phase detection circuit 109 detects the amplitude signal from the output of the low-pass filter 104, and detects the phase signal from the input of the phase modulation signal generation circuit 106 composed of the power VCO.
- the power VCO is used as the phase modulation signal generation circuit 106. The power is not limited to this.
- a / D converters 311, 312, 0/8 converters 313, 314 are connected to digital circuit 310.
- the amplitude signal output from the low-pass filter 104 is converted into a digital signal by the AZD converter 311 and input, and output from the low-pass filter 105 and input to the phase modulation signal generation circuit 106.
- the converted phase signal is converted to a digital signal by the A / D converter 312 and input.
- the amplitude signal output from the digital circuit 310 is converted to an analog signal by the DZA converter 313, input to the low-pass filter 104, and the phase signal output from the digital circuit 310 is converted to the DZA signal.
- the signal is converted into an analog signal by the converter 314 and input to the low-pass filter 105.
- the detection position of the amplitude / phase detection circuit 109 that is, before the phase modulation signal generation unit by the phase modulation signal generation circuit 106 and the amplitude modulation unit by the multiplication circuit 107
- Both the amplitude signal and the phase signal before the signal are baseband signals, so they can be directly sent to the AZD converters 311 and 312 without demodulating these signals or using a Log amplifier. It can be captured, converted into a digital signal, and input to a digital circuit 310 for processing.
- the amplitude signal and the amplitude By detecting the phase signals from the outputs of the low-pass filters 104 and 105, respectively, it is possible to reduce the delay difference between the two signals in the signal path to the multiplication circuit 107.
- an A / D converter 412, D / A converters 313 and 314 are connected to a digital circuit 410, and a switching switch 411 is provided at the input of the A / D converter 412. I have.
- one of the amplitude signal output from the low-pass filter 104 and the phase signal output from the low-pass filter 105 and input to the phase modulation signal generation circuit 106 is selected by the switch 411, and the A / D conversion is performed.
- the signal is converted into a digital signal by the device 412 and input.
- the first example in Fig. 4 is a configuration that uses separate A / D converters for the amplitude signal and the phase signal, but the second example in Fig. 5 uses one A / D converter.
- the switch is switched between switches for amplitude signals and phase signals, and the same function can be realized.
- the amplitude signal and the phase signal are switched by the switch 411, alternately converted into digital signals by the AZD converter 412, input to the digital circuit 410, and processed.
- the delay difference calculation circuit 110 may be configured to be realized by an analog circuit
- the amplitude / phase detection circuit 109 may be configured by an analog circuit without providing an A / D converter.
- the delay difference calculation circuit 110 is composed of, for example, a digital circuit, and has a function of calculating a correlation function before and after the delay of the amplitude signal and the phase signal, respectively, and detecting each local maximum value.
- the delay difference calculation circuit 110 can be configured by an analog circuit.
- FIGS. 6A and 6B are flowcharts showing a procedure for calculating a delay difference in the delay difference calculation circuit 110.
- FIGS. 7A and 7B are diagrams showing examples of input signal waveforms.
- the input signal waveform is a time waveform a of the amplitude signal and the phase signal as shown in FIGS. 7A and 7B generated by the polar signal generation circuit 101 in FIG. ut (t), and Pout (t), assumed to be the time waveform a in the amplitude signal and phase signal including a delay detected by the amplitude-phase detection circuit 109 (t) ⁇ beauty p in (t) (step S 501-S 504).
- a WC DMA modulated wave is used for a signal waveform.
- FIGS. 7 and 8 an example using a WC DMA modulated wave has been described. However, the same applies to a modulated wave of another method. The same applies to the case where a special waveform for synchronization is used.
- FIG. 9 is a diagram illustrating a configuration example of a timing adjustment circuit.
- the timing adjustment circuit 102 includes first and second variable delay circuits 8 0 1 and 8 0 2 that can change the delay time, and these first and second variable delay circuits 8 0 1 , And a control circuit 803 for controlling the delay time of 802.
- the control circuit 803 refers to the newly calculated delay difference, and controls a delay control signal for adjusting the delay time of the first variable delay circuit 801. And a delay control signal for adjusting the delay time of the second variable delay circuit 802.
- the amplitude signal is input to the first variable delay circuit 801 and outputs an amplitude signal delayed according to the delay control signal.
- the phase signal is input to the second variable delay circuit 802, and outputs a delayed phase signal.
- the configuration is such that both the amplitude signal and the phase signal are delayed.
- the configuration may be such that only one of the amplitude signal and the phase signal is delayed, and the same function can be realized.
- FIG. 10 is a diagram showing a first example of the variable delay circuit.
- the variable delay circuit of the first example includes a cascade-connected inverter (inverting circuit) 911 to 916 and a selector 920 for selecting the output of these inverters 911 to 916. It is configured to have.
- the delay time can be controlled by the inverter delay time by switching the selector 920 with the delay control signal as a control signal to change the number of inverters included in the signal path.
- FIG. 11 is a diagram showing a second example of the variable delay circuit.
- the variable delay circuit of the second example is an example configured by a digital filter, and includes multipliers 100 2 and 100 3 controlled by a delay control signal that is a control signal, and one of the multipliers. It has a delay element 1001 that delays the input of 1002, and an adder 1004 that adds the outputs of the multipliers 1002 and 1003.
- the digital filter is not limited to the digital filter having the present configuration, and for example, the variable delay circuit can be formed of another digital filter having a larger number of taps.
- FIG. 12 is a diagram showing a third example of the variable delay circuit.
- the variable delay circuit of the third example is composed of a delay element 1101 that can control the delay time, a digital filter 111 Are connected in series.
- the delay time of the delay element 111 and the digital filter 112 is controlled by a delay control signal, which is a control signal, so that the delay time can be controlled by a combination of coarse adjustment and fine adjustment.
- the delay time can be adjusted precisely.
- Such delay time adjustment means corresponds to coarse adjustment.
- the configuration using the inverter of the first example shown in FIG. 10 and the configuration using the digital filter of the second example shown in FIG. 11 correspond to fine adjustment.
- the timing adjustment circuit 102, the amplitude / phase detection circuit 1109, and the delay difference calculation circuit 110 are used as a synchronization circuit for the amplitude signal and the phase signal of the polar modulation transmitter.
- the delay difference calculation circuit 110 based on the amplitude and phase signals generated by the polar signal generation circuit 101 and the amplitude and phase signals detected by the amplitude / phase detection circuit 109
- the synchronization difference can be automatically adjusted by adjusting the delay difference between the amplitude signal and the phase signal. It becomes possible. For example, in an adjustment process in a factory production line, synchronization adjustment can be automatically performed by supplying a control signal for synchronizing the amplitude signal and the phase signal to the assembled polar modulation transmitter. This makes it possible to save labor in the adjustment process.
- the synchronization of the amplitude signal and the phase signal can be automatically adjusted periodically. For example, by setting to automatically adjust each time the power is turned on, even if the delay difference between the amplitude and the phase changes due to aging, the deterioration of 1 ⁇ 1 ⁇ and ⁇ £ ⁇ ⁇ 1 is suppressed. Can be. As a result, a polar modulation transmitter that operates stably can be realized.
- the branch position of the signal input to the amplitude / phase detection circuit 109 is set immediately before the multiplication circuit 107.
- the detection position of each signal and the multiplication circuit 10 7 can be made smaller than the value required for characteristics such as ACLR or EVM, and the amplitude signal and phase signal can be detected from the baseband signal. Therefore, a circuit with a large delay, such as a low-pass filter, can be excluded from the amplitude / phase detection circuit 109.
- the accuracy of the delay difference detection is improved as compared with the related art, and the synchronization adjustment accuracy can be improved.
- the present invention has an effect of providing a transmission device capable of automatically adjusting synchronization of an amplitude signal and a phase signal, and is useful for a transmission device using polar modulation applied to a wireless communication device. It is.
Abstract
Description
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US10/566,999 US7379715B2 (en) | 2003-08-07 | 2004-07-21 | Transmitter apparatus and method using polar modulation with signal timing adjustment |
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JP2003288964A JP3844352B2 (ja) | 2003-08-07 | 2003-08-07 | 送信装置 |
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Also Published As
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JP3844352B2 (ja) | 2006-11-08 |
US7379715B2 (en) | 2008-05-27 |
US20060246856A1 (en) | 2006-11-02 |
JP2005057665A (ja) | 2005-03-03 |
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