WO2005039261A2 - Solder structures for out of plane connections and related methods - Google Patents
Solder structures for out of plane connections and related methods Download PDFInfo
- Publication number
- WO2005039261A2 WO2005039261A2 PCT/US2004/033946 US2004033946W WO2005039261A2 WO 2005039261 A2 WO2005039261 A2 WO 2005039261A2 US 2004033946 W US2004033946 W US 2004033946W WO 2005039261 A2 WO2005039261 A2 WO 2005039261A2
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- WIPO (PCT)
- Prior art keywords
- solder
- edge
- pad
- substrate
- die
- Prior art date
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to the field of electronics, and more particularly, to structures for bonding electronic substrates and related methods.
- the integrated circuit chips are generally mounted parallel to and facing the printed circuit board such that faces of the integrated circuit chips are adjacent a face of the circuit board.
- This packaging technology allows a large number of input/output connections between the integrated circuit chips and the printed circuit board, especially when solder bump technology is used over the entire face of the integrated circuit chips.
- this technology may limit a packaging density, because the large faces of the integrated circuit chips are mounted adjacent the face of the printed circuit board.
- three-dimensional packaging has been proposed, wherein the chips are mounted orthogonal to the circuit board so that edges of the chips are adjacent the face of the circuit board.
- solder may take the shape of a hemisphere or partial hemisphere on a contact pad.
- it may be difficult to cause the solder on one contact pad to extend onto another contact pad, in a three-dimensional package.
- solder Even if solder is placed on a pair of adjacent contact pads in a three-dimensional package, it may be difficult to cause the reflowed solder to join up, rather than forming individual solder bumps.
- Solder interconnections are also discussed in U.S. Patent Nos. 5,793,116; 6,418,033; and 6,392,163. Each of these patents are assigned to the assignee of the present invention, and the disclosures of each of these patents are hereby incorporated herein in their entirety by reference.
- a solder structure may include a substrate and a solder wettable pad on the substrate adjacent an edge of the substrate.
- the solder wettable pad may have a length parallel to the edge of the substrate and a width perpendicular to the edge of the substrate wherein the length parallel to the edge of the substrate is greater than the width perpendicular to the edge of the substrate.
- a solder bump on the solder wettable pad may extend laterally from the solder wettable pad at least to within about 10 microns of the edge of the substrate. According to some embodiments, the solder bump may extend laterally from the solder wettable pad to and/or beyond the edge of the substrate.
- a method of forming a solder structure may include providing a wafer including a plurality of die therein, and forming a solder wettable pad on one of the die adjacent an edge of the die.
- the solder wettable pad may have a length parallel to the edge of the die and a width perpendicular to the edge of the die wherein the length parallel to the edge of the die is greater than the width perpendicular to the edge of the die.
- a solder bump may be formed on the solder wettable pad, and the die may be separated from the wafer along the edge of the die after plating the solder bump on the solder wettable pad.
- a method of forming a solder structure may include providing a wafer including a plurality of die therein, and forming a solder wettable pad on one of the die adjacent an edge of the die.
- a solder bump may be formed on the solder wettable pad such that the solder bump is maintained within the edge of the die, and the die may be separated from the wafer along the edge of the die after forming the solder bump on the solder wettable pad. After separating the die from the wafer, the solder bump on the solder wettable pad may be subjected to reflow so that the solder bump extends laterally from the solder wettable pad to at least within about 10 microns of the edge of the die. According to some embodiments, the solder bump may extend to and/or beyond the edge of the die.
- a method of forming a solder structure may include forming a solder wettable pad on a substrate adjacent an edge of the substrate.
- the solder wettable pad may have a length parallel to the edge of the substrate and a width perpendicular to the edge of the substrate wherein the length parallel to the edge of the substrate is greater than the width perpendicular to the edge of the substrate.
- a solder bump may be formed on the solder wettable pad wherein the solder bump extends laterally from the solder wettable pad to at least within about 10 microns of the edge of the substrate. According to some embodiments, the solder bump may extend to and/or beyond the edge of the substrate.
- Figure 1 is a diagram illustrating surface curvature at a point on an air-liquid interface according to embodiment of the present invention.
- Figures 2A-I are cross-sectional and corresponding top views of bump structures according to embodiments of the present invention.
- Figures 3-9, 11, and 12 are views of solder structures according to embodiments of the present invention.
- Figure 10 is a graph illustrating internal pressure of a solder structure as a function of length of principal radii according to embodiments of the present invention.
- Figures 13A-C are plan views illustrating steps of forming solder structures according to embodiments of the present invention.
- first and second are used herein to describe various regions, layers and/or sections, these regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one region, layer or section from another region, layer or section. Thus, a first region, layer or section discussed below could be termed a second region, layer or section, and similarly, a second region, layer or section could be termed a first region, layer or section without departing from the teachings of the present invention. Like numbers refer to like elements throughout. [0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
- reservoir and pad geometries may provide bump overhang and increase a range of applications, and in particular applications with relatively fine pitch.
- the curvature of S at P can be represented by two orthogonal arcs or principal radii Rl and R2, as shown in Figure 1.
- solder bumps may be placed (such as by plating) adjacent the edge of a die or substrate in a wafer, and the wafer including the die or substrate may be diced or sawed to singulate the die or substrate.
- a die may include a plurality of integrated circuits (such as transistors, resistors, capacitors, diodes, inductors, etc.) therein and a wafer may include a plurality of such die.
- the solder bumps on the die can then be melted (after singulating the die) to form solder bump structures extending beyond the edge of the die or substrate, and to cause the solder bump structures to touch and wet to pads on a mating substrate oriented at an angle to the edge of the die or substrate.
- the mating substrate for example, may be another integrated circuit device and or a printed circuit board.
- an overhang of solder may be increased to accommodate uncertainty in the width of a dicing kerf after dicing.
- solder bumps on a die may be reduced to increase the number of interconnections along the edge of the die or substrate.
- a formation of extraneous solder structures due to inherent instabilities and/or perturbations of the manufacturing processes may also be reduced.
- the solder bump 21 may be formed using a sequence including solder plating through a mask, followed by dicing, followed by solder reflow. Because the solder reflow follows dicing, interference of the plated solder deposit with the dicing blade can be reduced, yet the solder may overhang the edge of the die (separated by dicing) after reflow. To deposit enough solder to create the super- hemisphere, the plating template photoresist and the plated solder deposit may need to be very thick. The thick photoresist and plating may result in significant cost, throughput, yield, and pitch constraints.
- a super-hemispheric bump is illustrated in Figure 3.
- solder bump 21 may be formed, for example, using evaporation, jetting, and/or paste.
- a plurality of solder bumps 21 may be plated on respective bump pads 23 along an edge of an integrated circuit die before dicing the die from a wafer including a plurality of die.
- the originally plated solder may be substantially cylindrical (before reflow) so that the plated solder does not extend significantly beyond the respective bump pad 23 before reflow. Accordingly, the die can be singulated before reflow without significantly interfering with the plated solder bump.
- the solder bump 21 can be subjected to reflow so that the reflowed solder bump 21 extends beyond the bump pad 23 by an overhang distance D.
- the overhang distance D is greater than a distance between the edge of bump pad 23 after reflow, the bump may contact a pad on another substrate at the edge of the die having the solder bump 23 thereon.
- the solder bump 31 is directionally offset from the pad 33 to increase the overhang D. This offset may be possible if the solder can wet the side of the pad, which means the pad must have significant thickness and must be selectively wettable on one side.
- a reservoir of solder is provided in the form of a narrow elongated region 41 connected to the bump pad 43. Differential pressure in the molten solder 45 may cause the solder in the reservoir to flow to the bump pad during reflow. A thickness requirement for the plated solder may thus be reduced, and/or an overhang distance D may be increased. Accordingly, cost may be reduced, and throughput may be increased. Solder reservoirs are discussed in greater detail in U.S. Patent No.
- Figure 2D is a more realistic representation of the structure of Figure 2C.
- the tendency of liquid solder to reduce surface energy by increasing the radii of curvature may result in a pronounced meniscus 51 (neck) at the transition from the reservoir 53 to the bump pad 55 (see Figure 6).
- This may have two effects.
- First, a relatively large volume of solder may be trapped in the meniscus 51.
- Second, a radius of curvature of the bump 57 may increase along the diameter aligned to the point of connection between reservoir and pad. The first effect may negate some of the advantage of the reservoir and the second may reduce the overhang by increasing the effective diameter of the wetted pad.
- Figure 4 shows a plan view of plated solder on a circular bump pad and on a rectangular reservoir prior to reflow.
- Figures 5 and 6 show respective top and plan views of the solder of Figure 4 after being subjected to reflow.
- the structures of Figures 5 and 6 correspond to those of Figures 2D.
- Figure 2E attempts to increase the overhang D of solder bump 61 from pad 65 by simply increasing the volume may net little gain because the meniscus 63 on reservoir 67 may grow larger and the effective wetted diameter may increase.
- increasing a solder volume may increase the size of meniscus 63 so that the overhand D does not increase significantly.
- a size of the meniscus 71 can be reduced by changing the pressure differential, by either increasing the diameter of pad 73 or reducing the width of reservoir 75, as shown in Figure 2F.
- Increasing the diameter of pad 73 may affect the pitch and the volume of solder needed to achieve a given overhang D of solder bump 77. Decreasing the width of reservoir 75 may decrease the volume of the reservoir. Both effects may be counter to the goal.
- Increasing the pad diameter to reduce internal pressure and reducing pad diameter to increase overhang can be decoupled, as seen in the Laplace- Young equation. Recognition that the two principal radii are different allows the oval design of Figure 2G.
- the radius of pad 81 parallel to the edge of the die can be relatively large so the internal pressure is lower and the meniscus 87 (neck) is smaller.
- the radius of pad 81 perpendicular to the die edge can be relatively narrow to increase the solder bump 85 overhang. Stated in other words, the pad 81 may have a length L parallel to the die edge that is greater than a width W perpendicular to the die edge.
- a geometry that exhibits different principal radii is the truncated circle or 'D' shaped pad shown in Figures 8 and 9. [0036] Further improvement can be seen in Figure 2H where the point of connection between the reservoirs 91 and the pad 93 has been moved to the sides of the pad 93. Two reservoirs 91 may be used to retain symmetry.
- the reservoirs 91 may not significantly increase the diameter/width W of pad 93 (perpendicular to the die edge) so the overhang of solder bump 95 can be improved.
- the liquid will not form a sharp angle, squaring the corners of pad 101 along the die edge as shown in Figure 21, may pull the solder 103 toward the pad edge, thus improving overhang D further.
- Reservoirs 105 may be provided at ends of the pad 101.
- tributary mouths may be provided. i. Mouths of tributaries (where branches meet the main reservoir) may create localized regions of low pressure because both principal radii may be relatively large. The intersection may be kept narrow enough that the low pressure does not create a large upwelling that can become super-hemispheric resulting in a runaway situation. Both the tributary and the main reservoir may thus be narrowed by at least 20% at the mouth of tributaries. d. Spacing may heed a flow progression.
- a flared narrowing in the reservoir may create a sluice that can slow a rate of fluid flow.
- a build-up of liquid at bends, tributary mouths, and other locations may thus be reduced and/or prevented.
- Pad Design a. Reservoir to pad edge angle may be acute to reduce any meniscus.
- Narrow dimension may be greater than the widest reservoir narrow dimension i. More particularly, a narrow pad dimension may be > 10% larger than a widest reservoir narrow dimension.
- Figure 11 illustrates representative structures according to embodiments of the present invention. Here, a structure 55 ⁇ m (micron) wide, 225 ⁇ m (micron) long, and 20 ⁇ m (micron) thick may result in an overhang of 21 ⁇ m (micron).
- a solder bump 1101 on a first substrate 1103 may overhang an edge of the substrate 1103 for bonding with a pad of a second substrate 1107 (such as a printed circuit board, another integrated circuit die, etc.).
- Reservoirs 1109a-b may be coupled with opposite ends of the solder bump 1101, and the reservoirs may have one or more bends therein to reduce an amount of substrate space consumed.
- one or both of the reservoirs may include a plurality of branches.
- the reservoir 1109a may include branches 1109a' and 1109a"
- the reservoir 1109b may included branches 1109b' and 1109b".
- one or more reservoirs and/or branches may include a flared sluice.
- solder may be plated to a uniform thickness in the reservoir and bump regions so that the plated solder in the bump region does not interfere when dicing the substrate from a wafer including the substrate.
- the plated solder can be heated above its melting temperature so that solder flows from the reservoirs and branches thereof (1109a, 1109a', 1109a", 1109b, 1109b', and 1109b") to the bump 1101. Accordingly, the solder bump 1101 can expand laterally beyond the edge of the substrate 1103 for bonding with substrate 1107.
- Structures according to additional embodiments of the invention are shown in Figure 12.
- a solder bump 1201 on a first substrate 1203 may overhang an edge of the substrate 1203 (such as an integrated circuit die) for bonding with a pad 1205 of a second substrate 1207 (such as a printed circuit board, another integrated circuit die, etc.).
- Reservoirs 1209a-b may be coupled with opposite ends of the solder bump 1201, and the reservoirs may have one or more bends therein to reduce an amount of substrate space consumed.
- one or both of the reservoirs may include a plurality of branches.
- the reservoir 1209b may include branches 1209b' and 1209b".
- one or more reservoirs and/or branches may include a flared sluice.
- solder may be plated to a uniform thickness in the reservoir and bump regions so that the plated solder in the bump region does not interfere when dicing the substrate from a wafer including the substrate.
- the plated solder can be heated above its melting temperature so that solder flows from the reservoirs and branches thereof (1209a, 1209b, 1209b', and 1209b") to the bump 1201. Accordingly, the solder bump 1201 can expand laterally beyond the edge of the substrate 1203 for bonding with substrate 1207.
- Figures 13A-C are plan views illustrating steps of forming solder structures according to embodiments of " the present invention.
- a plurality of microelectronic die 1301a-i may be formed on a semiconductor wafer 1303, and the microelectronic die 1301a-i may be separated by streets 1305.
- Each of the die 1301 a-i may be an integrated circuit device including a plurality of electronic devices such as transistors, diodes, resistors, capacitors, inductors, etc.
- a plurality of solder bumps 1307 may be formed on respective solder wettable pads (not shown) on the microelectronic die 1301a-i.
- a continuous seed layer may be formed across the wafer 1303, and the seed layer may be used as a plating electrode to selectively electroplate the solder bumps 1307 through a plating mask or template.
- the plating mask or template and portions of the seed layer not covered by the solder bumps may then be removed- Portions of the seed layer remaining between respective solder bumps 1307 and die 1301a-i may make up the solder wettable pads.
- the seed layer and the resulting solder wettable pads may include an adhesion layer (such as a layer of titanium, tungsten, chrome, and/or combinations thereof) and a conduction layer (such as a layer of copper).
- Each of the solder wettable pads may also include a conductive barrier layer (such as a layer of nickel, platinum, palladium, and/or combinations thereof) which may be provided as a portion of a continuous seed layer or which may be electroplated prior to electroplating the solder bumps.
- a conductive barrier layer such as a layer of nickel, platinum, palladium, and/or combinations thereof
- the solder bumps 1307 are maintained within edges of the respective die 1301a-i before separating the individual die from the wafer, and the die may be separated from the wafer 1303, for example, by sawing the wafer 1303 along streets 1305. Accordingly, the solder bumps do not interfere with sawing the wafer 1303, and the separated die 1301a of Figure 13B may be provided with the solder bumps 1307 maintained inside edges of the die 1301a.
- solder bumps 1307 may be heated to a reflow temperature so that the solder bumps 1307' extend laterally toward an edge of the die 1301a. As shown in Figure 13C, the solder bumps 1307' may extend to and/or beyond the edge of the die 1301a.
- solder wettable pads may be provided, for example, using structures discussed above with respect to Figures 2A-I, 3-9, 11, and/or 12 to provide that solder bumps 1307' extends laterally to and/or beyond the edge of the substrate after reflow.
- the solder bumps 1307' can thus provide interconnection to another substrate (such as another die and/or printed circuit board) provided along an edge thereof. Connection to another substrate is discussed, for example, in U.S. Patent No. 5,963,793, the disclosure of which is hereby incorporated herein in its entirety by reference.
- the solder bumps 1307 may be set back from a nearest edge of the die 1301a by at least about 20 microns before reflow so that the solder bumps do not interfere with separation of the die 1301a from the wafer 1303.
- the solder bumps 1307' may extend toward the nearest edge of the die 1301a. More particularly, the solder bumps 1307' may extend at least to within about 10 microns from the edge of the die 1301a after reflow. According to some embodiments, the solder bumps 1307' may extend at least to within about 5 microns of the edge of the die 1301a after reflow.
- solder bumps 1307 may be offset from an edge of the die 1301a before reflow by at least about 20 microns, and the solder bumps 1307' may extend to and/or beyond the edge of the die 1301a after reflow.
- solder wettable pad refers to one or more conductive layers provided between a solder bump and a substrate.
- a solder wettable pad may include an adhesion layer (such as a layer of titanium, tungsten, chrome, and/or combinations thereof), a conduction layer (such as a layer of copper), and/or a barrier layer (such as a layer of nickel, platinum, palladium, and/or combinations thereof).
- a solder bump may be a bump of one or more different solder materials.
- a solder bump may include one or more of a single element, binary, ternary, and/or higher order solder; such as a lead-tin solder, a lead-bismuth solder, a lead-indium solder, a lead free solder, a tin-silver solder, a tin-silver-copper solder, an indium-tin solder, an indium-gallium solder, a gallium solder, an indium-bismuth solder, a tin-bismuth solder, an indium- cadmium solder, bismuth-cadmium solder, tin-cadmium, etc.
- a solder wettable pad may provide a surface that is wettable to a solder bump wherein the solder wettable surface of the solder wettable pad and the solder bump comprise different materials.
Abstract
Description
Claims
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US51081903P | 2003-10-14 | 2003-10-14 | |
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US9466590B1 (en) * | 2015-11-13 | 2016-10-11 | International Business Machines Corporation | Optimized solder pads for microelectronic components |
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US7659621B2 (en) | 2010-02-09 |
WO2005039261A3 (en) | 2005-08-25 |
US20060138675A1 (en) | 2006-06-29 |
US20050136641A1 (en) | 2005-06-23 |
US7049216B2 (en) | 2006-05-23 |
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