WO2005057745A1

WO2005057745A1 - Gan-based vertical electrode laser diode utilizing the technique of sapphire etching and manufacturing method of the same.

Info

Publication number: WO2005057745A1
Application number: PCT/KR2004/002752
Authority: WO
Inventors: Seong-Jin Kim; Yong-Seok Choi; Chang-Yeon Kim; Young-Heon Han; Soon-Jae Yu
Original assignee: Itswell Co. Ltd.
Priority date: 2003-12-12
Filing date: 2004-10-29
Publication date: 2005-06-23
Also published as: KR20050013045A

Abstract

The invention proposes a nitride-base semi-conductor laser diode having a vertical electrode, in which a sapphire substrate is etched by wet etching and/or dry etching to form a stripe via-hole in the sapphire substrate or totally removed to form an n-electrode accessed to an n-contact layer.

Description

GAN-BASED VERTICAL ELECTRODE LASER DIODE UTILIZING THE TECHNIQUE OF SAPPHIRE ETCHING AND MANUFACTURING METHOD OF THE SAME

Technical Field The present invention relates to a laser diode and a fabrication method thereof. The laser diode is one of the optical devices having a p-n junction structure, and designed to emit a specific wavelength of light selected by an optical cavity when a specific quantity of current flows in a forward direction.

Background Art A laser diode is fabricated from compound semiconductor, and so designed to have a p-n junction structure. The laser diode has a wide application range, and its examples include an InGaAs-based laser diode in use for 1.5/an bandwidth optical communication and a GaAs-based 790nm laser diode used as a light source in CD ROM drives. A nitride-based laser diode or nitride-based semiconductor laser diode has an immature market so far since its fabrication is difficult. However, if the nitride-based laser diode can be fabricated easily, it will have very large commercial merits. If current laser light sources used for CD ROM drives are replaced by a nitride-based semiconductor light source, data capacity recordable in a single CD can be multiplied for 10 times or more. It is also expected that the nitride-based semiconductor laser diode can contribute to overcome high power limitation that is an essential factor for illumination and special applications as well as to develop high brightness LEDs capable of converting color using fluorescent material. In general, it has not been a difficult task to fabricate a vertical electrode laser diode of compound semiconductor having a p-n junction structure since the laser diode is grown on a conductive substrate of for example GaP, GaAs, InP or InAs substrates . In case of nitride semiconductor, a base substrate is made of sapphire in order to reduce crystal defect in epitaxial growth since it has a lattice constant and a crystal structure similar to those of nitride semiconductor. However, since sapphire is an insulator, both of first and second electrodes should be formed on the same side of epitaxial surface. Forming both electrodes on the same side means that a predetermined area of the electrodes is to be used for wire bonding, requiring the laser diode to have a predetermined chip size or more. This as a result limits chip yield per wafer. In addition, the substrate made of insulator can hardly discharge external electrostatic, which may potentially cause device failures. Also, this may degrade the reliability of a resultant laser diode as well as create various res rictions in a package process . In addition, since sapphire is a poor heat conductor, a laser diode cannot efficiently dissipate heat to the outside in actuation. So, it is difficult to apply high voltage to the laser diode, or to improve the reliability of the laser diode. Furthermore, a cleaving process for separating a sapphire substrate into pieces according to chips performed by a conventional laser scribing

or with a diamond pen spends at least 10 or 40/an areas between the chips, thereby reducing chip yield per wafer.

Disclosure of the Invention Technical Object The present invention has been made to solve the above problems, and it is therefore an object of the invention to provide a laser diode having a vertical electrode structure and a fabrication method thereof. It is another object of the invention to simplify a fabrication method of laser diodes having a vertical electrode structure in order to facilitate mass production.

Technical Solution In order to realize the above objects, the present invention proposes a laser diode and a fabrication method thereof as follows: The invention provides a laser diode comprising: a base substrate used for semiconductor thin film growth and having a via-hole formed by etching the base substrate in part or whole; a buffer layer formed on one side of the. base substrate having a via-hole overlapping with the base substrate via-hole; a first conductive contact layer formed on the buffer layer; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first cladding layer; a second cladding layer formed on the active layer; a second conductive contact layer formed on the second cladding layer; a first electrode formed on the first conductive contact layer; and a second electrode connected to the second conductive contact layer via the via-hole, the second electrode being formed by etching the base substrate in part or whole, whereby the base substrate is used as a current blocking layer. In particular, according to an aspect of the invention, there is provided a laser diode comprising: a base substrate having a stripe via-hole; a first conductive contact layer formed on the base substrate; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductive cladding layer; a second conductive cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a first electrode formed on the second conductive contact layer; and a second electrode connected to the first conductive contact layer via the stripe via-hole . According to another aspect of the invention, there is provided a laser diode comprising: a base substrate having a stripe via-hole pattern; a first conductive contact layer formed on the base substrate; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductive cladding layer; a second conductive cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a conductive receptor substrate attached onto the second conductive contact layer and adapted to act as a first electrode; and a second electrode connected to the first conductive contact layer via the stripe via-hole. The laser diode may further comprise a buffer layer formed between the base substrate and the first conductive contact layer and having a via-hole which at least partially overlaps with the stripe via-hole of the base substrate; a first ohmic layer formed between the first electrode and the second conductive contact layer; and a second ohmic layer formed between the second electrode and the first conductive contact layer. Preferably, the second electrode is extended beyond the stripe via-hole thereby forming a pad on the base substrate . Also, the first electrode may comprise a single or multiple layers containing at least one selected from a group consisting of NiO, NiAu, Ni, Cr, Rh, Pd, Au, Ti, Pt, Au, Ta and Al, and the second electrode may comprise a single or multiple layers containing at least one selected from a group consisting of Ti, Al, Rd, Pt, Ta, Ni, Cr, Au and Ag. The buffer layer, the first conductive contact layer, the first conductive cladding layer, the active layer, the second conductive cladding layer and the second conductive contact layer preferably comprise In_x (Ga_yAlι__y) N (O≤x≤l and O≤y≤l, x+y>l) nitride-based semiconductor, and the base substrate is preferably made of sapphire. The base substrate may have a thickness of about 5 to 400/an, and preferably comprises a mirror-like-polished surface opposite to the first conductive contact layer. Preferably, the first conductive contact and ohmic layers are n-type, and the second conductive contact and ohmic layers are p-type . The stripe via-hole of the base substrate and the buffer layer is preferably narrowed as extending to the first conductive contact layer. In addition, the laser diode may further comprise a lead frame bonded to the first electrode via conductive paste and electrically connected to the second electrode via wire bonding. Also, the laser diode may further comprise a first electrode pad formed on the first electrode, the first electrode pad is preferably located without overlapping with the via-hole. Preferably, the receptor substrate may comprise one selected from a group consisting of a conductive semiconductor substrate, a conductive oxide substrate and a metal substrate, in which the conductive semiconductor substrate is made of one selected from a group consisting of Si, GaAs, InP and InAs substrates, the conductive oxide-based substrate is made of one selected from a group consisting of Indium-Tin-Oxide (ITO) , ZrB and ZnO, and metal substrate is made of one selected from a group consisting of Cu, W, Cu , Au and Ag. According to further another aspect of the invention, there is provided a laser diode comprising: a conductive receptor substrate functioning as a first electrode; a first ohmic layer formed on the receptor substrate; a first conductive contact layer formed on the first ohmic layer; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductive cladding layer; a second cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a second ohmic layer formed on the second conductive contact layer; and a second electrode formed on the second ohmic layer. In this case the first conductive contact layer, the first conductive cladding layer, the active layer, the second conductive cladding layer and the second conductive contact layer preferably comprise In_x (GayAli-y) N (O≤x≤l and O≤y≤l, x+y>l) nitride-based semiconductor, in which the second electrode comprises a single or multiple layers containing at least one selected from a group consisting of NiO, NiAu, Ni, Cr, Rh, Pd, Au, Ti, Pt, Au, Ta and Al, and in which the first conductive contact and ohmic layers are n-type, and the second conductive contact and ohmic layers are p-type. According to other aspect of the invention, such a laser diode may be fabricated by a fabrication method of laser diodes, comprising steps of: forming a buffer layer, a first conductive contact layer, a first conductive cladding layer, an active layer, a second conductive cladding layer, a second conductive contact layer and a first electrode in their order on a base substrate; lapping the base substrate; forming protective layers on the first electrode and on the base substrate, respectively; etching the protective layer on the base substrate via photolithography to expose the base substrate in part; etching the base substrate and the buffer layer underlying the base substrate by using the protective layer as an etching mask to form a stripe via-hole; and forming a second electrode connected to the first conductive contact layer via the stripe via-hole. The fabrication method may further comprise a step of attaching an auxiliary substrate to a resultant structure before the step of lapping the base substrate. Preferably, the auxiliary substrate comprises at least one selected from a group consisting of an insulator substrate, a semiconductor substrate, a conductive oxide substrate and a metal substrate, in which the insulator substrate is made of one selected from a group consisting of sapphire, glass and quartz, the semiconductor substrate is made of one selected from a group consisting of Si, GaAs, InP and InAs, the conductive oxide substrate is made of one selected from a group consisting of Indium-Tin-Oxide (ITO) , ZrB and ZnO, and the metal substrate is made of one selected from a group consisting of Cu , Mo, Au, Al and Au. Preferably, the auxiliary substrate is attached to the resultant structure by using wax as an adhesive. In addition, the lapping step may comprise at least one of wet etching and dry etching, in which the wet etching uses an etching solution selected from a group consisting of HC1, HN0₃, HF, OH, NaOH, H₂S0₄, H₃P0₄ and 4H₃PO₄+4CH₃COOH+HNO₃+H₂O, and the dry etching utilizes at least one of Chemical Mechanical Polishing (CMP) and ICP/RIE, and in which the lapping step comprises mirror-like-polishing the base substrate to have a surface roughness of about 10an or less. The protective layer-etching step may comprise wet etching, which utilizes BOE solution as an etching solution, or RIE dry etching . The stripe via-hole-forming step may perform the etching with an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H_ΞS0₄, H₃P0₄ and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof. Preferably, the etching solution is heated to a temperature of at least 100^°C before being used. The stripe via-hole-forming step may comprise at least one of wet etching and dry etching of ICP/RIE or RIE, in which the wet etching uses an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0 and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof, in which the wet etching is adapted to etch the base substrate, and the dry etching is adapted to etch the buffer layer. Preferably, the buffer layer comprises In_x (Ga_yAli-_y) N (O≤x≤l and O≤y≤l, x+y>l) nitride-based semiconductor and is adapted to act as an etch stop layer. Electrical properties in the via-hole may be monitored by a probe to determine whether or not the first conductive contact layer is exposed. The dry etching may use at least one selected from a group consisting of BC1₃, Cl₂, HBr and Ar, and the base substrate-etching step preferably utilizes the dry etching and the wet etching together. The fabrication method may further comprise steps of: forming a first ohmic layer on the second conductive contact layer before the first electrode-forming step; and forming a second ohmic layer in contact with the first conductive contact layer before the second electrode-forming step. The first and second ohmic layers may have light reflecting properties. Herein, the first or second electrode-forming step may comprise depositing at least one selected from a group consisting of Ni, Au, Ti, Al, Rh, Pd, Ta and Cr and performing thermal treatment, i.e. rapid thermal annealing, at a temperature at least 100^°C in an atmosphere containing nitrogen or oxygen. The fabrication method may further comprise a step of cleaving the base substrate into pieces according to individual chips, in which the cleaving step comprises the wet etching or the dry etching, in which the base substrate-cleaving step preferably performs wet etching with an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0₄ and 4H₃P0₄+4CH₃C00H+HN0₃+H₂0 and combinations thereof. In addition, the via-hole-forming step may comprise forming cleaving lines where the base substrate is to be cleaved into pieces, in which the cleaving lines

are formed preferably at a depth of 0.5an to 100/an. According to other aspect of the invention, there is provided a fabrication method of laser diodes comprising steps of: forming a buffer layer, a first conductive contact layer, a first conductive cladding layer, an active layer, a second conductive cladding layer, a second conductive contact layer in their order on a base substrate; attaching a receptor substrate on the second conductive contact layer; lapping the base substrate and the buffer layer to expose the first conductive contact layer; and forming an electrode layer on the first conductive contact layer. In this case, the receptor substrate may comprise one selected from a semiconductor substrate, a conductive oxide substrate and a metal substrate, in which the semiconductor substrate is made of one selected from a group consisting of Si, GaAs, InP and InAs, the conductive oxide substrate is made of one selected from a group consisting of Indium-Tin-Oxide (ITO) , ZrB and ZnO, and the metal substrate is made of one selected from a group consisting of CuW, Mo, Au, Al and Au. The receptor substrate-attaching step may comprise using a eutectic metal. The lapping step may comprise at least one of wet etching and dry etching, in which the wet etching uses an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0₄ and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof, and in which the dry etching utilizes at least one of Mechanical Polishing, Chemical Mechanical Polishing (CMP) and ICP/RIE. The lapping step preferably utilizes the mechanical polishing and/or wet etching, in which the wet etching is adapted to etch the base substrate, and in which the dry etching is adapted to etch the buffer layer. In addition, the fabrication method may further comprise steps of: forming a first ohmic layer on the second conductive contact layer before the receptor substrate-attaching step; and forming a second ohmic layer in contact with the first conductive contact layer before the electrode layer-forming step.

Advantageous Effect According to the embodiments of the invention as described above, the laser diode has two electrodes formed on the top and the underside of a chip, respectively, which can reduce the size of the chip thereby to significantly increase chip yield per wafer. In particular, the invention advantageously facilitates the fabrication of a nitride-based semiconductor laser diode having a vertical electrode structure, in which a stripe via-hole is formed in a sapphire substrate and a metal electrode is formed thereon so that the electrode can efficiently discharge heat and static electrostatic to the outside. In addition, the sapphire base substrate can be utilized as a current blocking layer so as to easily create carrier population inversion in an active layer. This is effective to lower the lasing threshold current of the laser diode. Furthermore, the invention can remarkably increase productivity since it utilizes backside polishing and dry or wet etching to remove the sapphire substrate. In addition, the invention can easily improve process reproducibility by using the etch selectivity between the sapphire substrate and nitride-based semiconductor layers as well as achieve standardization so as to facilitate mass production. In particular, in the formation of a resonator mirror essential to an edge emission lasing device, cleaving lines available for device separation are formed through the wet etching so that the mirror can be easily formed in a cleaved facet. In this way, the laser diode of the invention can realize improved performance over conventional ones.

Brief Description of the Drawings FIG. 1 is a perspective view of a laser diode chip having a vertical electrode structure according to a first embodiment of the invention; FIG. 2 is a cross-sectional view of the laser diode chip having a vertical electrode structure according to the first embodiment of the invention, in which its first electrode is connected to a lead frame; FIG. 3 is a cross-sectional view of the laser diode chip having a vertical electrode structure according to the first embodiment of the invention, in which its second electrode is connected to a lead frame; FIG. 4 is a perspective view of a laser diode chip having a vertical electrode structure according to a second embodiment of the invention; FIG. 5 is a photograph illustrating a cross section of a sapphire substrate in which grooves of a different line width are formed through wet etching according to an embodiment of the invention; FIG. 6 is a graph illustrating the relation between pattern line width and etched depth in which grooves of a different line width are formed through wet etching according to an embodiment of the invention; FIG.7 is a photograph illustrating the surface of a sapphire substrate in which a specific pattern is formed in the sapphire substrate through wet etching; FIG. 8 is a graph comparing the etch rate of sapphire with that of GaN when etched through ICP/RIE dry etching; FIG. 9 is a graph comparing the etch rate of sapphire with that of GaN when etched with a mixed solution such as H₂S0₄ and H₃P0; FIG. 10 is a photograph illustrating the surface of a nitride-based semiconductor buffer layer in which a sapphire substrate is removed through wet etching; FIG. 11 is a graph illustrating the current-voltage curve of a nitride-based semiconductor layer measured with a probe in which a sapphire substrate is removed through wet etching; and FIG. 12 illustrates cleaving lines formed on a sapphire substrate through wet etching.

*Major Reference Signs in the Drawings* 11: p-contact layer of In_x (Ga_yAlι-_y) N nitride-based semiconductor 12: p-cladding layer of In_κ (Ga_yAli-_y) N nitride-based semiconductor 13: quantum well active layer of In_x (Ga_yAlι__y) N nitride-based semiconductor 14: n-cladding layer of In_;: (Ga_yAlι__y) N nitride-based semiconductor 15: n-contact layer of In_:: (Ga_yAlι__y) N nitride-based semiconductor 16: buffer layer of In_;, (Ga_yAl_!-._y) N nitride-based semiconductor 17: sapphire substrate 18: second ohmic layer 19: second electrode 20: first ohmic layer 21: first electrode 22: receptor substrate 23: paste 24: first electrode lead frame 25: second electrode lead frame 26: Au wire

Best Mode for Carrying out the Invention The following detailed description will discuss preferred embodiments of a laser diode having a vertical electrode structure according to the present invention in conjunction with the accompanying drawings. The thickness is exaggerated in order to clearly indicate several layers and areas in the drawings, and the same reference signs are used to designate the same or similar parts throughout the specification. When it is mentioned that a specific component such as a layer, film, area and sheet is arranged "above" a second component, this is not to be understood that the specific component is located "directly above" the second component, but a third component may intermediate between the first and second components. On the other hand, when it is mentioned that a specific component is located "directly on" a second component, this means that there is no other component intermediating between the first and second components . FIG. 1 is a perspective view of a laser diode chip having a vertical electrode structure according to a first embodiment of the invention, and FIG. 2 is a cross-sectional view of the laser diode chip having a vertical electrode structure according to the first embodiment of the invention in which its first electrode is connected to a lead frame. The laser diode of this invention includes a first lead frame 24, a chip bonded to a second lead frame 25, a conductive paste 23 bonding the chip to the lead frame 24, a wire 26 connecting one electrode of the chip to the lead frame 25. The chip has a layered structure including a sapphire substrate 17, a buffer layer 16, an n-contact layer 15, an n-cladding layer 14, an active layer 13, a p-cladding layer 12, a p-contact layer 11, a first ohmic layer 20 and a first electrode 21 layered in their order from bottom to top. Then, a second ohmic layer 18 is formed on a stripe via-hole, which is extended through the sapphire substrate 17 and the buffer layer 16, and on the underside of the sapphire substrate 17. In addition, a second electrode 19 is formed on the second ohmic layer 18. In the chip, the buffer layer 16, the n-contact layer 15, the n-cladding layer 14, the active layer 13, the p-cladding layer 12 and the

p-contact layer 11 have a total thickness of 1 to 200an. A part or substantially the whole part of the inner wall of the stripe via-hole is covered with the second reflective ohmic layer 18 , which contacts the n-contact layer 15 via the stripe via-hole and extends therefrom to the outside. The second electrode 19 fills the stripe via-hole up to a specific depth. The stripe via-hole is preferably narrowed as extending inward in order to prevent the second electrode 19 from intermediate breakage or short circuit, but not limited to angle. The stripe via-hole may have various horizontal cross sectional configurations such as rectangle and polygon. Preferably, the stripe via-hole is shaped as a quadrangular groove. The sapphire substrate 17 has a structure that is not halved by the via-hole so that it can be used as a base of the chip. In this embodiment, the via-hole is so formed to impart a ϋ-shaped configuration to the sapphire substrate 17. The via-hole may be formed only in a central portion of the sapphire substrate 17 so that the sapphire substrate can be rectangular frame-shaped to act as a more stable base. The first electrode 21 is made of one selected from the group consisting of NiO, NiAu, Ni, Cr, Rh, Pd, Au, Ti, Pt, Au, Ta and Al, or an alloy containing at least one thereof. The second electrode 19 is made of one selected from the group consisting of Ti, Al, Rd, Pt, Ta, Ni, Cr and Au, or an alloy containing at least one thereof. The buffer layer 16, the p- and n-contact layers 11 and 15, the p- and n-cladding layers 12 and 14 and the active layer 13 are made of In_x (Al_yGaι-_y) N nitride-based semiconductor, where O≤x≤l, O≤y≤l and x+y>l. That is, these layers can be made of nitride-based semiconductor such as AlGaN, InGaN and AlGalnN. In particular, the active layer 13 may be of a single quantum well structure or a multiple quantum well structure having a barrier layer of ln_x (Al_yGax-_y) N and a well layer of In_x (Al_yGaι__y) N nitride-based semiconductor. Since the composition of In, Ga and Al is adjusted, various wavelength laser diodes such as a short wavelength laser diode having an A1N (about 6.2eV) band gap and a long wavelength laser diode having an InN (about 1.8eV) band gap can be fabricated freely. Therefore, the invention is not limited to blue nitride-based semiconductor laser diodes having a 460nm wavelength, but can be applied to all types of nitride-based semiconductor laser diodes which can be fabricated on the basis of a sapphire base substrate. The first and second ohmic layers 20 and 18 preferably have reflective properties to lower the threshold current of laser diodes using light-reflecting properties even though high reflectivity is not required for the ohmic layers 18 and 20. The first ohmic layer 20 is of a single or multiple layers made of an alloy of Rh/Au/Pt/Au, and the second ohmic layer 18 is of single or multiple layers made of an alloy of Ti/Al, Al, TiAl/Ti/Au and so on. The first and second ohmic layers 20 and 18 are heat-treated in an atmosphere containing oxygen or nitrogen at a temperature ranging from 200°C to 700^°C to have excellent ohmic properties. In place of metal layers, the first and second ohmic layers 20 and 18 having reflective properties may adopt a Distributed Bragg Reflector (DBR) or Distributed Feedback Reflector (DFB) thin film based upon semiconductor or conductive oxide. In case of the DBR or DFB film, each layer preferably has a large reflectivity difference from adjacent ones. The ohmic layers 18 and 20 preferably include such as DFB or DBR films in order to realize a high reflectivity. In order to raise light extraction efficiency, the ohmic layers 20 and 18 preferably have a light-reflective index of 30% or more. Since the first and second electrodes 21 and 19 are formed on both sides of the chip, respectively, the laser diode of this structure can reduce the area of the chip and thus improve chip yield per wafer significantly. In addition, since the stripe via-hole is formed in the sapphire substrate 17 and the second electrode 19 is made of metal, heat and static electrostatic can be effectively discharged through the second electrode 19. Then, the laser diode can act in high voltage, thereby improving its performance and reliability. Such a diode can be used for optical recording, illumination and special application, and its applicability is limitless. FIG. 3 is a cross-sectional view of the laser diode chip having a vertical electrode structure according to the first embodiment of the invention, in which its second electrode is connected to a lead frame. Referring to FIG. 3, a second electrode 19 is attached to a first lead frame 24, and other features are similar to those of the first embodiment. In addition, a first ohmic layer 20 is deposited on a first electrode 21, and a second ohmic layer 18 is deposited on the second ohmic layer 18. FIG. 4 is a perspective view of a laser diode chip having a vertical electrode structure according to a second embodiment of the invention. The laser diode according to the second embodiment is fabricated by attaching a conductive receptor substrate 22 onto a second electrode 19 and then removing a sapphire substrate 17 in part or in whole . Other features are equal or similar to those of the first embodiment except that a sapphire substrate 17 is made thinner than that of the first embodiment or its surface is removed in order to further promote heat dissipation from the substrate 17 and then the second electrode 19 is formed thereon. The sapphire substrate 17 may have a thickness of 1/an to 400an. The first electrode 21 and the receptor substrate 22 are bonded with eutectic metal such as Au, AuSn and InPd. Preferably, a barrier metal (not shown) containing at least one of the group consisting of Ti, Pt, Ni and Ta is formed on the ohmic layer 20 to prevent eutectic metal from penetrating into a thin film semiconductor structure. Now reference will be made to a fabrication method of a laser diode according to the first and second embodiments. First, a buffer layer 16, an n-contact layer 15, an n-cladding layer 14, an active layer 13, a p-cladding layer 12 and a p-contact layer 11 are formed in their order on a sapphire (A1₂0₃) substrate 17 via Metal Organic Chemical Vapor Deposition (MOCVD) , Liquid Phase Epitaxy (LPE) , Molecular Beam Epitaxy (MBE) and so on. Next, a first ohmic layer 20 is formed on the p-contact layer 11, and a first electrode 21 is formed on the first ohmic layer 20. The first ohmic layer 20 and the first electrode 21 are formed via at least one of the group consisting of Electron Beam (E-Beam) Deposition, thermal evaporation, sputtering and so on. After the formation of the first electrode 21, thermal treatment is performed in a furnace under an atmosphere

containing nitrogen or oxygen at a temperature ranging from 300°C to 700°C (preferably from 500 to 600^°C) so as to form an ohmic contact between the first electrode 21 and the first ohmic layer 20 thereby lowering contact resistance against a semiconductor layer. Then, an auxiliary substrate (not shown) is attached to the first electrode 21. The auxiliary substrate is selected from the group consisting of an insulator substrate of for example sapphire, a semiconductor substrate of for example Si, GaA, InP ^' or InAs substrates and a substrate having a conductive oxide layer of for example-Indium-Tin Oxide (ITO) , ZrB or ZnO. Wax is a desirable adhesive layer for the attachment of the auxiliary substrate so that the auxiliary substrate can be readily detached later. Where the auxiliary substrate acts as a receptor substrate 22 or a permanent device component instead of being detached, the adhesive layer preferably adopts eutectic metal containing at least one of the group consisting of Au, Si, In, Pt, R andNi, which have a low melting temperature . In particular, since Au and Pt have strong corrosion resistance against H₂S0₄ and H₃P0₄, they are most preferable eutectic metal when sapphire is wet etched. In this case, although the sapphire substrate 17 may be completely etched out in view of heat dissipation from the laser diode, it is preferably left in the form of a thin layer or film to be used as a current blocking layer. For the purpose of protecting semiconductor surface in wet or dry etching, a protective layer or hard mask of for example SiN_x or Si0₂ is deposited on a semiconductor at a thickness of 1/an, and the semiconductor is wax-bonded to a temporary substrate. Then, the sapphire substrate 17 is lapped, and the lapped surface is polished to form a smooth mirror surface. It is more desirable for the sapphire substrate 17 to have a smaller thickness . However, since extremely small thickness may cause bending to the sapphire substrate 17 or worsen process, the sapphire substrate 17 preferably has a thickness of about 30/an to 150/an. The sapphire substrate preferably has a thickness of about 1/an to 150/an when attached onto the receptor substrate. In addition, the mirror-like-polished sapphire 17 has a surface roughness limited "to about 10/an or less since the surface roughness of the sapphire substrate 17 can be transferred to the n-contact layer 15 in etching the sapphire substrate 17 and the buffer layer 16, thereby damaging a laser diode layer structure. After the mirror-like-polishing, a protective layer of for example SiN_x or Si0₂ is deposited on the sapphire substrate 17, and an auxiliary substrate is attached thereon again. Then, the protective layer is etched using photolithography, thereby exposing a partial area of the sapphire substrate in which a stripe via-hole is to be formed. In this case, the protective layer etching is performed using Reactive Ion Etching (RIE) or Buffer Oxide Etchant (BOE) solution. The sapphire substrate 17 is immersed into an etchant solution so as to etch a specific depth, in which the etchant solution is at least one selected from the group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0₄ and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof and it is etched via ICP/RIE or RIE to finish the via-hole formation. The dry and wet etchings are applied together like this to prevent the cross section ratio of the via-hole top to bottom from excessively increasing. That is, the dry etching is performed to a specific depth maintaining the cross sectional area of the via-hole substantially uniform, and then the wet etching is performed under the specific depth making the side of the via-hole maintain a specific inclination. The cross section ratio of the via-hole bottom to the via-hole top is preferably about 0.5 or more. However, the reverse cross section ratio does not negatively influence the fabrication of a diode. In this process step, a cleaving line can be formed in a device simultaneously with the via-hole based upon wet etching properties of the sapphire base substrate. That is, the sapphire substrate is isotropic with respect to wet etching and most available sapphire base substrates are of a C plane or (0001) plane, so that an etched surface generally forms an inclination of about 15° to 54° degrees as shown in FIG. 5. This results from different etch rate between the (0001) plane and an etched facet such as A, R or M. The cleaving line can be formed simultaneously with the via-hole since etching depths are varied according to opened pattern widths and sapphire etching is stopped at a specific depth. As shown in FIGS. 5 and 6, the etched depth of a sapphire substrate becomes deeper in proportion to opened line width. A pattern having an opened line width 57an is etched to 24/an so that the ratio of the opened line width to the depth is 0.4, whereas a pattern having an opened line width 10an is etched to only 1.5_/an so that the ratio of the opened line width to the depth is only 0.1. This result indicates that the etching depth is determined by opened line width and adjusting opened line width can freely control the etching depth, in which narrowing opened line width can stop etching at a depth of 1_/an or less. It is sufficient for the cleaving line to have a line width and a depth of about 1 to 3/an. However, the cleaving line may preferably have a depth of about 0.5/an to 100_/an according to the thickness of a sapphire substrate. By utilizing such wet etching properties, the cleaving line can be formed while trie via-hole is etched. As an advantage, a device can be produced without additional process. In particular, although it is important for a cleaved facet to have a clear mirror or specular surface in order to increase the optical gain of a semiconductor laser diode, a general diamond pen or laser scribing can rarely produce a clearly cleaved mirror. However, the wet etching of the invention can produce a clear mirror as well as forming minute triangular cleaving lines in areas where diodes are to be divided. The cleaving lines can be formed simultaneously with the via-holes or separately in the last step of diode separation. Then, the buffer layer 16 and the n-contact layer 15 are dry etched in part to form a via-hole exposing the n-contact layer 15. It is possible to deposit a new Si0₂ or SiN_;; layer while opening the via-hole only after removing the Si0₂ or SiN_x layer which was used in wet etching so that the cleaving line is not etched further while the buffer layer 16 and the n-contact layer 15 are partially dry-etched. However, dry etching can be performed without any additional process since the sapphire is rarely etched during dry etching. In this event, the sapphire substrate 17 is wet-etched as follows: A sapphire substrate etch rate by an etching solution is measured with a test sapphire substrate, and then the sapphire substrate 17 is dipped into the etching solution for a time period in which it can be etched for 100 to 120% in its thickness. The buffer layer 16 shows an etch rate by the adopted etching solution which is about 1/50 or less of that of the sapphire substrate 17. That is, the etch selectivity of the buffer layer 16 with respect to the sapphire substrate 17 is 50 or more. Therefore, although etching is performed for a time period that is sufficient to completely etch the sapphire substrate 17, there is no risk of damaging underlying layers since the buffer layer 16 is etched slowly enough. In the meantime, the etching solution is preferably maintained at a temperature of 100°C or more in order to shorten etching time. In order to maintain the etching solution at 100^°C or more, it can be heated directly or indirectly. In the direct heating, the etching solution is placed on a heater or directly contacted by the heater. In the indirect heating, optical absorption is adopted to heat the etching solution. In addition, pressure may be boosted in order to raise the temperature of the etching solution over its boiling temperature . The sapphire substrate 17 can be etched via a polishing technique such as Mechanical Polishing, Chemical Mechanical Polishing (CMP) or a dry etching technique such as ICP/RIE and RIE. ICP and RIE power may be raised to etch the sapphire substrate 17 at a higher rate according to the dry etching. However, this may damage nitride-based semiconductor films, and thus attention should be given. Herein, the sapphire substrate is etched via ICP/RIE dry etching in order to impart a sharp inclination to a via-hole thereby enlarging the area of a nitride-based semiconductor contact layer. FIG.7 is a photograph illustrating a sapphire substrate surface after a rectangular pattern is formed on a sapphire substrate via wet etching. Referring to FIG. 7, the etched inclination and the substrate 17 show a clean surface. The sapphire substrate is etched for 22.4 m in 20 minutes, showing an etch rate of 1.1/an/min. This etch rate is interesting enough to be compared with dry etch rate, and satisfactory in view of chip mass production. The wet etching has more advantages than any other approaches in view of mass production since it is not restricted to the productivity of equipments . When this invention is applied to mass production, there is an important factor to ensure process conditions capable of raising the etch selectivity of the nitride-based semiconductor buffer layer 16 with respect to the sapphire substrate 17. In particular, the buffer layer 16 can be effectively utilized as an etch stop for sapphire. Therefore, the buffer layer 16 can be expressed according to a formula In (Ga_vAl_α-_y)N nitride-based

semiconductor (O≤x≤l, O≤y≤l and x+y>l) . Preferably, it is effective to increase Al ratio. In the meantime, a thin film of for example SiN or SiO may be utilized as an etch stop for sapphire. In this case, the thin film of SiN or SiO can be formed only on a predetermined area of the sapphire substrate 17 in which a via-hole is to be formed. According to an experiment result, the thin film of SiN_x or Si0₂ is rarely etched by a mixed solution such as H₂S0₄ and H₃P0₄ and highly corrosion-resistive against wet etching such as ICP/RIE, thereby achieving a wide application range.

The laser diode of the second embodiment is produced according to a fabrication method subs antially the same as that of the first embodiment except that an auxiliary substrate is used as the receptor substrate 22 functioning as a support for the laser diode and a current path. The receptor substrate 22 is attached onto a side of the sapphire substrate 17 on which the epitaxial layer is grown. Available examples of the receptor substrate 22 include a semiconductor substrate made of for example Si, GaAs, InP and InAs substrates, a conductive oxide substrate made of for example Indium-Tin-Oxide (ITO) , ZrB and ZnO and a metal substrate made of for example Cu, W, CuW, Au and Ag. In case of a semiconductor substrate, the attachment of the receptor substrate 22 is performed as follows: An ohmic layer is formed on the receptor substrate 22, and a first ohmic layer 20 is formed on the p-contact layer 11. Then, bonding is preferably performed using a eutectic metal containing at least one of Au, In, Pd, Ni and Pt at a temperature ranging from about 200 to 500^°C under a pressure of about IMP to 6MP for about 5 to 10 minutes. In order to prevent the semiconductor thin films or layers from oxidation during such thermo compression bonding, the ther o compression bonding is performed in a gas atmosphere containing any of Ar, He, Kr, Xe and Rn or in an atmosphere containing N₂ or 0₂ in order to reduce contact resistance of the semiconductor layers against metal . In this case, desirable examples of eutectic metal include Au and Pt resistive against H₂S0₄ and H₃P0₄. With the receptor substrate 22, the sapphire substrate 17 can be lapped to a thickness of about 1/an to 150/an or removed in part or whole. Amounting process onto the lead frames 24 and 25 is performed similar to that of the first embodiment. That is, the first electrode 21 can be attached to the lead frame 24 via paste or the second electrode 19 can be attached to the lead frame 24. FIG. 8 is a graph comparing the etch rate of sapphire with that of GaN when etched through ICP/RIE dry etching; As seen in FIG. 8, the etch rate of sapphire and nitride-based semiconductor increases in proportion to ICP and RIE power, whereas the etch selectivity between sapphire and nitride-based semiconductor decreases . This result reports that when the sapphire substrate 17 is etched according to ICP/RIE of dry etching techniques, etching is not easily stopped in the buffer layer 16 of nitride semiconductor, and Etch Stop Detector (ESD) technique such as optical analysis and residual gas analysis has to be used to stop etching in the buffer layer 16. Even though this analysis technique is used, etching is successfully stopped at a very low ratio. However, wet etching can utilize the SiN layer, the SiO_? layer or the buffer layer 16 as an etch stop layer thereby achieving process margin that is essentially required for mass production. FIG. 9 is a graph comparing the etch rate of sapphire with that of GaN when etched with a mixed solution of H₂S0₄ and H P0₄. As seen in FIG. 9, the etch selectivity of sapphire with respect to nitride-based semiconductor by a. mixed solution of H_^S0₄ and H₃P0₄ can be 100 or more. This result reports that the buffer layer 16 can be effectively used as an etch stop layer for the sapphire substrate 17. A high etch

selectivity of 100 or more was obtained at a high temperature of 100^°C or more. In particular, since the etch rate of sapphire reaches or exceeds 1/an/min at a specific temperature, it is apparent that the fabrication method proposed by this invention is more advantageous than any conventional methods in view of production cost , productivity and process stabilization. However, it seems difficult to stably fabricate the vertical electrode laser diode by using the wet etching only. As shown in FIG. 9, the nitride-based semiconductor is rarely etched when the sapphire substrate 17 is etched with the mixed solution of H.SOi and H-PO-i- So, it becomes difficult to uniformly etch the sapphire substrate 17 up to the buffer layer 16 by using the wet etching only. Therefore, dry etching such as ICP/RIE or RIE is preferably adopted as a. process technique to uniformly etch the buffer layer 16 of undoped nitride-based semiconductor and stop etching at the n-contact layer 15 of nitride semiconductor. That is, the wet etching and the dry etching can be combined and adopted to a process for fabricating a nitride-based semiconductor laser diode having a vertical electrode structure by removing the sapphire substrate 17. In this way, the fabrication process can more stably and uniformly remove the sapphire substrate 17 and etch the buffer layer 16 of nitride-based semiconductor to expose the n-contact layer 15, thereby forming the second electrode 19 in a more stable fashion. FIG. 10 is a photograph illustrating the surface of the nitride-based semiconductor buffer layer when the sapphire substrate is removed through the wet etching. As seen in FIG. 10, even after the sapphire substrate 17 was removed, substantially no breaks or damages were found from the thin films or layers, which had a very clean surface state. FIG. 11 is a graph illustrating the current-voltage curve of a nitride-based semiconductor layer measured with a probe after the sapphire substrate is removed through wet etching. As shown in FIG. 11, no current flows until the sapphire substrate 17 is removed, and a current of IpA flows at IV after the sapphire substrate 17 is removed. When the buffer layer 16 of ni ride-based semiconductor is removed via ICP/RIE or RIE, current level is raised sharply up to 40pA. ICP/RIE and RIE use a mixed gas containing at least one of BC1₃, Cl₂, HBr and Ar as their etching gas. This result reports that the wet etching and the dry etching are adapted to effectively etch the sapphire substrate 17 and the buffer layer 16 of nitride-based semiconductor to expose the n-contact layer 15 of nitride semiconductor. This feature is a very important result indicating that electric properties of the exposed surface can be detected with a probe station at every process step to effectively monitor etching procedures. Then, the sapphire substrate 17 is etched via photolithography, and a conductive material selected from Ti, Al, Rd, Pt, Ta, Ni, Cr, Au and alloys thereof is deposited thereon, such that the second reflective and ohmic layer 18 and the second electrode 19 are formed through liftoff. The present invention can remove the sapphire substrate through backside polishing and dry or wet etching so as to remarkably improve productivity while protecting the epitaxial layers from thermal damage in case of laser lift-off. In addition, this invention can easily improve process reproducibility by using the etch selectivity between the sapphire substrate and the nitride-based semiconductor layers as well as achieve standardization so as to facilitate mass production. In order to prevent the nitride-based semiconductor layers 11, 12, 13, 14, 15 and 16 from damage under the pressure applied when the wire 26 is bonded to the first or second electrode 21 or 19 in the first and second embodiments, a pad is preferably formed on the first ohmic layer 20 and the first electrode 21 in a position alternating with the via hole. Alternatively, the second ohmic layer 18 and the second electrode 19 may be preferably extended beyond the via hole onto the sapphire substrate 17, thereby forming a pad in a position overlapping with the sapphire substrate 17. The shape or position of the second electrode 19 can be modified variously. It is also possible to form the ohmic layer 18 and the second electrode 19 into a single integral layer or a multi-layer structure of double layers or more. The second ohmic layer 18 and the second electrode 19 may be made of at least one selected from the group consisting of Al, Ti/Al, Ti/Al/Au, Rh/Au, Rh/Au/Pt/Au, Pd/Au, Al/Pt/Au and so on. Then, in case that the receptor substrate 22 of semiconductor is attached, the receptor substrate 22 is lapped up to about 100/an to form the first electrode. In particular, where p or n-types Si substrate is adopted as the receptor substrate, the ohmic electrode of the receptor substrate is preferably made of at least one of Ti, Ni, Au and Al . FIG. 12 illustrates cleaving lines formed on the sapphire substrate 17 through wet etching to separate the substrate 17 into pieces according to diodes. As shown in FIG.12, the cleaving lines can be formed in areas supposed to act as boundaries of the diodes by using^* the wet etching. The cleaving lines may be formed simultaneously with etching for forming via holes in the sapphire substrate 17 or separately after the first and second electrodes 21 and 19 are formed. When the cleaving lines are formed simultaneously with the via holes, the wet etching can be automatically stopped at a specific depth by adjusting opened widths of a protective layer used as an etching mask. That is, when the protective layer has openings corresponding to cleaving line areas for forming the cleaving lines and openings corresponding to via hole areas for forming the via hole, the width of the openings corresponding to the cleaving line areas is adjusted significantly smaller than that of the openings corresponding to the via hole areas. In this case, the etching depth of the cleaving lines has to be adjusted to the extent that the sapphire substrate 17 is not separated into pieces according to chips. The cleaving lines preferably have a depth of about 1/an to 3_/an. In application, this technique can generally reduce the chip spacing available for the cleaving lines within 10an from conventional values of about 40/an to 50an, thereby increasing chip yield from a single wafer. In particular, although not mentioned in detail as an embodiment, a nitride laser diode can be combined with fluorescent material in the fabrication of an LED capable of converting color, which produces a high efficiency lighting source capable of converting color . That is , an UV laser diode can be combined with a fluorescent material for converting UV rays into red, green or blue light or a blue laser diode of nitride-based semiconductor can be combined with yellow YAG fluorescent material to produce a high brightness white LED or light source. The high brightness white light source may be also produced by combining three laser diode chips including blue, green and red laser diodes. The fabrication of color-convertible LEDs from nitride-based semiconductor laser diodes is expected to provide a new turning point to the fabrication of high brightness lighting sources and backlight units for Liquid Crystal Displays (LCDs) . The present invention can be applied not only to nitride blue LEDs having 47Onm wavelength but also to all types of nitride-based semiconductor LEDs and laser diodes grown on a sapphire base substrate, which are expressed as In_x(Ga_yAli-_y)N (0<x≤ 1, 0<<y≤l, x+y>l) nitride-based semiconductor. The invention is also applicable to all types of nitride semiconductors grown on a sapphire substrate. The invention can improve the reliability and brightness of a diode and reduce its size while rema.rkably elevating its performance, thereby enabling the fabrication of nitride-based semiconductor laser diodes having high brightness and performance. The invention is therefore expected to come into the spotlight as a key technology for future lighting equipments and optical storages. While the present invention has been shown and described in connection with the preferred embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the invention as defined by the appended claims .

Industrial Applicability An important factor for applying the present invention to mass production is to ensure process conditions capable of raising the etch selectivity between the sapphire substrate 17 and the nitride-based semiconductor buffer layer 16. In particular, the buffer layer 16 can be effectively used as an etch stop layer. Therefore,, the buffer layer 16 can be made of In_x (Ga_yAli-_y) N (O≤x≤l, 0≤<y≤l, x+y>l) nitride-based semiconductor, in which the composition of Al can be preferably raised. The thin film of for example SiN or Si0 can be utilized as an etch stop layer for sapphire. In this event, the SiN_;: or SiO_:: thin film can be formed on a predetermined area of the sapphire base substrate 17 where the via-hole is to be formed before the growth of the nitride-based semiconductor layers. According to the experiment result, the SiN or SiO thin film has a large applicability since it is rarely etched by a mixed solution such as H₂S0 and H₃P0₄ and has a high corrosion resistance against dry etching such as ICP/RIE.

Claims

1. A laser diode comprising: a base substrate having a stripe via-hole; a first conductive contact layer formed on the base substrate; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductive cladding layer; a second conductive cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a first electrode formed on the second conductive contact layer; and a second electrode connected to the first conductive contact layer via the stripe via-hole.

2. A laser diode comprising: a base substrate having a stripe via-hole pattern; a first conductive contact layer formed on the base substrate; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductiv cladding layer; a second conductive cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a conductive receptor substrate attached onto the second conductive contact layer and adapted to act as a first electrode; and a second electrode connected to the first conductive contact layer via the stripe via-hole.

3. The laser diode according to claim 1 or 2, further comprising: a buffer layer formed between the base substrate and the first conductive contact layer and having a via-hole which at least partially overlaps with the stripe via-hole of the base substrate; a first ohmic layer formed between the first electrode and the second conductive contact layer; and a second ohmic layer formed between the second electrode and the first conductive contact layer.

4. The laser diode according to claim 1 or 2, wherein the second electrode is extended beyond the stripe via-hole thereby forming a pad on the base substrate.

5. The laser diode according to claim 1 or 2, wherein the first electrode comprises a single or multiple layers containing at least one selected from a group consisting of NiO, NiAu, Ni, Cr, Rh, Pd, Au, Ti, Pt, Au, Ta and Al .

6. The laser diode according to claim 1, wherein the second electrode comprises a single or multiple layers containing at least one selected from a group consisting of Ti, Al, Rd, Pt, Ta, Ni, Cr, Au and Ag.

7. The laser diode according to claim 1 or 2, wherein the buffer layer, the first conductive contact layer, the first conductive cladding layer, the active layer, the second conductive cladding layer and the second conductive contact layer comprise In_v

N nitride semiconductor, wherein O≤x≤l, 0<<y≤l and x+y>l .

8. The laser diode according to claim 1 , wherein the buffer layer, the first conductive contact layer, the first conductive cladding layer, the active layer, the second conductive cladding layer and the second conductive contact layer have a total thickness of about 1/an to 200/an.

9. The laser diode according to claim 1 or 2, wherein the base substrate is made of sapphire.

10. The laser diode according to claim 9, wherein the base substrate has a thickness of about 1/an to 00/an, and comprises a mirror-like-polished surface opposite to the first conductive contact layer.

11. The laser diode according to claim 1 or 2, wherein the first conductive contact and ohmic layers are n-type, and the second conductive contact and ohmic layers are p-type.

12. The laser diode according to claim 1 or 2, wherein the stripe via-hole of the base substrate and the buffer layer is narrowed as extending to the first conductive contact layer.

13. The laser diode according to claim 1 or 2 , further comprising a lead frame bonded to the first electrode via conductive paste and electrically connected to the second electrode via wire bonding.

14. The laser diode according to claim 1 or 2, further comprising a first electrode pad formed on the first electrode, the first electrode pad being located without overlapping with the via-hole.

15. The laser diode according to claim 2, wherein the receptor substrate comprises one selected from a group consisting of a conductive semiconductor substrate, a conductive oxide-based substrate and a metal substrate, the conductive semiconductor substrate being made of one selected from a group consisting of Si, GaA, InP and InAs substrates, the conductive oxide-based substrate being made of one selected from a group consisting of Indium-Tin-Oxide (ITO) , ZrB and ZnO, and metal substrate being made of one selected from a group consisting of Cu, W, CuW, Au and Ag.

16. A laser diode comprising: a conductive receptor substrate functioning as a first electrode; a first ohmic layer formed on the receptor substrate; a first conductive contact layer formed on the first ohmic layer; a first conductive cladding layer formed on the first conductive contact layer; an active layer formed on the first conductive cladding layer; a second cladding layer formed on the active layer; a second conductive contact layer formed on the second conductive cladding layer; a second ohmic layer formed on the second conductive contact layer; and a second electrode formed on the second ohmic layer.

17. The laser diode according to claim 16, wherein the first conductive contact layer, the first conductive cladding layer, the active layer, the second conductive cladding layer and the second conductive layer

comprise In_;: (Ga_yAlι__y) N nitride semiconductor, wherein O≤x≤l, 0≤<y≤l and x+y>l.

18. The laser diode according to claim 16, wherein the second electrode comprises a single or multiple layers containing at least one selected from a group consisting of NiO, NiAu, Ni, Cr, Rh, Pd, Au, Ti, Pt, Au, Ta and Al .

19. The laser diode according to claim 16, wherein the first conductive contact and ohmic layers are n-type, and the second conductive contact and ohmic layers are p-type.

20. A fabrication method of laser diodes, comprising steps of: forming a buffer layer, a first conductive contact layer, a first conductive cladding layer, an active layer, a second conductive cladding layer, a second conductive contact layer and a first electrode in their order on a base substrate; lapping the base substrate; forming protective layers on the first electrode and on the base substrate, respectively; etching the protective layer on the base substrate via photolithography to expose the base substrate in part; etching the base substrate and the buffer layer underlying the base substrate by using the protective layer as an etching mask to form a stripe via-hole; and forming a second electrode connected to the first conductive contact layer via the stripe via-hole.

21. The fabrication method according to claim 20, further comprising a step of attaching an auxiliary substrate to a resultant structure before the step of lapping the base substrate.

22. The fabrication method according to claim 21, wherein the auxiliary substrate comprises at least one sel acted from a group consisting of an insulator substrate, a semiconductor substrate, a conductive oxide-based substrate and a metal substrate, the insulator substrate being made of one selected from a group consisting of sapphire, glass and quartz, the semiconductor substrate beincj made of one selected from a group consisting of Si, GaAs, InP and InAs, the conductive oxide substrate being made of one selected from a group consisting of Indium-Tin-Oxide (ITO) , ZrB and ZnO, and the metal substrate being made of one selected from a group consisting of CuW, Mo, Au, Al and Au.

23. The fabrication method according to claim 2], wherein the auxiliary substrate is attached to the resultant structure by using wax as an adhesive.

24. The fabrication method according to claim 20, wherein the lapping step comprises at least one of wet etching and dry etching, the wet etching using an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H_:S0₄, H₃PO, and 4H,P0₄H-4CH-,COOH+HNO,+H 0, and the dry etching utilizing at least one of Mechanical Polishing, Chemical Mechanical Polishing (CMP) and ICP/RIE.

25. The fabrication method according to claim 2^*.', wherei n the lapping step comprises mirror-like-polishi g the base substrate to have a surface

roughness of about 10/an or less.

26. The fabrication method according to claim 20, wherein the protective layer-etching step comprises wet etching, which utilizes BOE solution as an etching solution, or PIE dry etching.

27. The fabrication method according to claim 20, wherein the stripe via-hole-forming step performs the etching with an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H-S0₄, H₃P0₄ and 4H₃P0₄+4CH₃COOH+HN0₃+H>0 and combinations thereof.

28. The fabrication method according to claim 27 , wherein the etching solution is heated to a temperature of at least 100 ΪJ before being used.

29. The fabrication method according to claim 20, wherein the stripe via-hole-forming step comprises at least one of wet etching and dry etching of ICP/RIE or RIE, wherein the wet etching uses an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0₄ and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof.

30. The fabrication method according to claim 29, wherein the wet etching is adapted to etch the base substrate, and the dry etching is adapted to etch the buffer layer so as to access a first contact layer.

31. The fabrication method according to claim 30, wherein the buffer layer, SiN_x layer and Si0₂ layers are adapted to act as an etch stop layer.

The buffer layer comprises In,. (Ga_vAl_1-,) N, wherein 0<:;<1, 0<<y≤l and x+y>l nitride-based semiconductor.

32. The fabrication method according to claim 30, wherein electrical properties in the via-hole are monitored by a probe to determine whether or not the first conductive contact layer is exposed.

33. The fabrication method according to claim 30, wherein the dry etching uses at least one selected from a group consisting of BC1₃, Cl₂, HBr and Ar.

34. The fabrication method according to claim 29, wherein the base substrate-etching step utilizes the dry etching and the wet etching together.

35. The fabrication method according to claim 20, further comprising steps of: forming a first ohmic layer on the second conductive contact layer before the first electrode-forming step; and forming a second ohmic layer in contact with the first conductive contact layer before the second electrode-form ng step.

36. The fabrication method according to claim 35, wherein the first and second ohmic layers have light reflecting properties.

37. The fabrication method according to claim 35, wherein the first or second electrode-forming step comprises depositing at least one selected from a group consisting of Ni, Au, Ti, Al, Rh, Pd, Ta and Cr and performing thermal treatment at a temperature ranging from 20 °C to 700 °C in an atmosphere containing nitrogen or oxygen.

38. The fabrication method according to claim 20, further comprising a step of cleaving the base substrate into pieces according to individual chips, wherein the cleaving step comprises the wet etching or the dry etching.

39. The fabrication method according to claim 37 or 38, wherein the base substrate-cleaving step performs wet etching with an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H₂S0₄, H₃P0 and 4H₃P0₄+4CH₃COOH+HN0₃+H₂0 and combinations thereof.

40. The fabrication method according to claim 38, wherein the via-hole-forming step comprises forming cleaving lines where the base substrate is to be cleaved into pieces.

41. The fabrication method according to claim 40, wherein the cleaving lines are formed at a depth of 0.5/an to 100/mι.

42. A fabrication method of laser diodes comprising steps of: forming a buffer layer, a first conductive contact layer, a first conductive cladding layer, an active layer, a second conductive cladding layer, a second conductive contact layer in their order on a base substrate; attaching a receptor substrate on the second conductive contact layer; lapping the base substrate; wet etching the buffer layer to expose the first, conductive contact layer; and forming an electrode layer on the first conductive contact layer.

43. The fabrication method according to claim 42, the receptor substrate comprises one selected from a semiconductor substrate, a conductive oxide substrate and a metal substrate, the semiconductor substrate being made of one selected from a group consisting of Si, GaAs, InP and InAs substrates, the conductive oxide substrate being made of one selected from a group consisting of Indium-Tin-Oxide (ITO), ZrB and ZnO, and the metal substrate being made of one selected from a group consisting of CuW, Mo, Au, Al Au.

44. The fabrication method according to claim 42, wherein the receptor substrate-attaching step comprises u-ing a eutectic metal containing at least one selected from a group consisting of In, Au, Pt, Pd and Ni as an adhesive and applying a pressure between 1 MP to 6MP at a temperature ranging from 200^°C to 500°C.

45. The fabrication method according to claim 42, wherein the lapping step comprises at least one of wet etching and dry etching, wherein the wet etching uses an etching solution selected from a group consisting of HC1, HN0₃, HF, KOH, NaOH, H,S0₄, H₃P0₄ and 4H_:.P(λ, MCH_<CGOH+HN0₃+H₂0 and combinations thereof, and wherein the dry etching utilizes at least one of Mechanical Polishing, Chemical Mechanical Polishing (CMP) and ICP/RIE.

46. The fabrication method according to claim 45, wherein the lapping step utilizes the wet etching and the dry etching, wherein the wet etching is adapted to etch the base substrate, and wherein the dry etching is adapted to etch the buffer layer.

47. The fabrication method according to claim 42, further comprising steps of: forming a first ohmic layer on the second conductive contact layer before the receptor substrate-attaching step; and forming a second ohmic layer in contact with the first conductive contact layer before the electrode layer-forming step.

48. The fabrication method according to claim 44, further comprising a step of forming a barrier metal layer on the second conductive contact layer before the receptor substrate-attaching step, wherein the barrier metal layer is made of at least one selected from a group consisting of Ti, Pt, Ni and Ta.