WO2005081629A3 - Novel row and column select pre-decoding scheme for semiconductor memories - Google Patents

Novel row and column select pre-decoding scheme for semiconductor memories Download PDF

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Publication number
WO2005081629A3
WO2005081629A3 PCT/IL2005/000214 IL2005000214W WO2005081629A3 WO 2005081629 A3 WO2005081629 A3 WO 2005081629A3 IL 2005000214 W IL2005000214 W IL 2005000214W WO 2005081629 A3 WO2005081629 A3 WO 2005081629A3
Authority
WO
WIPO (PCT)
Prior art keywords
decoding scheme
address lines
semiconductor memories
column select
novel row
Prior art date
Application number
PCT/IL2005/000214
Other languages
French (fr)
Other versions
WO2005081629A2 (en
WO2005081629B1 (en
Inventor
Yoav Lavi
Original Assignee
Yoav Lavi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yoav Lavi filed Critical Yoav Lavi
Priority to PCT/IL2005/000214 priority Critical patent/WO2005081629A2/en
Publication of WO2005081629A2 publication Critical patent/WO2005081629A2/en
Publication of WO2005081629A3 publication Critical patent/WO2005081629A3/en
Publication of WO2005081629B1 publication Critical patent/WO2005081629B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Abstract

A novel row and column pre-decoding scheme for semiconductor memories is disclosed. The address lines are translated to a special code where for every address combination, k of m bits are at Logic High. This coding slightly increases the number of address lines, but allows a simpler decoding scheme where the complements of the address lines are not needed for the decoding. Thus the number of global address lines in the decoder decreases sharply, along with the total number of transistors. The result is smaller size, less power and faster operation.
PCT/IL2005/000214 2004-02-26 2005-02-22 Novel row and column select pre-decoding scheme for semiconductor memories WO2005081629A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/IL2005/000214 WO2005081629A2 (en) 2004-02-26 2005-02-22 Novel row and column select pre-decoding scheme for semiconductor memories

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US57456004P 2004-02-26 2004-02-26
US60/574,560 2004-05-26
PCT/IL2005/000214 WO2005081629A2 (en) 2004-02-26 2005-02-22 Novel row and column select pre-decoding scheme for semiconductor memories

Publications (3)

Publication Number Publication Date
WO2005081629A2 WO2005081629A2 (en) 2005-09-09
WO2005081629A3 true WO2005081629A3 (en) 2006-03-02
WO2005081629B1 WO2005081629B1 (en) 2006-04-27

Family

ID=38779716

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2005/000214 WO2005081629A2 (en) 2004-02-26 2005-02-22 Novel row and column select pre-decoding scheme for semiconductor memories

Country Status (1)

Country Link
WO (1) WO2005081629A2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4176287A (en) * 1978-04-13 1979-11-27 Motorola, Inc. Versatile CMOS decoder
US5369621A (en) * 1992-08-26 1994-11-29 Hewlett-Packard Company Domino style address predecoder

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4176287A (en) * 1978-04-13 1979-11-27 Motorola, Inc. Versatile CMOS decoder
US5369621A (en) * 1992-08-26 1994-11-29 Hewlett-Packard Company Domino style address predecoder

Also Published As

Publication number Publication date
WO2005081629A2 (en) 2005-09-09

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