WO2005086197A1

WO2005086197A1 - Method of vacuum-sealing flat panel display using o-ring and flat panel display manufactured by the method

Info

Publication number: WO2005086197A1
Application number: PCT/KR2004/003057
Authority: WO
Inventors: Ho-Young Lee; Yong-Hyup Kim; Woo-Yong Sung; Wal-Jun Kim
Original assignee: Seoul National University Industry Foundation
Priority date: 2004-03-10
Filing date: 2004-11-25
Publication date: 2005-09-15

Abstract

Provided are a vacuum-sealing method of a flat panel display using an O-ring and a flat panel display manufactured by the same. The method includes preparing an upper substrate and a lower substrate and loading the upper and lower substrates into a vacuum chamber; aligning the lower and upper substrates by interposing an O-ring on a marginal portion of the lower substrate; applying pressure between the upper and lower substrates; venting the vacuum chamber; and eliminating the pressure applied between the upper and lower substrates.

Description

Description METHOD OF VACUUM-SEALING FLAT PANEL DISPLAY USING O-RING AND FLAT PANEL DISPLAY MANUFACTURED BY THE METHOD Technical Field

[1] The present invention relates to a method of vacuum-sealing a flat panel display (FPD) and an FPD manufactured by the same, and more particularly, to a method of vacuum-sealing an FPD using an O-ring and an FPD manufactured by the same. Background Art

[2] An FPD may be a light emitting type or a light receiving type. A light emitting type FPD can be categorized into a plasma display panel (PDP), a field emission display (FED), a vacuum fluorescent display (VFD), or an organic electro-luminescent (EL) display. A light receiving type FPD may be, for example, a liquid crystal display (LCD). Such an FPD has become more prevalent as one of the most important data St transmission mediums of the 21 century, which seek low noise and low power. Among various FPDs, an LCD is not a self-luminescent type and thus, necessitates irradiation of external light to create an image. For this function, an additional backlight must be installed in the LCD so as to create an image.

[3] The above-described FPDs are manufactured by bonding an upper substrate and a lower substrate.

[4] For example, a PDP displays an image using plasma induced by electric discharge. To manufacture this PDP, a front glass substrate and a rear glass substrate are separately formed and sealed. Then, a discharge gas is injected into the resultant structure, thereby completing the PDP. More specifically, the front glass substrate is prepared by forming a transparent conductive electrode (e.g., a indium tin oxide (TTO) electrode), a bus electrode, a dielectric layer, and an MgO preventing layer thereon. The rear glass substrate is prepared by forming an address electrode, a reflective layer, partition walls, and a fluorescent layer thereon. The front and rear glass substrates are come close to each other within a distance of 150 μm and then sealed. Thereafter, a plasma gas is injected into an inner space between the front and rear glass substrates, thereby completing the PDP.

[5] Typically, to seal the front and rear glass substrates of the PDP, a frit paste, which is a mixture of frit and an organic solvent, is coated around the rear glass substrate, and a sintering process is performed under an atmospheric pressure. Then, a vacuum- exhausting process is performed, and a discharge gas is injected between the front and rear glass substrates. Finally, a glass tube is tipped off using a torch or a heater block.

[6] FIG 1 is a perspective view illustrating a conventional PDP sealing process and exhausting process.

[7] Referring to FIG 1, an upper substrate 11 and a lower substrate 13 are sealed in an atmosphere using a frit 12 for sealing. In a corner of the lower substrate 13 which has a predetermined hole, a glass tube 14 for exhausting is sealed around the hole using the frit 12 The glass tube 14 is connected to an exhaust port of a vacuum chamber, and the inside of the PDP is maintained in vacuum through the glass tube connected to the exhaust port. In this state, an Ar gas is injected into the glass tube 14, thereby refreshing the inside of the PDP.

[8] The above-described process is repeated twice or three times. After that, a discharge gas is injected to a pressure of about 400 torr, and discharge is induced by applying a voltage, so that a plasma cleaning process for removing impurities remaining on the surface of the substrates can be performed. Finally, an exhausting process is repetitively carried out through the exhaust port, a predetermined discharge gas is injected to a required pressure of about 300 to 500 torr, and the glass tube 14 is tipped off by fusing. Thus, the PDP sealing process and the exhausting process are finished.

[9] However, in this method, during a substantial vacuum-exhausting process, since vacuum conductance in the PDP is reduced due to partition walls 15, the flow of molecules causes a difference in degree of vacuum between the exhaust port and the inside of the PDP. That is, because the exhausting process is performed through the glass tube 14, exhausting conductivity is limited. A drop in the degree of vacuum of the inside of the PDP degrades the purity degree of the plasma gas, thereby elevating an operating voltage of the PDP and lowering luminous efficiency. As a result, the life span of the PDP is shortened and exhausting time reaches more than several tens of hours, thus deteriorating productivity.

[10] FIGS. 2 through 4 are perspective views illustrating a method of manufacturing a conventional FED by bonding a lower substrate 25 and an upper substrate 24.

[11] Referring to FIG 2, a powdery frit is nixed with vehicle, an organic solvent, to form a paste. The paste is put in a container 23, and a first frit 26a is coated on the lower substrate 25 using a dispenser 26 A cathode plate 20, lattice spacers 28, and electrodes 29 are located on the lower substrate 25. The coated first frit 26a is dried at a temperature of about 100 °C for about 10 minutes.

[12] Referring to FIG 3, a side glass 27 is mounted on the lower substrate 25 on which the first frit 26a is coated, and a second frit 26b is coated on the side glass 27 in the same manner as the first frit 26a.

[13] Referring to FIG 4, the upper substrate 24 is stacked on the side glass 27 on which the second frit 26b is coated. Then, the resultant structure is sintered, thereby bonding the upper substrate 24 and the lower substrate 25.

[14] An LCD cannot create an image without irradiation of external light because the LCD is not self-luminescent. For this reason, an additional backlight should be installed in the LCD so as to create an image. Typically, such a backlight can be classified into a cold cathode fluorescent lamp (CCFL) or a flat fluorescent lamp in which an upper substrate and a lower substrate including fluorescent layers are assembled. In recent years, many attempts are being made at utilizing the flat fluorescent lamp, which satisfies both luminance and luminous uniformity, improves optical efficiency, and reduces the weight and production costs of an LCD.

[15] FIG 5 is a perspective view of a flat fluorescent lamp in which an upper substrate 120 and a lower substrate 110 are sealed, and FIG 6 is a cross-sectional view of the flat fluorescent lamp shown in FIG 5.

[16] Referring to FIGS. 5 and 6, the flat fluorescent lamp includes the lower substrate 110 and the upper substrate 120, which is bonded to the lower substrate 110 through the medium of a frit 170, so as to form a discharge space. A fluorescent layer 180 is located on a bottom surface of the upper substrate 120, and a dielectric layer 140 is located on a top surface of the lower substrate 110, which corresponds to the fluorescent layer 180. A plurality of discharge electrodes 130 are buried in a predetermined pattern in the dielectric layer 140. The discharge space is filled with a discharge gas, such as Xe or Ne.

[17] The lower and upper substrates 110 and 120 are formed of glass, and partition walls 150 are located between the lower and upper substrates 110 and 120 such that the lower and upper substrates 110 and 120 are spaced a predetermined distance apart to form the discharge space. The discharge space is under a lower pressure than an atmospheric pressure. Thus, if the flat fluorescent lamp is large-sized, the upper substrate 120 located above the lower substrate 110 is sagging toward the lower substrate 110 and may finally break. The partition walls 150 support the upper substrate 120 and prevent the sagging or breaking of the upper substrate 120. In this case, the lateral surfaces of partition walls 150 are coated by a fluorescent material, so it is not likely that a dark portion is formed due to the partition walls 150.

[18] As power is supplied to the discharge electrodes 130, discharge occurs between the discharge electrodes 130, thus generating ultraviolet rays. The fluorescent layer 180 is excited due to the ultraviolet rays so that the flat fluorescent lamp can emit a light.

[19] A method of manufacturing the above-described flat fluorescent lamp is as follows. At the outset, the upper and lower substrates 120 and 110 are bonded and sealed using the glass frit 170, a discharge path is vacuum-exhausted, and a discharge gas is filled. That is, the glass frit 170 is printed using a screen print method or coated on edges of the upper and lower substrates 120 and 110 using a dispenser. After that, an organic material is removed using drying and sintering processes, thereby bonding the upper and lower substrates 120 and 110 to each other.

[20] The foregoing process of bonding the upper and lower substrates using the frit is required for manufacturing FPDs, such as FEDs, PDPs, VFDs, organic ELs, and flat fluorescent lamps. After this bonding process, a space between the substrates is exhausted to a predetermined vacuum degree using an exhaust tube installed at one surfaces of the substrates. Typically, the exhausting process is performed for 10 hours or more. Thereafter, in the case of FEDs and VFDs, the exhaust tube is heated and tipped off. In the case of PDPs and flat fluorescent lamps, a discharge gas is injected between the upper and lower substrates 120 and 110 through the exhaust tube, and the exhaust tube is heated and tipped off.

[21] The foregoing processes of bonding the upper and lower substrates using the frit and exhausting the space between the upper and lower substrates have the following disadvantages.

[22] First, since the frit coated on the lower substrate should be necessarily dried to enable sintering, the entire process becomes complicated and extended.

[23] Second, during the sintering process, the electrode material formed on the glass substrate is degenerated due to outgassing of the remaining O gas, thereby degrading 2 the characteristics of the FPD. Further, a long period of time taken to exhaust gases has a bad effect on productivity. [24] Third, the foregoing conventional method involves many additional processes, such as a process of attaching the exhaust tube and a process of tipping off the exhaust tube after exhausting. [25] To overcome the drawbacks, much research into a method of vacuum-sealing glass substrates using a frit has been conducted for a long time. [26] In this vacuum sealing method, a frit paste, which is formed of a mixture of a frit and an organic solvent, is coated around a rear glass substrate and sintered in an atmosphere, and then a front glass substrate and the rear glass substrate are sealed in vacuum. If the glass substrates are sealed in vacuum, contamination caused by an adhesive is reduced, and the degree of vacuum in the FPD can be uniformized.

[27] Korean Patent Registration No. 346,955 teaches an apparatus and method for manufacturing a PDP, in which sealing, pumping, and gas-filling are performed in the same vacuum chamber in an in-line manner.

[28] Also, Korean Patent Registration No. 364,059 discloses a vacuum-sealing method for an FPD, a method of mounting a getter, and a structure on which a getter is mounted.

[29] However, in the foregoing conventional methods, when a frit for sealing, which is pre-sintered in an atmosphere, is sintered again in vacuum, a portion of elements of the frit are evaporated so that bubbles are generated and the inside of panel is contaminated. Also, the conventional vacuum sealing methods involve complicated processes and thus, are not being practically used. Disclosure of Invention

[30] The present invention provides a method of vacuum-sealing a flat panel display (FPD), in which an upper substrate and a lower substrate are sealed in a simple manner, and an FPD manufactured by the same.

[31] Also, the present invention provides a method of vacuum-sealing an FPD, which is freed from an exhausting process and a sintering process, and an FPD manufactured by the same.

[32] According to an aspect of the present invention, there is provided a method of vacuum-sealing an FPD. In this method, an upper substrate and a lower substrate are prepared and loaded into a vacuum chamber. The lower and upper substrates are aligned by interposing an O-ring on the edge of the lower substrate. The upper and lower substrates are compressed by applying pressure between the upper and lower substrates, and the vacuum chamber is vented. Thereafter, the pressure applied between the upper and lower substrates is eliminated. As a result, the upper and lower substrates of the FPD are vacuum-sealed due to a difference between an inner vacuum state and an atmospheric pressure.

[33] In the present invention, a sealant, such as a torr seal, may be filled between the upper and lower substrates outside the O-ring.

[34] The FPD may be any one selected from the group consisting of a field emission display (FED), a vacuum fluorescent display (VFD), and an organic electro-lu- ninescent (EL) display.

[35] Also, the FPD may be any one of a plasma display panel (PDP) and a flat fluorescent lamp. In this case, an exhaust tube may be installed on one side of the upper and lower substrates, and the method may further include injecting a discharge gas through the exhaust tube after vacuum-sealing.

[36] A side glass may be further located adjacent to the O-ring inside the O-ring. To facilitate the aligning process, grooves conesponding to the O-ring may be formed in the upper and lower substrate.

[37] According to another aspect of the present invention, there is provided a method of vacuum-sealing an FPD. In this method, an upper substrate and a lower substrate are prepared, and an exhaust tube is sealed in a hole formed on one side of the upper and lower substrates. The upper and lower substrates are aligned by interposing an O-ring on the edge of the lower substrate and clamped using clips. The aligned upper and lower substrates are transfened to an exhaust unit, and an inner space between the upper and lower substrates are vacuum-exhausted through the exhaust tube. Finally, the exhaust tube is tipped off.

[38] In the present invention, a sealant, such as a ton seal, may be filled between the upper and lower substrates outside the O-ring.

[39] The FPD may be any one selected from the group consisting of an FED, a VFD, and an organic EL display.

[40] Also, the FPD may be any one of a PDP and a flat fluorescent lamp. In this case, the method may further include injecting a discharge gas through the exhaust tube.

[41] A side glass may be further located adjacent to the O-ring inside the O-ring.

[42] To facilitate the aligning process, grooves corresponding to the O-ring may be formed in the upper and lower substrates.

[43] According to yet another aspect of the present invention, there is provided an FPD including an upper substrate; a lower substrate located a predetermined distance apart from the upper substrate parallel to the upper substrate; and an elastic O-ring interposed between the edges of the upper and lower substrates.

[44] In the present invention, a sealant, such as a ton seal, may be filled between the upper and lower substrates outside the O-ring.

[45] The FPD may be any one selected from the group consisting of an FED, a PDP, a VFD, an organic EL display, and a flat fluorescent lamp.

[46] A side glass may be further located adjacent to the O-ring inside the O-ring.

[47] Grooves conesponding to the O-ring may be formed in the upper and lower substrates. [48] The O-ring may be coated with a metal or Teflon to suppress degradation caused by ultraviolet rays. Brief Description of the Drawings [49] FIG 1 is a perspective view illustrating a conventional plasma display panel (PDP) sealing process and exhausting process; [50] FIGS. 2 through 4 are perspective views illustrating a conventional process of bonding a lower substrate and an upper substrate of a field emission display (FED); [51] FIGS. 5 and 6 are a perspective view and a cross-sectional view, respectively, illustrating a conventional method of manufacturing a flat fluorescent lamp by sealing a lower substrate and an upper substrate; [52] FIGS. 7 and 8 are perspective views of a PDP according to embodiments of the present invention; [53] FIGS. 9 and 10 are perspective views of an FED according to embodiments of the present invention; [54] FIGS. 11 and 12 are a perspective view and a cross-sectional view, respectively, of a flat fluorescent lamp according to an embodiment of the present invention; [55] FIGS. 13 through 16 are cross-sectional views illustrating a method of sealing a flat panel display (FPD) according to an embodiment of the present invention; [56] FIGS. 17 through 20 are cross-sectional views illustrating a method of sealing an FPD according to another embodiment of the present invention; and [57] FIGS. 21 through 23 are cross-sectional views illustrating a method of sealing an FPD according to yet another embodiment of the present invention. Mode for the Invention [58] The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. The same reference numerals are used to denote the same elements throughout the present specification. [59] In the embodiments of the present invention, to bond an upper substrate and a lower substrate, the upper and lower substrates, which are spaced a predetermined distance apart from each other, are compressed using an O-ring in a vacuum chamber. Thereafter, the chamber is vented so that the upper and lower substrates are sealed due to a difference in pressure between the inside and outside of the substrates. Since the method of the present invention requires no exhausting and sintering processes, the entire process is simple and economical.

[60] FIG 7 is a perspective view of a plasma display panel (PDP) according to an embodiment of the present invention.

[61] Referring to FIG 7, an O-ring 36 is formed on the edge of a lower substrate 33, on which partition walls 35 are formed, such that the lower substrate 33 and an upper substrate 31 are vacuum-sealed. A sealant 32, such as a ton seal, is filled outside the O-ring 36, thereby firmly sealing the upper and lower substrates 31 and 33.

[62] FIG 8 is a perspective view of a PDP according to another embodiment of the present invention.

[63] Referring to FIG 8, an O-ring 36 is formed on the edge of a lower substrate 33, on which partition walls 35 are formed, such that the lower substrate 33 and an upper substrate 31 are sealed. The lower and upper substrates 33 and 31 are clamped using elastic clips 37. A sealant 32, such as a ton seal, is filled outside the O-ring 36, thereby firmly sealing the upper and lower substrates 31 and 33.

[64] FIG 9 is a perspective view of a field emission display (FED) according to an embodiment of the present invention.

[65] Referring to FIG 9, an O-ring 46 is formed on the edge of a lower substrate 43, on which a cathode plate 40, lattice spacers 48, and electrodes 49 are formed, such that the lower substrate and an upper substrate 41 are vacuum-sealed. A sealant 42, such as a ton seal, is filled outside the O-ring 36, thereby firmly sealing the upper and lower substrates 41 and 43.

[66] FIG 10 is a perspective view of an FED according to another embodiment of the present invention.

[67] Referring to FIG 10, an O-ring 46 is formed on the edge of a lower substrate 43, on which a cathode plate 40, lattice spacers 48, and electrodes 49 are formed, such that the lower substrate 43 and an upper substrate 41 are sealed. The lower and upper substrates 43 and 41 are clamped using elastic clips 47. A sealant 42, such as a ton seal, is filled outside the O-ring 46, thereby firmly sealing the upper and lower substrates 41 and 43.

[68] FIGS. 11 and 12 are a perspective view and a cross-sectional view, respectively, of a flat fluorescent lamp according to an embodiment of the present invention.

[69] Referring to FIGS. 11 and 12, the flat fluorescent lamp includes a lower substrate 210 and an upper substrate 220, which is bonded to the lower substrate 210 through the medium of an O-ring 270, so as to form a discharge space. A sealant 290, such as a ton seal, is filled outside the O-ring 270 between the lower and upper substrates 210 and 220. A fluorescent layer 280 is formed on a bottom surface of the upper substrate 220. On a top surface of the lower substrate 210 conesponding to the fluorescent layer 280, a dielectric layer 240 in which a plurality of discharge electrodes 230 are buried in a predetermined pattern is formed. The discharge space is filled with a discharge gas, such as Xe or Ne gas.

[70] The lower and upper substrates 210 and 220 are formed of glass, and partition walls (not shown) are located between the lower and upper substrates 210 and 220 so that the upper and lower substrates 220 and 210 are spaced a predetermined distance apart so as to form the discharge space. The partition walls support the upper substrate 220 and prevent the sagging or breaking of the upper substrate 220. The lateral surfaces of the partition walls are coated by a fluorescent material 260, so it is not likely that a dark portion is formed due to the partition walls.

[71] The foregoing flat fluorescent lamp can have other various structures than shown in FIGS. 11 and 12 For example, a discharge path may be installed on the top surface of the lower substrate 210, an electrode may be installed on one lateral surface of the discharge path, or an opposing electrode may be formed on the other lateral surface of the discharge path opposite the electrode.

[72] Although not shown in FIGS. 7, 8, 9, 10, and 12, in order to prevent degradation of the O-ring, a side glass or partition walls may be additionally installed inside the O- ring or the O-ring may be coated by a metal or Teflon.

[73] Hereinafter, a method of vacuum-sealing the foregoing FPDs will be described.

[74] FIGS. 13 through 16 are cross-sectional views illustrating a method of vacuum- sealing an FPD according to a first embodiment of the present invention.

[75] Referring to FIG 13, a preprocessing process is performed on an upper substrate 51 on which electrodes and a fluorescent layer 54 are formed and a lower substrate 53 on which discharge electrodes and a dielectric layer 55 are formed. The upper substrate 51 may be preprocessed at a temperature of about 400 °C, while the lower substrate 53 may be preprocessed at a temperature of about 100 °C. In some cases, the preprocessing of the lower substrate 53 may be conducted at a temperature of about 100 °C or higher. The preprocessing process is required to remove gases remaining on the electrodes.

[76] Thereafter, the upper and lower substrates 53 and 51, which underwent the preprocessing process, are loaded into a vacuum chamber (not shown), and an exhausting process is performed using a pump installed in the chamber such that an ultrahigh vacuum state is obtained. A pressurizing unit is installed in the vacuum chamber. This pressurizing unit includes a pressurizing plate, which can pressurize the upper and lower substrates 51 and 53.

[77] Referring to FIG 14, while an O-ring 56 is being put on the lower substrate 53 in the vacuum chamber, the upper substrate 51 is aligned to the lower substrate 53. The O-ring 56 may be formed of various elastic materials and preprocessed at a temperature of about 230 °C before being put on the lower substrate 53 in the vacuum chamber. To prevent degradation, the O-ring 56 may be coated by a metal or Teflon.

[78] Referring to FIG 15, the lower and upper substrates 53 and 51 are pressurized in vacuum using the pressurizing plate of the pressurizing unit. As a result, the elastic O- ring 56 is compressed to the upper and lower substrates 51 and 53.

[79] Referring to FIG 16, while the upper and lower substrates 51 and 53 are pressurized by interposing the O-ring 56, the vacuum chamber is vented to an atmospheric pressure. Once an atmospheric gas flows into the vacuum chamber, the upper and lower substrates 51 and 53 are closely sealed to each other due to the gaseous pressure.

[80] Thereafter, even if the pressure applied between the upper and lower substrates 51 and 53 by the pressurizing unit is removed, the upper and lower substrates 51 and 53 are vacuum-sealed due to a difference between the vacuum state inside the upper and lower substrates 51 and 53 and an atmospheric pressure.

[81] Then, the upper and lower substrates 51 and 53 are unloaded from the vacuum chamber, and a sealant 52, such as a ton seal, can be filled outside the O-ring 56 between the upper and lower substrates 51 and 53.

[82] Meanwhile, in the case of a PDP or a flat fluorescent lamp, an exhaust tube is bonded in a hole formed on one side of the upper and/or lower substrates 51 and 53. Also, before a discharge gas is filled, the degree of vacuum inside the panel of the FPD can be maintained at about 10 to 10 ton. After vacuum-sealing, the exhaust tube is opened, and a discharge gas, such as He, Ne, Ar, or Xe is injected into the panel and then the panel is sealed. In this case, adhesion between the upper and lower substrates 51 and 53 is reinforced using a clamping unit, which clamps the substrates 51 and 53 in order to prevent a sudden drop in the degree of vacuum.

[83] FIGS. 17 through 20 are cross-sectional views illustrating a method of sealing an FPD according to another embodiment of the present invention.

[84] Referring to FIG 17, a preprocessing process is performed on an upper substrate 61 on which electrodes and a fluorescent layer 64 are formed and a lower substrate 63 on which discharge electrodes and a dielectric layer 65 are formed. Grooves 67 where an O-ring will be aligned are formed on the edges of the upper and lower substrates 61 and 63.

[85] Thereafter, the upper and lower substrates 61 and 63, which underwent the preprocessing process, are loaded into a vacuum chamber (not shown), and an exhausting process is performed using a pump installed in the chamber such that an ultrahigh vacuum state is obtained. A pressurizing unit is installed in the vacuum chamber. This pressurizing unit includes a pressurizing plate, which can pressurize the upper and lower substrates 51 and 53.

[86] Referring to FIG 18, while an O-ring 66 is being put on the groove 67 formed on the lower substrate 63 in the vacuum chamber, the upper substrate 61 is aligned to the lower substrate 63. In this case, the upper substrate 61 is aligned to the lower substrate 63 while observing alignment marks that are already patterned in the lower and upper substrates 63 and 61, and then the upper and lower substrates 61 and 63 are clamped using elastic clips (not shown). The O-ring 66 may be formed of various elastic materials and preprocessed at a temperature of about 230 °C before being put on the lower substrate 63 in the vacuum chamber. To prevent degradation, the O-ring 66 may be coated by a metal or Teflon.

[87] Referring to FIG 19, the lower and upper substrates 63 and 61 are pressurized in vacuum using the pressurizing plate of the pressurizing unit. As a result, the elastic O- ring 66 is compressed to the upper and lower substrates 61 and 63.

[88] Referring to FIG 20, while the upper and lower substrates 61 and 63 are pressurized by interposing the O-ring 66, the vacuum chamber is vented to an atmospheric pressure. Once an atmospheric gas flows into the vacuum chamber, the upper and lower substrates 61 and 63 are closely sealed to each other due to the gaseous pressure.

[89] Thereafter, even if the pressure applied between the upper and lower substrates 61 and 63 by the pressurizing unit is removed, the upper and lower substrates 61 and 63 are vacuum-sealed due to a difference between the vacuum state inside the upper and lower substrates 61 and 63 and an atmospheric pressure.

[90] Then, the upper and lower substrates 61 and 63 are unloaded from the vacuum chamber, and a sealant 62, such as a ton seal, can be filled outside the O-ring 66 between the upper and lower substrates 61 and 63.

[91] Meanwhile, in the case of a PDP or a flat fluorescent lamp, an exhaust tube is sealed in a hole formed on one side of the upper and lower substrates 61 and 63. Also, before a discharge gas is filled, the degree of vacuum inside the panel of the FPD can be maintained at about 10 to 10 ton. After vacuum-sealing, the exhaust tube is opened, and a discharge gas, such as He, Ne, Ar, or Xe is injected into the panel and then the panel is sealed. In this case, adhesion between the upper and lower substrates 61 and 63 is reinforced using a clamping unit, which clamps the substrates 61 and 63 in order to prevent a sudden drop in the degree of vacuum.

[92] FIGS. 21 through 23 are cross-sectional views illustrating a method of sealing an FPD according to yet another embodiment of the present invention.

[93] Referring to FIG 21, a preprocessing process is performed on an upper substrate 351 on which electrodes and a fluorescent layer 354 are formed and a lower substrate 353 on which discharge electrodes and a dielectric layer 355 are formed. Grooves 358 where an O-ring will be aligned are formed on the edges of the upper and lower substrates 351 and 353.

[94] An exhaust tube 352 is bonded in a hole formed on one side of the lower substrate 353. The exhaust tube 352 may be bonded in the upper substrate 351 instead of the lower substrate 353.

[95] Referring to FIG 22, while an O-ring 356 is being put on the groove 358 formed on the lower substrate 635 in the vacuum chamber, the upper substrate 351 is aligned to the lower substrate 353. In this case, the upper substrate 351 is aligned to the lower substrate 353 while observing alignment marks that are already patterned in the lower and upper substrates 353 and 351, and then the upper and lower substrates 351 and 353 are clamped using elastic clips (not shown). The O-ring 356 may be formed of various elastic materials and preprocessed at a temperature of about 230 °C before being put on the lower substrate 353 in the vacuum chamber. To prevent degradation, the O-ring 356 may be coated by a metal or Teflon.

[96] Referring to FIG 23, the aligned upper and lower substrates 351 and 353 are transfened to an exhausting unit 360. The exhaust tube 352 is connected to a vacuum pump 363 to allow pumping and simultaneously, the panel is heated to remove impurities frcm the panel. While the pumping proceeds, the inside of the panel reaches a vacuum state, and the upper and lower substrates 351 and 353 are sealed to each other due to a difference in pressure between the inside and outside of the panel. That is, the panel is vacuum-sealed due to a difference between the vacuum state of a space between the upper and lower substrates 351 and 353 and an atmospheric pressure. When the panel reaches a desired degree of vacuum, a middle portion of the exhaust tube 352 is heated using a local heating unit 365 and cut using a pinch-off process such that the inside of the panel is isolated. In this case, since the degree of vacuum in the isolated panel is further degraded during the pinch-off process, a getter (not shown), which is already installed in the panel, is activated, thus completing the sealing of the FPD.

[97] Then, the upper and lower substrates 351 and 353 are unloaded from the vacuum chamber, and a sealant, such as a ton seal, can be filled outside the O-ring 356 between the upper and lower substrates 351 and 353.

[98] Meanwhile, in the case of a PDP or a flat fluorescent lamp, the exhaust tube 352 is bonded in a hole formed on one side of the upper and lower substrates 351 and 353, and a discharge gas, such as He, Ne, Ar, or Xe, is injected through the exhaust tube 352 and tipped off.

[99] While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims. Industrial Applicability

[100] As described above, in the present invention, an FPD can be manufactured using a simple method by sealing an upper substrate and a lower substrate using an O-ring.

[101] Also, since the method of the present invention includes no exhausting process, it is not required to attach an exhaust tube and tip off the exhaust tube. Further, no sintering process is needed so that the FPD can be economically manufactured without a heating unit or a frit.

Claims

[1] A method of vacuum-sealing a flat panel display, the method comprising: preparing an upper substrate and a lower substrate and loading the upper and lower substrates into a vacuum chamber; aligning the lower and upper substrates by interposing an O-ring on the edge of the lower substrate; compressing the upper and lower substrates by applying pressure between the upper and lower substrates; venting the vacuum chamber; and eliminating the pressure applied between the upper and lower substrates.

[2] The method of claim 1, wherein a sealant is filled between the upper and lower substrates outside the O-ring.

[3] The method of claim 2, wherein the sealant is a ton seal.

[4] The method of claim 1, wherein the flat panel display is any one selected from the group consisting of a field emission display (FED), a vacuum fluorescent display (VFD), and an organic electro-luminescent (EL) display.

[5] The method of claim 1, wherein the flat panel display is any one of a plasma display panel (PDP) and a flat fluorescent lamp.

[6] The method of claim 5, wherein an exhaust tube is installed on one side of the upper and lower substrates, the method further comprising injecting a discharge gas through the exhaust tube after vacuum-sealing.

[7] The method of claim 1, further comprising locating a side glass adjacent to the O-ring inside the O-ring.

[8] The method of claim 1, wherein the aligning of the lower and upper substrates comprises forming grooves conesponding to the O-ring in the upper and lower substrate to facilitate the aligning process.

[9] A method of vacuum-sealing a flat panel display, the method comprising: preparing an upper substrate and a lower substrate; sealing an exhaust tube in a hole formed on one side of the upper and lower substrates; aligning the upper and lower substrates by interposing an O-ring on the edge of the lower substrate and clamping the upper and lower substrate using clips; transferring the aligned upper and lower substrates to an exhaust unit and vacuum-exhausting an inner space between the upper and lower substrates through the exhaust tube; and tipping off the exhaust tube.

[10] The method of claim 9, wherein a sealant is filled between the upper and lower substrates outside the O-ring.

[11] The method of claim 10, wherein the sealant is a ton seal.

[12] The method of claim 9, wherein the flat panel display is any one selected from the group consisting of an FED, a VFD, and an organic EL display.

[13] The method of claim 9, wherein the flat panel display is any one of a PDP and a flat fluorescent lamp.

[14] The method of claim 13, further comprising injecting a discharge gas through the exhaust tube.

[15] The method of claim 13, wherein the aligning of the upper and lower substrates comprises forming grooves conesponding to the O-ring in the upper and lower substrates to facilitate the aligning process.

[16] A flat panel display comprising : an upper substrate; a lower substrate located a predetermined distance apart from the upper substrate parallel to the upper substrate; and an O-ring interposed between the edges of the upper and lower substrates.

[17] The display of claim 16, further comprising a sealant filled between the upper and lower substrates outside the O-ring.

[18] The display of claim 17, wherein the sealant is a ton seal.

[19] The display of claim 16, wherein the flat panel display is any one selected from the group consisting of an FED, a PDP, a VFD, an organic EL display, and a flat fluorescent lamp. [20] The display of claim 16, further comprising a side glass located adjacent to the O-ring inside the O-ring. [21] The display of claim 16, wherein grooves are formed in the upper and lower substrates to conespond to the O-ring. [22] The display of clam 16, wherein the O-ring is coated with a metal or Teflon to suppress degradation caused by ultraviolet rays.