WO2005086227A1 - Technique d’amelioration de la qualite d’une couche mince prelevee - Google Patents
Technique d’amelioration de la qualite d’une couche mince prelevee Download PDFInfo
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- WO2005086227A1 WO2005086227A1 PCT/FR2005/000542 FR2005000542W WO2005086227A1 WO 2005086227 A1 WO2005086227 A1 WO 2005086227A1 FR 2005000542 W FR2005000542 W FR 2005000542W WO 2005086227 A1 WO2005086227 A1 WO 2005086227A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Definitions
- the present invention relates to a method for forming a structure comprising a layer taken from semiconductor material from a donor wafer, the method comprising the following successive steps: (a) implantation of atomic species to form a zone of embrittlement in the donor wafer to a determined depth; (b) bonding of the donor wafer to a recipient wafer; (c) supply of energy to separate the layer removed from the donor wafer at the embrittlement zone; (d) treatment of the sampled layer.
- This type of diaper removal is also called Smart-Cut®, and is known to those skilled in the art.
- Step (a) can be carried out by simple implantation (for example of hydrogen) or by co-implantation (for example of hydrogen and helium), with a dosage of the chemical species to be implanted and an implantation energy. adapted.
- Step (b) of bonding the receiving wafer (of the removed layer), is typically done at the surface of the donor wafer having undergone implantation, by means of a gluing layer of dielectric material , such as Si0 2 .
- step (c) the energy is at least partly supplied, typically, in thermal form. It is then the thermal budget (the temperature / duration of the heat treatment couple) that must be considered to determine the moment when the layer to be removed will come off.
- a semiconductor-on-insulator structure such as an SOI structure (in the case where the sampled layer is made of silicon), SiGeOI (in the case where the sampled layer is made of germanium silicon), sSOI (in the case where the sampled layer is in constrained silicon), SGOI (in the case where the sampled layer comprises a layer of relaxed SiGe on which is arranged a layer of constrained Si) or GeOI (in the case where the sampled layer is in germanium) .
- SOI structure in the case where the sampled layer is made of silicon
- SiGeOI in the case where the sampled layer is made of germanium silicon
- sSOI in the case where the sampled layer is in constrained silicon
- SGOI in the case where the sampled layer comprises a layer of relaxed SiGe on which is arranged a layer of constrained Si
- GeOI in the case where the sampled layer is in germanium
- a semiconductor-on-insulator structure 30 is schematically represented (consisting of a receiving plate 20 covered with the sampled layer 1 by means of an electrically insulating layer 5) which has, in its part semiconductor (ie the sampled layer 1), such a reduction in crystal quality. It can thus be observed that the sampled layer 1 comprises a defective zone 1A, this defective zone 1A comprising crystalline defects and an existing surface roughness.
- the defective zone 1A has a thickness typically around 150 nm for an atomic implantation of hydrogen.
- the implantation step may have caused the layer to be removed to decrease the crystal quality.
- Step (d) of processing the removed layer 1 is then necessary to implement in order to remove this defective area 1A, and thus recovering at least part of the healthy zone 1B of the sampled layer 1. It is possible, for example, to implement mechanical polishing or mechanical-chemical planarization (“CMP”) to compensate for surface roughness, and / or steps sacrificial oxidation of the defective zone 1A.
- CMP mechanical-chemical planarization
- such a four-step process is disclosed in document US2004 / 0053477, in which the sample of a constrained Si layer is produced from a donor substrate comprising a buffer layer of SiGe.
- Step (a) consists of implanting in the buffer layer and step (d) comprises removing the removed part of the buffer layer by polishing the SiGe surface and then selective etching of SiGe with respect to constrained Si.
- Selective etching notably allows the desired layer to be obtained in the end with a good surface quality, without risking damaging it too much (which could be the case if a single polishing were used).
- the chemical etching implemented during this step (d) can in certain cases cause problems of at least partial detachment of the bonding interface (bonding carried out during step (b)).
- the chemical etching of step (d) can in particular delaminate the edge of the bonding layer, that is to say attacking the latter at its level with the edge of the structure produced.
- this solution is not satisfactory in that it does not completely solve the delamination problem and that the process is significantly slowed down.
- this chemical etching requires prior preparation of the etching surface, typically carried out by mechanical polishing means. Indeed, this preparation for etching remains necessary to make up for some of the significant roughness which could subsequently cause an excessively inhomogeneous etching capable of creating through defects or holes in the remaining layer.
- the successive actions of polishing and chemical etching make the post-detachment finishing step (d) (as well as the entire sampling process) long, complex and costly from an economic point of view.
- step (a) of implantation by implantation of several atomic species (typically by carrying out an implantation of helium and an implantation of hydrogen).
- This type of implantation is hereinafter designated by the term co-implantation.
- the implementation of a co-implantation in fact makes it possible to use a total dose of co-implanted species lower than the dose used when a single species is implanted.
- the total dose in co-implantation thus typically represents 1/3 of the dose in implantation of a single species.
- the result of this reduction in the total implanted dose is a reduction in the thickness of the defective zone, which in particular makes it possible to reduce or simplify the finishing treatments implemented after detachment.
- a first object of the invention is to reduce the duration, the economic cost, and the number of treatment means, during step (d), of a sampled layer, and in particular no longer use mechanical means for polishing.
- a second objective of the invention is to avoid delamination at the edge of the bonding layer during the implementation of a chemical etching finish.
- a third objective of the invention is to produce a structure, such as a semiconductor-on-insulator structure, comprising a sampled layer including a material more fragile than Si, such as constrained Si or SiGe.
- a fourth objective is to produce such a structure from a sampled layer of better quality.
- a fifth objective of the invention is to reduce the amount of material sacrificed during the treatment of the layer removed.
- a sixth objective of the invention is to propose a simple method for processing the sampled layer and which is easily integrated into the whole of the Smart-Cut® type sampling process.
- the present invention attempts to overcome these problems by proposing, according to a first aspect, a method of forming a structure comprising a layer taken from a donor wafer, the donor wafer comprising before taking a first layer of a first material chosen from semiconductor materials and a second layer on the first layer of a second material chosen from semiconductor materials, the method comprising the following steps: (a) implantation of atomic species to form a zone of embrittlement under the second layer (b) bonding of the donor wafer to a receiving plate; (c) supply of energy to separate the layers removed from the donor wafer at the embrittlement zone; (d) selective etching of the remaining part of the first layer with respect to the second layer; characterized in that the parameters of the implantation carried out during step (a) are adjusted so as to minimize the roughness appearing immediately after the implementation of step (c), and in that it comprises in addition to a step capable of reinforcing the bonding, implemented at a temperature below about 800 ° C.
- Other possible characteristics of the invention are:
- step (b) The step capable of strengthening bonding is implemented before step (b), and includes plasma activation;
- step (b) The step capable of strengthening the bonding is implemented after step (b), and includes a heat treatment;
- the heat treatment is done at a temperature between about 350 ° C and about 800 ° C for 30 minutes to about 4 hours;
- the heat treatment is done at a temperature between about 550 ° C and about 800 ° C for 30 minutes to about 4 hours; - the heat treatment is implemented after step (c) and in continuity with step (c), in the same oven;
- the heat treatment comprises a simple change in the temperature from the separation temperature of step (c) to the temperature chosen for the heat treatment; - step (c) is carried out around 500 ° C for a period which can range from approximately 30 minutes to 2 hours; - The step capable of strengthening the bonding is implemented so as to have, before step (d), a bonding energy greater than or equal to about 0.8 J / m 2 ;
- step (c) said roughness appearing immediately after the implementation of step (c) is less than about 40 ARMS measured on a surface of
- step (a) the atomic species implanted during step (a) comprise two distinct atomic elements, step (a) thus being a co-implantation;
- step (a) is a co-location of helium and hydrogen
- step (a) the co-implantation of step (a) is carried out according to implantation parameters adapted to form the zone of embrittlement in said layer of SiGe and so that the concentration peak helium is located, in the thickness of the donor wafer, more in depth than the hydrogen spreading zone and more in depth than the embrittlement zone;
- the heat treatment is carried out at a temperature between 575 ° C and 625 ° C;
- the assays of helium and hydrogen are chosen to be, respectively, of the order of 0.9.10 16 / cm 2 and of the order of 1.10 16 / cm 2 ;
- step (c) the method does not include the implementation of mechanical polishing means
- the method further comprises, after step (d), crystal growth of the second material on the second layer to thicken the latter; - the first layer is in Si ⁇ - x Ge x with 0 ⁇ x ⁇ 1 and the second layer is in Si elastically constrained;
- the donor wafer comprises a support substrate in solid Si, a buffer structure in SiGe, a first layer comprising Si ⁇ _ x Ge x (x ⁇ O) and a second layer in constrained Si; the first layer is made of elastically constrained Si and the second layer is made of Si- ⁇ _ x Ge x with 0 ⁇ x ⁇ 1, the donor wafer further comprising a third layer made of Si- ⁇ _ x Ge x under the first layer;
- step (a) the implantation of step (a) is also carried out under the first layer, and the method further comprising, between step (c) and step (d), a selective etching of the remaining part of the third layer with respect to the first layer;
- the donor wafer comprises a support substrate in solid Si, a buffer structure in SiGe, and a multilayer structure comprising alternately first layers in S - x Ge x (x ⁇ 0) and second layers in constrained Si, so as to be able perform a plurality of samples from the same donor plate;
- the method further comprises, before step (a), the formation of the constrained layer at a deposition temperature between about 450 ° C and about 650 ° C, and in that the treatments implemented between this deposition and the detachment obtained in step (c) are carried out at temperatures lower than or equal to the deposition temperature.
- the method further comprises, before step (b), a step of forming a bonding layer on the donor wafer and / or on the receiving wafer, the bonding layer comprising an electrically insulating material, such as by example of Si0 2 , Si 3 N or Si x O y N z ;
- the invention proposes an application of said method for forming a structure, to the formation of a semiconductor-on-insulator structure.
- the invention provides a semiconductor-on-insulator structure obtained after having implemented all of the steps (a), (b) and (c) of the method, and after having removed the contact of the sampled layers with the remaining part of the donor wafer, this structure having roughnesses less than 40 ARMS measured on a surface of 10 ⁇ 10 ⁇ m, and a bonding energy greater than or equal to about 0.8 J / m 2 .
- - Figure 1 shows a schematic sectional view of a semiconductor-on-insulator structure obtained after the implementation of a Smart-Cut® process according to the prior art
- - Figure 2 shows a sectional view obtained by TEM by the Applicant of a semiconductor-on-insulator structure obtained after the implementation of a method according to the invention
- - Figures 3a to 3e schematically represent the different steps of a method according to the invention to form a structure comprising a layer taken from Smart-Cut®
- - Figure 4 shows a first time evolution of the temperatures of the heat treatments that can be implemented according to the invention during the separation step and during the treatment of the layer removed according to the method represented by Figures 3a to 3 e
- - Figure 5 shows a second time evolution of the temperatures of the heat treatments that can be implemented according to the invention during the separation step and during the treatment of the layer removed according to the method shown in Figures 3a to 3 e
- - Figures 6a and 6b schematically show a first variant according to the invention
- FIGS. 8a, 8b and 8c are views obtained by TEM of an Si donor wafer having been subjected to He / H co-implantation; - Figures 9, 10 and 11 show roughness measurement results, in particular on the surface of structures comprising a sampled layer comprising Si and SiGe respectively; - Figure 12 shows the results of quantification of defects in particular for structures comprising a sampled layer comprising Si and SiGe respectively.
- a first method of sampling a first layer 1 in Sit_ x Ge x (with x G] 0; 1]) and a second layer 2 in elastically constrained Si is illustrated, starting from of a donor plate 10, to transfer them to a receiving plate 20, according to the invention.
- a donor wafer 10 comprising the first layer 1 in Si ⁇ _ x Ge x and the second layer 2 in Si forced to take, is illustrated.
- a donor plate 10 including Si ⁇ _ x Ge x comprises a solid substrate 5 in Si on which has been formed, for example by crystal growth, a buffer structure in SiGe (not shown) composed of different layers.
- the latter may have a gradual change in thickness of its composition in Ge, ranging from 0% at the level of the solid Si substrate to approximately 100 ⁇ % at the interface with the first layer 1 in Si- ⁇ _ x Ge x (also preferentially formed by crystal growth).
- a second layer 2 of constrained Si is formed on the first layer 1 of Si- ⁇ . x Ge x .
- the growth of the second layer 2 is carried out in situ, directly in continuation of the formation of the first layer 1.
- the growth of the second layer 2 is carried out after a slight stage of preparation of surface of the underlying adaptation layer 2, for example by CMP polishing.
- the second Si layer 2 is advantageously formed by epitaxy using known techniques such as CVD techniques and MBE (respective abbreviations of “Chemical Vapor Déposition” and “Molecular Beam Epitaxy”).
- the silicon included in the second layer 2 is then forced by the first layer 1 to increase its nominal lattice parameter to make it substantially identical to that of its growth substrate and thus present internal elastic stresses in tension. It is necessary to form a second fairly thin second layer 2: a too large layer thickness, greater than a critical equilibrium thickness, would indeed cause a relaxation of the stress in the thickness of the film towards the nominal mesh parameter of the silicon and / or a generation of faults.
- This weakening zone 4 is formed by implantation of atomic species whose dosage, nature, and energy are chosen so as to determine an implant depth and a weakening level.
- the parameters determining the implantation of atomic species are adjusted so as to minimize the roughness appearing at the level of the embrittlement zone 4 after detachment.
- the magnitude of the post-detachment roughness is partly caused by the parameters defining the implantation used, as we will see later.
- the implantation of atomic species can be a co-implantation of atomic species (ie an implantation of, mainly, at least two atomic species), such as for example a co-implantation of hydrogen, and helium or Argon or another rare gas or another suitable gas.
- the weakening zone 4 is generally finer than in the case of a simple implantation (see study below).
- the energy of the implantation is chosen so as to have an implant depth close to the depth of the first layer 1.
- an implant depth of the order of 300 to 600 nanometers can be obtained.
- the total dose in co-implantation thus typically represents 1/3 of the dose in implantation of a single species.
- the use of co-implantation will above all make it possible to obtain a post-detachment roughness less than the roughness obtained with a simple implantation of hydrogen or helium. This roughness is thus typically less than about 40A RMS, measured on a surface of
- a step of bonding a receiving plate 20 with the side of the donor plate 10 having undergone co-implantation is carried out.
- the receiving plate 20 can be made of solid Si or other materials.
- a bonding layer may be formed, such as a layer comprising Si0 2 , Si 3 N 4 , If x O y N z on one and / or the other of the respective surfaces to be bonded.
- the technique used to form this bonding layer may be a deposit, in order to avoid any deterioration of the stresses in the second layer 2 or any consequent diffusion in the first layer 1
- a preparation of the surfaces to be bonded can optionally be implemented, using known techniques of cleaning and surface preparation such as solutions SC1 and SC2, ozonated solutions, etc.
- Bonding as such can firstly be carried out by molecular adhesion, being able to take account of the hydrophilicity which each of the two surfaces to be bonded presents.
- We can also implement plasma activation of one or both bonding surfaces just before bonding. Plasma activation makes it possible in particular to create pendant bonds, for example on an oxide surface, on the treated surface or surfaces, and therefore increases the bonding forces to be produced and reduces the number of defects at the bonding interface 6, as well as their influence on the quality of the collage.
- Such reinforcement of the bonding interface 6 will also have the advantage of rendering, then this interface much more resistant to the chemical attack of a subsequent etching (implemented when the surface of the layer taken is finished) , and avoid delamination problems at the edge as previously discussed, which can typically occur for a bonding energy of less than about 0.8 J / m 2 .
- the plasma activation is implemented so that, after bonding and after sampling, the bonding energy is greater than or equal to about 0.8 J / m 2 .
- the plasma can for example be obtained from an inert gas, such as Ar or N 2 , or from an oxidizing gas, such as O 2 . Plasma activation is typically carried out at room temperature, below about 100 ° C.
- the use of this technique therefore also has the advantage of not causing significant problems of diffusion of Ge from the first layer 1 in SiGe to the second layer 2 in constrained Si (in general, the diffusion of Ge begins to be important in the thickness of the neighboring layers for much higher temperatures, typically of the order of 800 ° C. or more).
- the duration of the plasma treatment is very rapid, typically less than 1 minute.
- the equipment used will, for example, be standard plasma etching equipment of the RIE, ICP-RIE, or other type.
- an annealing heat treatment of less than 800 ° C. or less than a limit temperature from which it is considered that the diffusion of Ge in the neighboring layers becomes detrimental, may be implemented.
- thermal energy and / or mechanical energy sufficient to break the weak bonds at the level of the weakening zone 4, and thus to separate the donor plate 10 into a first part 10 ′ comprising a remainder of the first layer 1 ′′ and in a second part 30 comprising the other part of the first layer 1 ′ and the second layer 2.
- This thermal energy can then be sufficient to cause, at the level of the embrittlement zone 4, thermal effects on the gaseous species which are enclosed therein, causing the weak bonds to be broken.
- the separation can be obtained at temperatures between about 300 ° C and about 600 ° C for longer or shorter times depending on whether, respectively, the temperature is lower or higher.
- a heat treatment at a temperature of about 500 ° C for a period which can range from 15 to 30 minutes up to 2 hours.
- this can make it possible to carry out the separation without necessarily removing the contact with the remaining part of the donor plate 10 ′.
- a new heat treatment may be carried out directly following the separation, without removing the plates from the oven (in which the thermal separation treatment took place), and without carrying out additional manipulations which would represent a waste of time, and would require the use of appropriate equipment.
- the remaining part of the donor wafer 10 ' provides protection to the first and second layers 1' and 2 sampled against possible contaminants, oxidants, or other species, which offers the possibility of implementing the new heat treatment. in various atmospheres.
- a heat treatment can also quite be carried out after the plates have been physically separated (and removed from the detachment oven).
- a heat treatment for reinforcing the bonding interface 6 is implemented directly after the separation. This thermal treatment can be implemented in addition to or in replacement of the plasma activation possibly implemented before bonding (see above).
- this heat treatment is implemented in addition to the plasma activation, it will then be possible to ensure that the combined effects of these two treatments achieve the desired objectives, and in particular sufficient bonding energy to make the interface bonding 6 resistant to the chemical attack of a subsequent etching, and to then avoid delamination problems at the edge as previously discussed. It is thus possible to combine the two treatments for reinforcing the bonding interface 6 in order to obtain a bonding energy greater than or equal to approximately 0.8 J / m 2 . In all cases, the heat treatment for reinforcing the bonding interface 6 is carried out at a temperature T 2 chosen lower than the temperature from which the Ge diffuses in a non-negligible manner in the thickness of the second layer 2.
- This heat treatment is chosen so as to sufficiently strengthen the bonding to prevent any risk of delamination on the edge during the selective etching which will be implemented after removal.
- this heat treatment can be implemented so as to ultimately obtain a bonding energy greater than or equal to about 0.8 J / m 2 .
- the heat treatment for reinforcing the bonding interface 6 is carried out at a selected temperature T 2 of less than or equal to around 800 ° C.
- this heat treatment for reinforcing the bonding interface 6 is carried out at a temperature below the re-adhesion temperature from which the two parts V and 1 "of the first layer re-adhere (or re-join), the re-adhesion temperature being considered here, within the framework of the invention, and based on experiments carried out by the Applicant on SiGe, greater than about 800 ° C.
- the temperature T 2 is higher than the temperature Ti to which the plates 10 and 20 were subjected during the joining step.
- This heat treatment for strengthening the bonding is implemented in an inert atmosphere (such as an Ar or N 2 atmosphere), slightly oxidizing or oxidizing.
- the temperature T 2 can thus for example be between 350 ° C and 800 ° C, maintained for 30 minutes to 4 hours.
- the temperature T 2 can even more particularly be between 550 ° C. and 800 ° C., maintained for 30 minutes to 4 hours.
- a first step at about 500 ° C is reached and maintained for about 30 minutes in order to achieve ultimately a separation (at the arrow 1000), then a rise in temperature to about 600 ° C to carry out a heat treatment to reinforce the bonding interface 6 according to the invention (at the temperature level 2000).
- This heat treatment for reinforcing the bonding interface 6 could then last 2 hours or more.
- the separation is not carried out here during a temperature plateau but during a temperature rise to a temperature around 500 ° C. (at the level of arrow 1000 in the figure), then the level 2000 of the reinforcement temperature of the bonding interface 6 is reached at around 600 ° C.
- the Applicant has thus noticed that by implementing such a step of strengthening the bonding interface 6, in particular when it follows a co-implantation step, the layers removed then had: - an improvement in the crystalline quality of its damaged parts during implantation (with reference to FIG. 3b) and during decoupling (with reference to FIG. 3d);
- a structure 30 is obtained comprising the receiving plate 20, the second layer 2 and the remaining part of the first layer l ′.
- This structure 30 has an improved crystalline quality and a reduced roughness, without the need to carry out an intermediate polishing operation.
- a SiGe / sSOI or Ge / sSOI structure is then obtained.
- a finishing step is then implemented to remove the few slight roughness and the few crystal defects remaining on the surface, such as the implementation of chemical etching.
- etching using for example HF: H 2 0 2 : CH 3 COOH, SC1 (NH 4 OH / H 2 0 2 / H 2 0), or HNA (HF / HNO 3 / H 2 O).
- a selectivity of approximately 40: 1 between SiGe and sSi can be obtained with CH 3 COOH / H 2 0 2 / HF.
- concentration that can be chosen for the
- CH 3 COOH / H 2 O 2 / HF is such that there is an H 2 0 2 / HF ratio of between 1/1 (very concentrated) and 20/1.
- the etching time is directly correlated with the speed of the etching. It is typically around 5 minutes for 800A to be etched with CH 3 COOH / H 2 0 2 / HF.
- a structure 30 SiGeOI to 20% Ge (photographed by TEM) obtained by the Applicant upon transfer of a single layer of Si 0, 8 Ge 0 2 wherein the zone has been carried of embrittlement, and following a post-separation heat treatment at 600 ° C., shows a layer taken 1 of Sio, sGeo, 2 (ie. the equivalent of said first layer 1 and second layer 2 combined, discussed previously with reference to FIGS.
- a heat treatment may then be optionally implemented to further strengthen the bonding, and in particular by creating covalent bonds.
- This heat treatment for strengthening the bonding can here be carried out at a temperature above 800 ° C., given that there is no longer any SiGe or Ge in the structure 30, and therefore there is no longer any Diffusion problems of Ge (the rest of the first layer 1 'having been entirely removed).
- a subsequent crystalline growth step is used to thicken the second layer of constrained Si).
- the use of co-implantation can effectively lead to the formation of blisters at the bonding interface and defects in the thickness of the sampled layer.
- Particles or organic substances present on one and / or the other of the plates to be bonded can prevent bonding from being carried out satisfactorily in certain regions of the bonding interface.
- the implanted species can then diffuse in the regions of the bonding interface which are weakly bonded, forming blisters (or "blisters" according to English terminology) at the bonding interface.
- the energy of bonding may not be sufficient to allow detachment of the donor wafer.
- Certain zones of the sampled layer may thus not be transferred to the receiving package (these zones are commonly designated by the designation of "non-transferred zones” or ZNT).
- ZNT non-transferred zones
- crystalline defects of the nanocavity type having a diameter of a few nanometers
- These faults can result from agglomeration of Silicum or Germanium atoms displaced during implantation.
- these nanocavity type defects are observed in the thickness of the sampled layer.
- FIGS. 8a, 8b and 8c obtained from TEM photographs, a co-implantation of helium and hydrogen has thus been represented in a Si donor plate for the removal of a further layer. detachment heat treatment.
- FIG. 8a represents a view obtained by TEM of a Si donor plate having been subjected (cf. arrows) to a co-implantation of helium and hydrogen. The distribution of these species in the thickness of the donor plate is perceptible (dark points) in this figure 8a.
- FIG. 8c represents for its part (in reverse view with respect to FIG. 2) the layer removed after detachment and transfer to a receiving wafer.
- FIG. 8c we can observe the defective area near the surface, as well as the presence of defects (dark spots) in the thickness of the sampled layer.
- Each of the implanted species is distributed, in the thickness of the donor plate, according to a distribution profile having a spreading zone in which the species is mainly concentrated and has its maximum concentration peak.
- the distribution has a quasi-Gaussian profile presenting a standard deviation (defining said spreading zone in which the species is mainly distributed, for example in which there is 70% of the implanted species) and a maximum concentration peak which depend in particular on the implantation energy.
- Helium atoms diffuse in an Si matrix more easily than hydrogen atoms.
- One approach to overcome this problem is to implant helium deeper than hydrogen, so that the region containing the implanted hydrogen can block the diffusion of helium. More precisely, it involves controlling the co-location parameters so that the helium peak is located deeper than the hydrogen spreading zone.
- this solution is to precisely control the relative position of the helium and hydrogen peaks in the implanted donor wafer (the helium peak being located at the embrittlement zone and deeper than the hydrogen spreading zone), and to jointly control the dose of each of the species (the helium dose representing approximately 40% to 60% of the total dose).
- the helium dose representing approximately 40% to 60% of the total dose.
- a possible embodiment of the method according to the present invention thus consists: - in carrying out a co-implantation, typically of helium and hydrogen, in a layer of SiGe, according to implantation parameters suitable for shifting the concentration peaks helium and hydrogen, especially so that the helium peak is located deeper than the hydrogen spreading zone, but also so that the helium peak is located deeper than the embrittlement, - and to implement a post-separation thermal healing treatment at a temperature of the order of 600 ° C (+/- 25 ° C), which can be maintained for 30 minutes to four hours, for example for approximately one hour.
- the implantation parameters are adapted to "place" the helium peak at a depth approximately 1.2 times greater than the depth of the hydrogen peak.
- the helium dose is between 30% and 70% of the total dose (hydrogen + helium), preferably between 40% and 60% of the total dose.
- the total dose typically represents some 10 16 atoms / cm 2 , without this being limiting.
- FIG. 7 and 8 thus represent roughness measurements at high frequencies carried out by scanning respectively an area of 2 * 2 ⁇ m 2 and an area of 10 * 10 ⁇ m 2 using an AFM microscope.
- FIG. 9 represents roughness measurements at low frequencies carried out by profilometry using the Dektak® tool from the company Veeco Instruments Inc.
- roughness measurement results are shown, expressed on the left in average values (RMS) and on the right in maximum values (PV).
- RMS left in average values
- PV right in maximum values
- the results of measurements carried out following implantations in a layer of Si and in a layer of SiGe have been plotted (cf. FIG. 8 in which the columns relating respectively to Si and to SiGe are clearly distinguished).
- Si two platelets, subject to co-implantation
- He / H have been studied.
- the co-implantation parameters were as follows: H: 30kev-1.10 16 / cm 2 He: 52 or 60 keV - 1.010 16 / cm 2
- Figure 9 confirms the very interesting gain in terms of high frequency roughness linked to He / H co-implantation in comparison to H alone (and this either following a healing treatment at 500 ° C or 600 ° C).
- the Applicant has also carried out measurements aimed at ascertaining the number of defects (ZNT type, blisters) present in the different transferred layers. Macroscopic observation (in grazing light) makes it possible to detect defects of the ZNT type or blisters. We consider here the sum of these defects (ZNT + blisters) as being representative of the specific defects linked to implantation and observed post-detachment. A large number of defects are noted in the two variants He: 48keV and He: 52keV, that is to say the variants for which the distribution profile of helium is superimposed or almost superimposed with the profile of hydrogen. (the helium peak then being "inside" the hydrogen spreading zone).
- He 56 keV and He: 60 keV variants, that is to say the variants for which the peak of the helium distribution profile is located deeper than the hydrogen spreading zone.
- blister type defects are minimized during a deep implantation of helium (and this, in the case of a cure at 600 ° C., without the roughness being increased).
- the donor plate 10 comprises, before sampling, a first layer 1 in constrained Si, then a second layer 2 in Si ⁇ _ x Ge x and a third layer 3 in Si ⁇ . x Ge x which is located under the first layer 1.
- the embrittlement zone is then formed according to the invention under the second layer 2, for example in the third layer 3.
- a selective etching of the Si- ⁇ . x Ge x can then be implemented after detachment, in accordance with what has been seen previously, so as to ultimately produce a 30 SGOI structure (Strained-Silicon-On-Silicon Germanium- On-lnsulator structure, as shown in FIG.
- the first layer 1 in constrained Si plays the role here only of a stop layer protecting the second layer 2 in Si ⁇ _ x Ge x from the first chemical attack.
- the donor plate 10 comprises, before sampling, a multilayer structure comprising alternately first layers 1A, 1B, 1 C, 1 D, 1 E in S _ x Ge x (x ⁇ 0) and second layers 2A, 2B, 2C, 2D, 2E in constrained Si.
- a strained Si layer deposited at temperatures between about 450 ° C and 650 ° C on a growth support Sio, SGE 0, 2 may typically reach a thickness between about 30 nm and 60 nm without its constraints are relaxed in one way or another.
- T 2 is advantageously lower than the deposition temperature of the thick constrained layer in the case where no bonding layer has been provided.
- T 2 is advantageously lower than the deposition temperature of the thick constrained layer in the case where no bonding layer has been provided.
- a person skilled in the art can produce a final structure 30 AsGa on insulator, if he chooses a donor wafer 10 whose first layer 1 is made of Ge and the second layer 2 is in AsGa, if it implants (as described above) in the Ge of the first layer 1, if it then transfers the rest of the of Ge and the second layer 2 of AsGa on a receiving wafer 20 via an electrically insulating interface, and if it selectively removes the remainder 1 ′ of the Ge using the known selective etching techniques.
- One or more stop layers in AIGaN and / or in AIN may possibly have been provided in the GaN layer.
- selective etching comprising the removal of the GaN located above the barrier layer.
- a dry etching using a plasma gas comprising CH 2 , H 2 and possibly Ar can burn GaN more quickly than AIN.
- the barrier layer can then be removed to finally obtain a GaN layer having little surface roughness and good thickness homogeneity. It is also possible in the same way to adapt the method according to the invention to other layers taken from an alloy III-V or II-VI. It will also be possible to extend all of these materials to those comprising carbon in small quantities (approximately 5%) or dopants.
Abstract
Description
Claims
Priority Applications (4)
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JP2007501319A JP4876067B2 (ja) | 2004-03-05 | 2005-03-07 | 採取薄膜の品質改善処理方法 |
EP05737045A EP1721333A1 (fr) | 2004-03-05 | 2005-03-07 | Technique d'amelioration de la qualite d'une couche mince prelevee |
CN2005800141634A CN1950937B (zh) | 2004-03-05 | 2005-03-07 | 用于改善剥离薄层的质量的方法 |
US11/179,713 US7449394B2 (en) | 2004-03-05 | 2005-07-11 | Atomic implantation and thermal treatment of a semiconductor layer |
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FR0402340 | 2004-03-05 | ||
FR0402340A FR2867307B1 (fr) | 2004-03-05 | 2004-03-05 | Traitement thermique apres detachement smart-cut |
FR0409980 | 2004-09-21 | ||
FR0409980A FR2867310B1 (fr) | 2004-03-05 | 2004-09-21 | Technique d'amelioration de la qualite d'une couche mince prelevee |
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US11/059,122 Continuation-In-Part US7276428B2 (en) | 2004-03-05 | 2005-02-16 | Methods for forming a semiconductor structure |
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PCT/FR2005/000541 WO2005086226A1 (fr) | 2004-03-05 | 2005-03-07 | Traitement thermique d’amelioration de la qualite d’une couche mince prelevee |
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US (2) | US7276428B2 (fr) |
EP (2) | EP1721333A1 (fr) |
JP (2) | JP4876067B2 (fr) |
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FR (1) | FR2867310B1 (fr) |
WO (2) | WO2005086227A1 (fr) |
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CN100446182C (zh) * | 2006-01-23 | 2008-12-24 | 硅绝缘体技术有限公司 | 具有改进电特性的复合基片的制造方法 |
KR100878060B1 (ko) * | 2006-01-23 | 2009-01-14 | 에스오아이테크 실리콘 온 인슐레이터 테크놀로지스 | 개선된 전기적 특성들을 갖는 복합물 기판의 제조방법 |
KR100878061B1 (ko) | 2006-01-23 | 2009-01-14 | 에스오아이테크 실리콘 온 인슐레이터 테크놀로지스 | 복합물 기판의 제조방법 |
US7405136B2 (en) | 2006-03-14 | 2008-07-29 | S.O.I.Tec Silicon On Insulator Technologies | Methods for manufacturing compound-material wafers and for recycling used donor substrates |
Also Published As
Publication number | Publication date |
---|---|
WO2005086227A8 (fr) | 2006-10-19 |
US20050245049A1 (en) | 2005-11-03 |
JP2007526645A (ja) | 2007-09-13 |
FR2867310A1 (fr) | 2005-09-09 |
WO2005086226A8 (fr) | 2006-10-26 |
EP1721333A1 (fr) | 2006-11-15 |
KR20070085086A (ko) | 2007-08-27 |
JP4876067B2 (ja) | 2012-02-15 |
US20050196937A1 (en) | 2005-09-08 |
WO2005086226A1 (fr) | 2005-09-15 |
US7449394B2 (en) | 2008-11-11 |
US7276428B2 (en) | 2007-10-02 |
KR100860271B1 (ko) | 2008-09-25 |
EP1733423A1 (fr) | 2006-12-20 |
JP2007526644A (ja) | 2007-09-13 |
FR2867310B1 (fr) | 2006-05-26 |
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