WO2006011994A2

WO2006011994A2 - System for emulating wang vs programs

Info

Publication number: WO2006011994A2
Application number: PCT/US2005/021026
Authority: WO
Inventors: James Joseph Donoghue
Original assignee: Transvirtual Systems, Llc
Priority date: 2004-06-26
Filing date: 2005-06-14
Publication date: 2006-02-02
Also published as: TW200602887A; WO2006011994A3

Abstract

A computer system (10) for executing Wang VS programs (28) without a Wang VS hardware systemincludes a host computer system (12), a Wang VS software system (22) and a hardware abstraction layer program (20). The host computer system (12) is independent of any Wang VS hardware system components. The Wang VS software system (22) includes at lead; a Wang VS operating system (24) stored in host memory (18). A hardware abstraction layer program (20) is functionally interposed between the Wang VS software system (22) and the host computer system (12) such that all machine instructions of the Wang VSsoftware system (22) are first processed by the hardware abstraction layer program (20) before communicating with the host computer system (12).

Description

SYSTEM AND METHOD FOR EXECUTING WANG VS PROGRAMS WITHOUT WANG VS HARDWARE

TECHNICAL FIELD

This invention relates to emulators, and more specifically to a system and method for executing programs without Wang VS hardware previously dependent on and run on a Wang VS mainframe computer system.

BACKGROUND OF THE INVENTION

Emulators are known in the art relating to computer systems . Emulators are programs or devices that have been devised to imitate other programs or devices. However, none have been devised or implemented to emulate the Wang VS family of computer systems in such a way that all Wang VS software, including at least the VS operating system, may be executed completely unmodified.

A few attempts have been made to create application binary interface (ABI) emulators for the Wang VS system. However, by their nature they were necessarily incomplete and incapable of running all Wang VS software, and none have been capable of fully running a complete unmodified Wang VS operating system.

The Wang Laboratories, Inc. VS is a family of 32-bit mainframe computers spanning at least 25 years and 14 processor generations since 1977. Since the late 1980s the Wang VS system has been in decline from a high water mark of 30,000 systems operating worldwide. A total of about 65,000 Wang VS systems has been manufactured since the release of the initial VS80 system in 1977.

The Wang VS system was initially patterned strongly after the IBM 360 in instruction set and some aspects of the IBM 360 's memory addressing model. Later the Wang VS system evolved to incorporate some features of the IBM 370. The Wang VS system gained popularity due to its robustly interactive operating system, support of multiple programming languages, ease of programming and ease of operation.

However, the Wang VS operating system shared little with the IBM 360/370 operating systems other than some very broad concepts common to data processing systems as they had evolved by the late 1970s and into the 1980s. The Wang VS system hardware supported from its inception such advanced features as virtual memory, push-down stacks, stack frames and recursive procedures, things not generally found in early IBM 360 architectures. Moreover, Wang's implementation of popular high-level compiler languages such as BASIC and COBOL usually contained advanced extensions that enhanced the value of the Wang versions of such compilers.

For a variety of reasons the Wang VS system became unsustainable, beginning visibly in the late 1980s. Its price and performance had not kept pace with the industry. Even though Wang introduced a smaller form factor and CPU design of the VS in 1988, both the large and the small VS models were committed to legacy hardware designs that made it difficult or impossible to remain competitive. Throughout the 1990s and into the new century, customers have been abandoning the Wang VS system in favor of less expensive, more reliable solutions that have brighter prospects for maintainability and upgradeability.

However, such abandonment has often come at a high price in terms of software conversion costs, software replacement cost, and loss of sunk investment in mature Wang VS application software. Additionally, users are being compelled to accept lower levels of application functionality, ease of use and/or maintainability. Moreover, many Wang VS systems remain in operation, but with almost all of them suffering from the effects of the general decline of the Wang VS market and concomitant reductions in new options, upgrades and maintenance service levels.

There is a need, therefore, to be able to run unmodified Wang VS system software, including at least a Wang VS operating system, on other computers without the use of Wang VS hardware. Such other computers may include, but would not be limited to, relatively inexpensive, fast, chip-based production computers such as those based on Intel x86, IBM Power/PowerPC or IBM/Apple PowerPC. Additionally, there is a need to run Wang VS software independent of Wang VS hardware on other more current high- performance production computers such as the IBM S/390.

SUMMARY OF THE INVENTION

The present invention provides a computer system for executing Wang VS programs without a Wang VS hardware system. The present invention provides a unique series of computer systems capable of running, unmodified, virtually all Wang VS software. In doing so, the present invention offers users of Wang VS systems a substantial and new opportunity to continue the use of their Wang VS applications in a more maintainable, scalable, and reliable environment.

In an exemplary embodiment of the present invention, the computer system includes a host computer system, a Wang VS software system and a hardware abstraction layer program. The host computer system is independent of any Wang VS hardware system components. The host computer system has a host system processor, a host input-output system, a host memory, and a host bus system interconnecting the system processor, the input- output system and the memory. The Wang VS software system includes at least a Wang VS operating system stored in the host memory. The Wang VS software system has machine instructions designed to execute specific functions. The hardware abstraction layer program is stored in the host memory. The hardware abstraction layer program is functionally interposed between the Wang VS software system and the host computer system such that all the machine instructions are first processed by the hardware abstraction layer program before communicating with the host computer system.

In another exemplary embodiment of the invention, the hardware abstraction layer program of the computer system acts to interpret and carry out all required machine instructions of the Wang VS software system to ^' enable execution of all the specific functions. In one such specific embodiment this is accomplished wherein the hardware abstraction layer program is an executable program for: reading the required machine instructions; interpreting the machine instructions; and executing the interpreted instructions to perform the functions .

In an alternative embodiment of the present invention, all the machine instructions of the computer system are first processed by the hardware abstraction layer program before communicating with other components of the computer system.

In another embodiment of the present invention, the host computer system includes a host operating system stored in the host memory.

These and other features and advantages of the invention will be more fully understood from the following detailed description of the invention taken together with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

FIG. 1 is a schematic block diagram of an exemplary embodiment of a computer system in accordance with the present invention; and

FIG. 2 is an exemplary block diagram of a typical ADD instruction in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 1, an exemplary embodiment of a schematic block diagram of a computer system in accordance with the present invention is shown generally at 10. The major components of the computer system 10 include a host computer system 12, a Wang VS software system 22 and a hardware abstraction layer program 20. The computer system 10 obviates the need for legacy Wang VS mainframe computer hardware. The computer system 10 combines the hardware abstraction layer 20 with the host computer system 12 in such a way that at least an operating system and optionally other programs of the Wang VS software system 22 may be moved unchanged from a Wang VS computer and executed independently of any Wang VS hardware.

The host computer system 12 has at least one host system processor 16, a host system memory 18, and at least one host input-output system 19, all of which are interconnected by one or more host bus systems 17. The host input-output system 19 may include a number of hardware elements such as a disk adapter/controller 90, a tape adapter/controller 92 and a network adapter/controller 94.

Optionally, a host operating system 14 may also be stored in the host memory 18. The host operating system 14 can also include additional software elements such as disk storage software 80, tape storage software 82 and network software 84.

The host system processor(s) 16, memory 18, input-output system(s) 19 and operating system 14 are also referred to as host system resources. In a preferred embodiment, the present invention utilizes a 3.6 GHz Pentium 4 processor, 2 GB of memory, SCSI and/or ATA disk subsystems, a 10/100 megabit/second network subsystem, a graphic video adapter, a monitor and a keyboard. However, it is within the scope of the invention that a wide range of viable host system resources may be used. Such host resources may include different types of processors, different speeds and complements of memory, different kinds and numbers and capacities of disk drives, and other system resources with no particular dependence on any one kind.

The Wang VS software system 22 is stored within the memory 18 of the host computer 12. More specifically, a portion of the host memory 18 is set aside for use by the hardware abstraction layer program 20 to emulate the physical memory of the Wang VS hardware. This portion is herein referred to as VS memory 21. All of the Wang VS software system 22 is contained within this emulated Wang VS physical memory 21 and updated as necessary.

The Wang VS software 22 includes at least a Wang VS operating system 24. The Wang VS operating system 24 may include many software components, such as . Initial Program Load (IPL) elements 44, SMD or SCSI disk storage support elements 46, DMS/XDMS file system support elements 48, SMD or SCSI tape storage support elements 50, workstation support elements 52, network support elements 54, telecommunication support elements 56 and Resource Sharing Facility (RSF) clustering support elements 58.

It is also within the scope of this invention that the Wang VS operating system 24 may include an equivalent substitute Wang VS operating system program indistinguishable from an original Wang VS operating system. Such an equivalent substitute could be implemented as Wang VS type software loadable in the same manner as the original Wang VS operation system or could be implemented as an element of the hardware abstraction layer 20.

The computer system 10 may be integrated with any applicable version of the Wang VS operating system 24 such that the combination constitutes a unique new data processing product distinct from the original line of Wang VS systems but capable of executing all the same system and application software as the original Wang VS systems. Alternatively, the computer system 10 may be integrated with an equivalent substitute version of the Wang VS operating system 24. Such an equivalent substitute Wang VS operating system 24 would operate such that all Wang VS application software 28 and other Wang VS software external to the Wang VS operating system 24 will execute unmodified in a manner consistent with how they would have executed on an original Wang VS computer system running an original Wang VS operating system.

The Wang VS software 22 may also include other software components such as Wang VS utility programs 26, various Wang VS application programs 28, linker programs 36, databases 38, procedure programs 40 and shared subroutine libraries 42. Additionally there may be a variety of translators 30 such as Wang VS compilers 32 or Wang VS assemblers 34. All components of the Wang VS software 22 communicate with each other through and by means of the hardware abstraction layer 20.

It is important to note that the Wang VS software system 22 is isolated from the rest of the computer system 10 by the hardware abstraction layer 20. That is, all machine instructions contained in or generated by the Wang VS software components, e.g., utility programs 26, application programs 28, translators 30 and the like, are first processed by the hardware abstraction layer 20, and only communicate indirectly with the other components of the computer system 10 after being processed through the hardware abstraction layer 20. The hardware abstraction layer program 20 is also stored within the memory 18 of the host computer 12. The hardware abstraction layer program 20 is functionally interposed between the Wang VS software system 22 and the host resource computer system 12 such that all Wang VS software 22 machine instructions are first processed by the hardware abstraction layer 20. More specifically, all the Wang VS machine instructions are examined by and acted on by the hardware abstraction layer program 20 to produce the same actions and changes in the Wang VS software system 22 and .various host computer 12 input-output devices as would happen in an actual Wang VS machine.

The hardware abstraction layer 20 includes specially crafted software that translates between the machine instructions of the Wang VS software system 22 and memory architecture of the host processor 16 and memory 18. The hardware abstraction layer 20 translates in a manner consistent with that in which the Wang VS machine instructions would execute and cause computational, data and input/output actions and results to occur in the Wang VS software 22 were the instructions and data operating in an original Wang VS computer system.

Within the hardware abstraction layer (HAL) software 20 are several sets of variables (places in the host system's memory 18 to store data) that represent attributes of a Wang VS CPU. These variables include the VS registers 74 and VS program control word (PCW) 76 used to perform operations on VS data and to control VS program execution. In the Wang VS software 22, addresses within programs can either represent physical locations within VS physical memory 21 or locations within a VS user's virtual address space. Virtual memory or virtual address as used herein, are "virtual" in the sense that the addressed memory area does not correspond to the same area of VS physical memory 21 by address. These virtual addresses must be translated to addresses within the VS physical memory 21 by the hardware abstraction layer program 20 in order to fetch or store data.

In addition, certain areas of VS memory 21 may be protected from being written to or read from by VS user programs. The translation of these addresses and enforcement of memory protections are performed by the address translation functions within the HAL 20. The result of the address translation is also retained for later use, allowing the lengthy address translation to be bypassed under certain circumstances. This allows VS instruction execution to take place in a shorter amount of time.

The PCW 76 contains the address of the next VS instruction to be executed. This address is used to retrieve the instruction from VS memory 21 through the address translation function. Once the instruction has been successfully retrieved it is decoded, and any other data that may need to be obtained from VS memory 21 is also retrieved through the address translation function. The VS instructions themselves are comprised of an operation code (opcode) and one or more operands. The opcode is used to select which HAL function will be used to process the instruction. This is accomplished by using the opcode itself as an index into a table of pointers to each instruction execution function. These functions are responsible for retrieving any additional VS data required by the instruction, performing operations on the VS data, and storing the results if necessary. In addition, the HAL instruction execution functions may also return a VS result code, which is stored in the PCW. Examples of this are results of arithmetic and logical instructions, such as whether the result was negative, positive, etc.

Referring to Fig. 2, for purposes of illustrating the above described execution process, an exemplary diagram of a VS ADD instruction is shown generally at 110. The ADD instruction 110 is 32 bits long and contains five fields 112, 114, 116, 118 and 120. Each field 112-120 occupies an associated bit position (as indicated by arrows 122) within the ADD instruction 110. These fields contain the opcode (5A) 112, destination register number (R) 114, two source register numbers (X and B) 116, 118, and a twelve bit displacement or index (D) 120. The fields 112-120 must be decoded in order to obtain the ADD instruction's 110 operands, and to determine where the result is to be stored.

The opcode for the ADD instruction 110 is stored in field 112 and is the hexadecimal number "5A" as shown. This value is used to index into the array of function pointers, as described above, and cause control within the HAL 20 to be passed to the function for the ADD instruction 110. Once the function has received control, it fetches the remainder of the instruction 110 from VS memory 21 using the address contained within the PCW 76.

The destination VS register 114 contains the addend to be added to, and will contain the result of the instruction 110 when it is completed. The source VS register fields 116, 118 contain numbers (X and B) that are added together, along with the twelve bit displacement (D) number contained in field 120, to form the VS address of the addend to be added to the addend in the destination VS register 114. This address is passed to the address translation function to retrieve the operand from VS memory 21. This operand is added to the operand in the destination VS register 114 using standard functions of the host system's CPU 16 to obtain the result.

The result is then examined to determine whether it is zero, less than zero, greater than zero, or whether the result caused the VS register 114 to overflow (the result was a number too large to be contained within the register 114) . This examination is used to set the VS Condition Code within the PCW 76.

Upon completion of the VS instruction emulation, the address in the PCW 76 is incremented by the length in bytes of the instruction 110, preparing it for the next instruction. Instructions are usually two, four, six or eight bytes in length. Once the emulation of the current VS instruction 110 is completed, control is returned to the main part of the HAL 20, which prepares for the execution of the next VS instruction.

It is also within the scope of this invention that the host operating system 14 be optionally replaced with additional elements added to the hardware abstraction layer 20, thus making the host operating system 14 optional. Moreover, other operating systems may be available and desirable for use on the host computer system 12. For example, open source operating systems, such as a type of Linux system, may be used.

The hardware abstraction layer 20 acts to read, interpret and execute all required machine instructions of the Wang VS software system 22. By drawing on system resources, the hardware abstraction layer 20 carries out all functions expected by the original Wang VS software system 22. Such functionality includes the performance of physical and virtual address translations in a manner transparent to the Wang VS machine instructions. Additionally, the hardware abstraction layer 20 runs unmodified all Wang VS software 22 that requires memory 18, processor 16, disk storage and workstation functionalities. Moreover, the hardware abstraction layer 20 may perform functionalities that require the use of other peripheral systems such as tape storage systems, telecommunication systems, networking systems and clustering systems.

The hardware abstraction layer 20 permits Wang VS machine instructions transparently to communicate with a variety of peripheral devices. Such peripheral devices include, but are not limited to, host computer disk storage devices 96, original Wang disk drives 98, host computer tape storage devices 100, and remote workstations or terminals 102. Such devices may be provided in the form of device emulators, which are resident and executing on other computer systems connected to the computer system 10. Such connections to the computer system 10 may be by means of network nodes 104, telecommunication links 106, and clustered nodes 108. The hardware abstraction layer 20 enables communication to these peripheral devices in a manner consistent with that in which the Wang VS machine instructions execute and cause computational, data and input/output actions and results to occur in the original Wang VS system.

Additionally, the hardware abstraction layer 20 may be designed to execute new VS-type instructions for which new Wang VS software 22 may be written or existing Wang VS software 22 may be modified. These capabilities can thus enable the utilization by Wang VS software 22 with any and all desired host system 12 resources and functionality in the form of new VS-like machine instructions. Accordingly, the computer system 10 would be capable of performing new types of computation and/or manipulation of data and/or input- output that never existed in the original Wang VS system.

Input-output functionality is implemented by- adding input-output hardware abstraction software elements to the hardware abstraction layer 20. Such software elements may include initial program load (IPL) software elements 60, SMD/SCSI disk storage input-output coprocessor (IOC) hardware abstraction software elements 62, SMD/SCSI tape storage IOC elements 64, workstation IOC elements 66, network IOC elements 68, telecommunication IOC elements 70, and RSF clustering IOC elements 72. Such elements use software to emulate Wang VS input-output coprocessor and other hardware, complying with the requirements of the Wang VS operating system 24 and/or the Wang VS software 22.

A special case involving input-output is initial program load. The IPL hardware abstraction software element 60 emulates the behavior of the firmware, microcode and hardware of an original Wang VS system to facilitate loading of an original or equivalent substitute Wang VS operating system 24 from a- host disk storage system 90. It is also within the scope of this invention that an IPL may alternatively be performed from a tape, network or other system of which an original Wang VS system was not capable of utilizing.

IOC hardware abstraction software elements 60-72 emulate the functionality of a Wang VS system IPL and input-output coprocessors (lOCs) with or without regard to Wang VS microcode. That is, the present embodiments of the invention make no use of Wang microcode. Rather, the hardware abstraction software elements 60-72 emulate the interface and behavior expected by the Wang VS software system 22 that normally communicates with such Wang VS hardware.

Alternatively, it is within the scope of the invention to accept Wang VS microcode in one or more IPL and/or IOC hardware abstraction software elements 60-72 from corresponding parts of the Wang VS operating system 24 and its corresponding parts 44-58. The microcode may be executed in another level of the hardware abstraction layer 20, designed to emulate one or more of the microprocessors used in the Wang VS IPL software element 60 and/or input-output hardware.

The SMD/SCSI IOC hardware abstraction software elements 62 and 64 emulate a Wang VS SMD or SCSI (small computer system interface) I/O coprocessor. This allows the host computer 12 to make use of the host system disk storage devices 96, Wang VS disk storage devices 98, host system tape storage devices 100, or the like, when the Wang VS software 22 being executed expects Wang SMD/SCSI disk or tape drives to be present and functional.

The serial workstation IOC hardware abstraction software element 66 emulates one or more types of Wang VS serial IOC and communicates with local or remote workstation/terminal emulators and printers 102 via TCP/IP. This overcomes the problem of the original Wang VS system being limited to approximately 2,000 feet of direct cable communication with its native workstations . This also obviates the need for any external gateway system to perform workstation communication over networks. The computer system 10 communicates via TCP/IP networks with workstation/terminal emulation and printer emulation software resident on the system 10 or on a remote system.

An embodiment of the hardware abstraction software element 64 is a legacy 9-track magnetic tape, originally connected to a Wang VS system by means of a Wang VS tape I/O coprocessor. This allows the ^"computer system 10 to make use of the host computer's 12 tape drives 100 when the Wang VS software 22 being executed expects Wang legacy magnetic tape devices such as Telex or Kennedy tape drives to be present and functional.

The network IOC hardware abstraction software element 68 emulates a Wang VS network interface, such as the 802.3 LAN controller, to provide communication with other network nodes 104. This overcomes the communication speed limitations of the existing Wang VS networking hardware, therefore allowing Wang VS networking software elements 54 to communicate with modern speed and protocols.

The telecommunication IOC hardware abstraction software element 70 emulates a Wang VS telecommunication IOC. This overcomes the transmission/reception speed limitations of the Wang VS telecommunication hardware, therefore enabling the Wang VS telecommunication support software 56 to communicate at modern speeds and protocols. Additionally, TC IOC element 70 may virtualize or encapsulate the transmission of the Wang VS telecommunications software 56 so that the transmission may be transported through modern packet networks transparently to the Wang VS software 22 and to any system at the other end of the link.

Clustering is vital to maintaining the scalability of Wang VS systems. Called "Resource Sharing Facility (RSF) " in the Wang VS, clustering permits users and programs on one Wang VS system to use certain types of resources on one or more other Wang VS systems, such as logical disk volumes, logon facilities, print queue and job queue. Clustering also provides the infrastructure for databases to be distributed over the nodes of an RSF cluster. The RSF IOC hardware abstraction software element 72 emulates a Wang VS resource sharing facility (RSF) IOC, which is used by Wang VS RSF software support element 58 in clustering groups of Wang VS systems. This enables executing Wang VS programs on computer system 10 to perform clustering functions previously available only with Wang VS RSF hardware.

The hardware abstraction layer 20 and its integration with one or more modern host computer systems 12 creates a substantially new and unique class of VS computer systems that is not dependent on any traditional Wang VS hardware. In doing so the invention uniquely makes possible an entirely new hardware/software platform to replace the legacy Wang VS hardware. Additionally, this new class of VS computer system preserves the value represented in numerous Wang VS operating systems, applications software and utility software.

Although the invention has been described by reference to a specific embodiment, it should be understood that numerous changes may be made within the spirit and scope of the inventive concepts described. Accordingly, it is intended that the invention not be limited to the described embodiment, but that it have the full scope defined by the language of the following claims.

Claims

CLAIMSWhat is claimed is:

1. A computer system for executing Wang VS programs without a Wang VS hardware system, the computer system comprising: a host computer system being independent of any Wang VS hardware system components, said host computer system having: a host system processor, a host input-output system, a host memory, and a host bus system interconnecting said system processor, said input-output system and said memory,- a Wang VS software system including at least a Wang VS operating system stored in said host memory, said Wang VS software system having machine instructions designed to execute specific functions; and a hardware abstraction layer program stored in said host memory, said hardware abstraction layer program being functionally interposed between said Wang VS software system and said host computer system such that all said machine instructions are first processed by said hardware abstraction layer program before communicating with said host computer system.

2. The computer system of claim 1 wherein said hardware abstraction layer program interprets and carries out all required machine instructions of said Wang VS software system to enable execution of all said specific functions.

3. The computer system of claim 1 wherein said hardware abstraction layer program is an executable program for: reading said required machine instructions; interpreting said machine instructions; and executing said interpreted instructions to perform said functions.

4. The computer system of claim 1 wherein all said machine instructions are first processed by said hardware abstraction layer program before communicating with other components of said computer system.

5. The computer system of claim 1 wherein said host computer system includes a host operating system stored in said host memory.

6. The computer system of claim 5 wherein said host operating system is a component of said hardware abstraction layer program.

7. The computer system of claim 1 wherein said Wang VS operating system is an equivalent substitute Wang VS operating system functionally indistinguishable from an original Wang VS operating system.

8. The computer system of claim 7 wherein said equivalent substitute Wang VS operating system is an element of said hardware abstraction layer.

9. The computer system of claim 5 wherein said hardware abstraction layer program includes at least one of an initial program load element, a disk storage IOC element, a tape storage IOC element, a workstation IOC element, a network IOC software, a telecommunication IOC element, and an RSF clustering IOC element.

10. The computer system of claim 9 wherein said host operating system includes at least one of a disk storage element, a tape storage element and a network element.

11. The computer system of claim 10 wherein said Wang VS operating system includes at least one of an initial program load element, a disk storage support element, a file system support element, a tape storage support element, a workstation support element, a network support element, a telecommunications support element, and an RSF clustering support element .

12. The computer system of claim 11 wherein said Wang VS software system includes at least one of a utility program, a translator program, a linker program, a database program, a procedure program and a shared subroutine library program.

13. The computer system of claim 12 wherein said host input-output system includes at least one of a disk adapter/controller program, a tape adapter/controller program and a network adapter/controller program.

14. The computer system of claim 13 wherein said hardware abstraction layer permits said machine instructions to communicate transparently with a peripheral device.

15. The computer system of claim 14 wherein said peripheral device includes at least one of a host computer disk storage device, an original Wang VS disk drive, a host computer tape storage device and a remote work station.

16. The computer system of claim 14 wherein said initial program load element of said hardware abstraction layer program emulates behavior of firmware, microcode and hardware of an^' original Wang VS system to facilitate loading of said Wang VS operating system from said host computer peripheral device.

17. The computer system of claim 16 wherein said initial program load element emulates functionality of said original Wang VS system without the use of said Wang VS microcode.

18. The computer system of claim 1 comprising an emulated Wang VS memory stored in said host memory, said Wang VS software system being stored in said emulated Wang VS memory.

19. The computer system of claim 18 wherein said emulated Wang VS memory is used by said hardware abstraction layer to emulate physical memory of a Wang VS hardware system.

20. A computer system for executing Wang VS programs without a Wang VS hardware system, the computer system comprising: a host computer system being independent of any Wang VS hardware system components, said host computer system having: a host system processor, a host input-output system, a host memory, a host operating system and a host bus system interconnecting said system processor, said input-output system, said memory and said host operating system; a Wang VS software system including at least a Wang VS operating system stored in said host memory, said Wang VS software system having machine instructions designed to execute specific functions; and a hardware abstraction layer program stored in said host memory, said hardware abstraction layer program being functionally interposed between said Wang VS software system and said host computer system such that all said machine instructions are first processed by said hardware abstraction layer program before communicating with said host computer system, said hardware abstraction layer being executable for: reading said required machine instructions; interpreting said machine instructions; and executing said interpreted instructions to perform said functions.

21. The computer system of claim 20 wherein all said machine instructions are first processed by said hardware abstraction layer program before communicating with other components of said computer system.

22. The computer system of claim 20 wherein said host operating system is a component of said hardware abstraction layer program.

23. The computer system of claim 20 wherein said Wang VS operating system is an equivalent substitute Wang VS operating system functionally indistinguishable from an original Wang VS operating system.

24. The computer system of claim 23 wherein said equivalent substitute Wang VS operating system is a component of said hardware abstraction layer.

25. The computer system of claim 20 comprising an emulated Wang VS memory stored in said host memory, said Wang VS software system being stored in said emulated Wang VS memory.

26. The computer system of claim 25 wherein said emulated Wang VS memory is used by said hardware abstraction layer to emulate physical memory of a Wang VS hardware system.

27. A computer system for .executing Wang VS programs without a Wang VS hardware system, the computer system comprising: a host computer system being independent of any Wang VS hardware system components, said host computer system having: a host system processor, a host input-output system, a host memory, and a host bus system interconnecting said system processor, said input-output system and said memory; an emulated Wang VS memory stored in said host memory; a Wang VS software system including at least a Wang VS operating system stored in said emulated Wang VS memory, said Wang VS software system having machine instructions designed to execute specific functions; and a hardware abstraction layer program stored in said host memory, said hardware abstraction layer program being functionally interposed between said Wang VS software system and said host computer system such that all said machine instructions are first processed by said hardware abstraction layer program before communicating with said host computer system.

28. The computer system of claim 27 wherein said emulated Wang VS memory is used by said hardware abstraction layer to emulate physical memory of a Wang VS hardware system.

2/2

FIG. 2