WO2006041730A3 - Method and system for a programming approach for a nonvolatile electronic device - Google Patents

Method and system for a programming approach for a nonvolatile electronic device Download PDF

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Publication number
WO2006041730A3
WO2006041730A3 PCT/US2005/035296 US2005035296W WO2006041730A3 WO 2006041730 A3 WO2006041730 A3 WO 2006041730A3 US 2005035296 W US2005035296 W US 2005035296W WO 2006041730 A3 WO2006041730 A3 WO 2006041730A3
Authority
WO
WIPO (PCT)
Prior art keywords
electronic device
programming
reference voltage
nonvolatile electronic
initial
Prior art date
Application number
PCT/US2005/035296
Other languages
French (fr)
Other versions
WO2006041730A2 (en
Inventor
Stefano Surico
Simone Bartoli
Caser Fabio Tassan
Monica Marziani
Original Assignee
Atmel Corp
Stefano Surico
Simone Bartoli
Caser Fabio Tassan
Monica Marziani
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from IT001904A external-priority patent/ITMI20041904A1/en
Application filed by Atmel Corp, Stefano Surico, Simone Bartoli, Caser Fabio Tassan, Monica Marziani filed Critical Atmel Corp
Publication of WO2006041730A2 publication Critical patent/WO2006041730A2/en
Publication of WO2006041730A3 publication Critical patent/WO2006041730A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/563—Multilevel memory reading aspects
    • G11C2211/5634—Reference cells

Abstract

Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or more subsequent verify steps in the programming algorithm with a second type of reference voltage value. Further included is utilizing a read reference voltage for the initial verify step, wherein desired programming is ensured for a cell that falls out of ideal distribution.
PCT/US2005/035296 2004-10-07 2005-09-30 Method and system for a programming approach for a nonvolatile electronic device WO2006041730A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
IT001904A ITMI20041904A1 (en) 2004-10-07 2004-10-07 "METHOD AND SYSTEM FOR A PROGRAMMING APPROACH FOR A NON-VOLATILE ELECTRONIC DEVICE"
ITMI2004A001904 2004-10-07
US11/128,939 US7345921B2 (en) 2004-10-07 2005-05-12 Method and system for a programming approach for a nonvolatile electronic device
US11/128,939 2005-05-12

Publications (2)

Publication Number Publication Date
WO2006041730A2 WO2006041730A2 (en) 2006-04-20
WO2006041730A3 true WO2006041730A3 (en) 2006-08-17

Family

ID=36148805

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/035296 WO2006041730A2 (en) 2004-10-07 2005-09-30 Method and system for a programming approach for a nonvolatile electronic device

Country Status (1)

Country Link
WO (1) WO2006041730A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2944293B1 (en) 2009-04-10 2012-05-18 Saint Gobain Coating Solutions THERMAL PROJECTION DEVELOPING METHOD OF A TARGET
FR2944295B1 (en) 2009-04-10 2014-08-15 Saint Gobain Coating Solutions MOLYBDENE-BASED TARGET AND THERMAL PROJECTION DELIVERY METHOD OF A TARGET

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5509134A (en) * 1993-06-30 1996-04-16 Intel Corporation Method and apparatus for execution of operations in a flash memory array
US5757699A (en) * 1996-06-03 1998-05-26 Nec Corporation Programming which can make threshold voltages of programmed memory cells have a narrow distribution in a nonvolatile semiconductor memory
US20060028875A1 (en) * 2004-07-26 2006-02-09 M-Systems Flash Disk Pioneers, Ltd. Drift compensation in a flash memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5509134A (en) * 1993-06-30 1996-04-16 Intel Corporation Method and apparatus for execution of operations in a flash memory array
US5757699A (en) * 1996-06-03 1998-05-26 Nec Corporation Programming which can make threshold voltages of programmed memory cells have a narrow distribution in a nonvolatile semiconductor memory
US20060028875A1 (en) * 2004-07-26 2006-02-09 M-Systems Flash Disk Pioneers, Ltd. Drift compensation in a flash memory

Also Published As

Publication number Publication date
WO2006041730A2 (en) 2006-04-20

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