WO2006089272A3 - Selective deposition of embedded transient protection for printed circuit boards - Google Patents

Selective deposition of embedded transient protection for printed circuit boards Download PDF

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Publication number
WO2006089272A3
WO2006089272A3 PCT/US2006/005984 US2006005984W WO2006089272A3 WO 2006089272 A3 WO2006089272 A3 WO 2006089272A3 US 2006005984 W US2006005984 W US 2006005984W WO 2006089272 A3 WO2006089272 A3 WO 2006089272A3
Authority
WO
WIPO (PCT)
Prior art keywords
printed circuit
circuit boards
selective deposition
transient protection
embedded transient
Prior art date
Application number
PCT/US2006/005984
Other languages
French (fr)
Other versions
WO2006089272A2 (en
Inventor
George Dudnikov
Franz Gisin
Gregory Schroeder
Original Assignee
Sanmina Sci Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanmina Sci Corp filed Critical Sanmina Sci Corp
Priority to JP2007553397A priority Critical patent/JP2008533699A/en
Priority to CN200680004951.XA priority patent/CN101595769B/en
Publication of WO2006089272A2 publication Critical patent/WO2006089272A2/en
Publication of WO2006089272A3 publication Critical patent/WO2006089272A3/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257Overvoltage protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62Protection against overvoltage, e.g. fuses, shunts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257Overvoltage protection
    • H05K1/0259Electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/073High voltage adaptations
    • H05K2201/0738Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09309Core having two or more power planes; Capacitive laminate of two power planes

Abstract

Protection for sensitive components on a printed circuit board by selectively depositing transient protection material on one or more layers of the printed circuit board is disclosed.
PCT/US2006/005984 2005-02-16 2006-02-16 Selective deposition of embedded transient protection for printed circuit boards WO2006089272A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007553397A JP2008533699A (en) 2005-02-16 2006-02-16 Selective deposition of embedded transient protection for printed circuit boards
CN200680004951.XA CN101595769B (en) 2005-02-16 2006-02-16 Selective deposition of embedded transient protection for printed circuit boards

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US65372305P 2005-02-16 2005-02-16
US60/653,723 2005-02-16

Publications (2)

Publication Number Publication Date
WO2006089272A2 WO2006089272A2 (en) 2006-08-24
WO2006089272A3 true WO2006089272A3 (en) 2009-04-16

Family

ID=36917156

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2006/005984 WO2006089272A2 (en) 2005-02-16 2006-02-16 Selective deposition of embedded transient protection for printed circuit boards
PCT/US2006/005639 WO2007050114A2 (en) 2005-02-16 2006-02-16 A substantially continuous layer of embedded transient protection for printed circuit boards

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2006/005639 WO2007050114A2 (en) 2005-02-16 2006-02-16 A substantially continuous layer of embedded transient protection for printed circuit boards

Country Status (5)

Country Link
US (2) US7593203B2 (en)
JP (3) JP2008533699A (en)
CN (2) CN101595769B (en)
TW (2) TWI397356B (en)
WO (2) WO2006089272A2 (en)

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Also Published As

Publication number Publication date
JP2008533699A (en) 2008-08-21
CN101595769B (en) 2011-09-14
CN101595769A (en) 2009-12-02
CN101189365A (en) 2008-05-28
JP5588362B2 (en) 2014-09-10
TWI375494B (en) 2012-10-21
US20060181827A1 (en) 2006-08-17
WO2006089272A2 (en) 2006-08-24
JP2011109121A (en) 2011-06-02
US7593203B2 (en) 2009-09-22
WO2007050114A3 (en) 2007-12-21
US7688598B2 (en) 2010-03-30
TW200642548A (en) 2006-12-01
CN101189365B (en) 2015-09-16
JP5241238B2 (en) 2013-07-17
JP2008529309A (en) 2008-07-31
TW200642547A (en) 2006-12-01
US20060181826A1 (en) 2006-08-17
TWI397356B (en) 2013-05-21
WO2007050114A2 (en) 2007-05-03

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