WO2006112995A3 - Glass-based semiconductor on insulator structures and methods of making same - Google Patents

Glass-based semiconductor on insulator structures and methods of making same Download PDF

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Publication number
WO2006112995A3
WO2006112995A3 PCT/US2006/009410 US2006009410W WO2006112995A3 WO 2006112995 A3 WO2006112995 A3 WO 2006112995A3 US 2006009410 W US2006009410 W US 2006009410W WO 2006112995 A3 WO2006112995 A3 WO 2006112995A3
Authority
WO
WIPO (PCT)
Prior art keywords
methods
glass
based semiconductor
making same
insulator structures
Prior art date
Application number
PCT/US2006/009410
Other languages
French (fr)
Other versions
WO2006112995A2 (en
Inventor
Kishor P Gadkaree
Original Assignee
Corning Inc
Kishor P Gadkaree
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Corning Inc, Kishor P Gadkaree filed Critical Corning Inc
Publication of WO2006112995A2 publication Critical patent/WO2006112995A2/en
Publication of WO2006112995A3 publication Critical patent/WO2006112995A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249978—Voids specified as micro
    • Y10T428/24998—Composite has more than two layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249981—Plural void-containing components

Abstract

Methods and apparatus provide for: a semiconductor wafer; at least one porous layer in the semiconductor wafer; an epitaxial semiconductor layer directly or indirectly on the porous layer; and a glass substrate bonded to the epitaxial semiconductor layer via electrolysis.
PCT/US2006/009410 2005-04-13 2006-03-15 Glass-based semiconductor on insulator structures and methods of making same WO2006112995A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US67117705P 2005-04-13 2005-04-13
US60/671,177 2005-04-13
US11/159,889 US7410883B2 (en) 2005-04-13 2005-06-23 Glass-based semiconductor on insulator structures and methods of making same
US11/159,889 2005-06-23

Publications (2)

Publication Number Publication Date
WO2006112995A2 WO2006112995A2 (en) 2006-10-26
WO2006112995A3 true WO2006112995A3 (en) 2007-05-24

Family

ID=37109064

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/009410 WO2006112995A2 (en) 2005-04-13 2006-03-15 Glass-based semiconductor on insulator structures and methods of making same

Country Status (3)

Country Link
US (2) US7410883B2 (en)
TW (1) TW200703461A (en)
WO (1) WO2006112995A2 (en)

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US7767541B2 (en) * 2005-10-26 2010-08-03 International Business Machines Corporation Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods
US7691730B2 (en) 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator
KR20090028581A (en) * 2006-05-31 2009-03-18 코닝 인코포레이티드 Thin film photovoltaic structure and fabrication
US20070277874A1 (en) * 2006-05-31 2007-12-06 David Francis Dawson-Elli Thin film photovoltaic structure
US20070277875A1 (en) * 2006-05-31 2007-12-06 Kishor Purushottam Gadkaree Thin film photovoltaic structure
US20080070340A1 (en) * 2006-09-14 2008-03-20 Nicholas Francis Borrelli Image sensor using thin-film SOI
US7687360B2 (en) * 2006-12-22 2010-03-30 Spansion Llc Method of forming spaced-apart charge trapping stacks
EP2207910A1 (en) * 2007-08-31 2010-07-21 Faculdade de Ciencias da Universidade de Lisboa Method for the production of semiconductor ribbons from a gaseous feedstock
US8217498B2 (en) * 2007-10-18 2012-07-10 Corning Incorporated Gallium nitride semiconductor device on SOI and process for making same
KR101058105B1 (en) * 2009-04-06 2011-08-24 삼성모바일디스플레이주식회사 Method for manufacturing active matrix substrate and method for manufacturing organic light emitting display device
KR101127574B1 (en) * 2009-04-06 2012-03-23 삼성모바일디스플레이주식회사 Manufacturing methods of active matrix substrate and organic light emitting display device
DE102009042886A1 (en) 2009-09-24 2011-05-26 Schott Ag A method of manufacturing a solar cell or a transistor having a crystalline silicon thin film
KR101145074B1 (en) * 2010-07-02 2012-05-11 이상윤 Method for fabricating a semiconductor substrate and Method for fabricating a semiconductor device by using the same
US8921841B2 (en) * 2012-05-09 2014-12-30 Samsung Corning Precision Materials Co., Ltd. Porous glass substrate for displays and method of manufacturing the same
US20140264456A1 (en) * 2013-03-15 2014-09-18 Semiconductor Components Industries, Llc Method of forming a high electron mobility semiconductor device
US9327472B1 (en) * 2013-07-19 2016-05-03 Integrated Photovoltaics, Inc. Composite substrate
CN104779265B (en) 2014-01-14 2020-07-07 松下电器产业株式会社 Light emitting device
FR3024587B1 (en) * 2014-08-01 2018-01-26 Soitec METHOD FOR MANUFACTURING HIGHLY RESISTIVE STRUCTURE
CN105589587B (en) * 2014-10-21 2018-10-26 宸鸿科技(厦门)有限公司 Transparent composite substrate and preparation method and touch panel
CN105702725B (en) * 2014-11-27 2018-12-11 中国科学院微电子研究所 Semiconductor devices and its manufacturing method
CN105789301B (en) * 2014-12-25 2018-09-11 中国科学院微电子研究所 Fin formula field effect transistor, fin structure and its manufacturing method
US10032870B2 (en) * 2015-03-12 2018-07-24 Globalfoundries Inc. Low defect III-V semiconductor template on porous silicon
JP2020515033A (en) 2016-12-16 2020-05-21 エルファー エルエルシー Method for manufacturing and etching porous silicon carbide structures
WO2019047121A1 (en) * 2017-09-07 2019-03-14 苏州晶湛半导体有限公司 Substrate and manufacturing method therefor
DE102019108754A1 (en) * 2019-03-06 2020-09-10 Infineon Technologies Ag SEMICONDUCTOR DEVICE WITH A POROUS AREA, WAFER COMPOSITE STRUCTURE, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
US20230127556A1 (en) * 2021-10-22 2023-04-27 Infineon Technologies Ag Manufacturing and reuse of semiconductor substrates

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US6410436B2 (en) * 1999-03-26 2002-06-25 Canon Kabushiki Kaisha Method of cleaning porous body, and process for producing porous body, non-porous film or bonded substrate

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JP3257580B2 (en) * 1994-03-10 2002-02-18 キヤノン株式会社 Manufacturing method of semiconductor substrate
US6107213A (en) * 1996-02-01 2000-08-22 Sony Corporation Method for making thin film semiconductor
JP3381443B2 (en) * 1995-02-02 2003-02-24 ソニー株式会社 Method for separating semiconductor layer from substrate, method for manufacturing semiconductor device, and method for manufacturing SOI substrate
CN1132223C (en) * 1995-10-06 2003-12-24 佳能株式会社 Semiconductor substrate and producing method thereof
JP3250722B2 (en) * 1995-12-12 2002-01-28 キヤノン株式会社 Method and apparatus for manufacturing SOI substrate
SG55413A1 (en) * 1996-11-15 1998-12-21 Method Of Manufacturing Semico Method of manufacturing semiconductor article
US6143628A (en) * 1997-03-27 2000-11-07 Canon Kabushiki Kaisha Semiconductor substrate and method of manufacturing the same
US6376337B1 (en) * 1997-11-10 2002-04-23 Nanodynamics, Inc. Epitaxial SiOx barrier/insulation layer
EP0996145A3 (en) * 1998-09-04 2000-11-08 Canon Kabushiki Kaisha Process for producing semiconductor substrate
JP2001284622A (en) * 2000-03-31 2001-10-12 Canon Inc Method for manufacturing semiconductor member and method for manufacturing solar cell
JP2004134672A (en) * 2002-10-11 2004-04-30 Sony Corp Method and apparatus for manufacturing super-thin semiconductor device and super-thin backlighting type solid-state imaging device
US7176528B2 (en) * 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures

Patent Citations (1)

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US6410436B2 (en) * 1999-03-26 2002-06-25 Canon Kabushiki Kaisha Method of cleaning porous body, and process for producing porous body, non-porous film or bonded substrate

Also Published As

Publication number Publication date
TW200703461A (en) 2007-01-16
US20060234477A1 (en) 2006-10-19
US7410883B2 (en) 2008-08-12
US20080286539A1 (en) 2008-11-20
WO2006112995A2 (en) 2006-10-26

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