WO2006135261A3 - Nansoscale patterning and fabrication methods - Google Patents

Nansoscale patterning and fabrication methods Download PDF

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Publication number
WO2006135261A3
WO2006135261A3 PCT/NZ2006/000154 NZ2006000154W WO2006135261A3 WO 2006135261 A3 WO2006135261 A3 WO 2006135261A3 NZ 2006000154 W NZ2006000154 W NZ 2006000154W WO 2006135261 A3 WO2006135261 A3 WO 2006135261A3
Authority
WO
WIPO (PCT)
Prior art keywords
nansoscale
patterning
fabrication methods
substrate
nanoscale
Prior art date
Application number
PCT/NZ2006/000154
Other languages
French (fr)
Other versions
WO2006135261A2 (en
Inventor
James Gordon Partridge
David Michael Angus Mackenzie
Simon Anthony Brown
Original Assignee
Nano Cluster Devices Ltd
James Gordon Partridge
David Michael Angus Mackenzie
Simon Anthony Brown
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nano Cluster Devices Ltd, James Gordon Partridge, David Michael Angus Mackenzie, Simon Anthony Brown filed Critical Nano Cluster Devices Ltd
Publication of WO2006135261A2 publication Critical patent/WO2006135261A2/en
Publication of WO2006135261A3 publication Critical patent/WO2006135261A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • C23C14/32—Vacuum evaporation by explosion; by evaporation and subsequent ionisation of the vapours, e.g. ion-plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

Abstract

The invention disclosed relates to the formation of patterns on the surface of a substrate prepared by the deposition of clusters through a shadow-mask. In a preferred form the pattern is nanoscale and comprises an electrical connection between contacts on the substrate.
PCT/NZ2006/000154 2005-06-15 2006-06-15 Nansoscale patterning and fabrication methods WO2006135261A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NZ54079805 2005-06-15
NZ540798 2005-06-15

Publications (2)

Publication Number Publication Date
WO2006135261A2 WO2006135261A2 (en) 2006-12-21
WO2006135261A3 true WO2006135261A3 (en) 2007-02-22

Family

ID=37532716

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/NZ2006/000154 WO2006135261A2 (en) 2005-06-15 2006-06-15 Nansoscale patterning and fabrication methods

Country Status (1)

Country Link
WO (1) WO2006135261A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011017487A2 (en) 2009-08-05 2011-02-10 Cornell University Methods and apparatus for high-throughput formation of nano-scale arrays

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5868952A (en) * 1995-03-17 1999-02-09 Ebara Corporation Fabrication method with energy beam
US6313905B1 (en) * 1998-09-28 2001-11-06 International Business Machines Corporation Apparatus and method for defining a pattern on a substrate
US6610179B2 (en) * 2001-03-16 2003-08-26 David Alan Baldwin System and method for controlling deposition thickness using a mask with a shadow that varies with respect to a target
US20050017414A1 (en) * 2003-07-16 2005-01-27 Gurovich Boris Aronovich Method of forming a three-dimensional structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5868952A (en) * 1995-03-17 1999-02-09 Ebara Corporation Fabrication method with energy beam
US6313905B1 (en) * 1998-09-28 2001-11-06 International Business Machines Corporation Apparatus and method for defining a pattern on a substrate
US6610179B2 (en) * 2001-03-16 2003-08-26 David Alan Baldwin System and method for controlling deposition thickness using a mask with a shadow that varies with respect to a target
US20050017414A1 (en) * 2003-07-16 2005-01-27 Gurovich Boris Aronovich Method of forming a three-dimensional structure

Also Published As

Publication number Publication date
WO2006135261A2 (en) 2006-12-21

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