WO2007022538A3 - Test pads for measuring properties of a wafer - Google Patents
Test pads for measuring properties of a wafer Download PDFInfo
- Publication number
- WO2007022538A3 WO2007022538A3 PCT/US2006/032822 US2006032822W WO2007022538A3 WO 2007022538 A3 WO2007022538 A3 WO 2007022538A3 US 2006032822 W US2006032822 W US 2006032822W WO 2007022538 A3 WO2007022538 A3 WO 2007022538A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- test structure
- charge
- electrical properties
- test
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Test pads, methods, and systems for measuring properties of a wafer are provided. One test pad formed on a wafer includes a test structure configured such that one or more electrical properties of the test structure can be measured. The test pad also includes a conductive layer formed between the test structure and the wafer. The conductive layer prevents structures located under the test structure between the conductive layer and the wafer from affecting the one or more electrical properties of the test structure during measurement. One method for assessing plasma damage of a wafer includes measuring one or more electrical properties of a test structure formed on the wafer and determining an index characterizing the plasma damage of the test structure using the one or more electrical properties. In addition, systems and methods for controlling deposition of a charge on a wafer for measurement of one or more electrical properties of the wafer are provided. One system includes a corona source configured to deposit the charge on the wafer and a sensor configured to measure one or more conditions within the corona source. This system also includes a control subsystem configured to alter one or more parameters of the corona source based on the one or more conditions. Another system includes a corona source configured to deposit the charge on the wafer and a mixture of gases disposed within a discharge chamber of the corona source during the deposition of the charge. The mixture of gases alters one or more parameters of the charge deposited on the wafer.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US70973605P | 2005-08-19 | 2005-08-19 | |
US60/709,736 | 2005-08-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007022538A2 WO2007022538A2 (en) | 2007-02-22 |
WO2007022538A3 true WO2007022538A3 (en) | 2009-04-23 |
Family
ID=37758511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2006/032822 WO2007022538A2 (en) | 2005-08-19 | 2006-08-21 | Test pads for measuring properties of a wafer |
Country Status (2)
Country | Link |
---|---|
US (2) | US20070109003A1 (en) |
WO (1) | WO2007022538A2 (en) |
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Also Published As
Publication number | Publication date |
---|---|
US20070109003A1 (en) | 2007-05-17 |
US7893703B2 (en) | 2011-02-22 |
US20070069759A1 (en) | 2007-03-29 |
WO2007022538A2 (en) | 2007-02-22 |
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