WO2007034360A2 - Active matrix display devices and methods of driving the same - Google Patents

Abstract

An active matrix display device comprises an array of pixels arranged in rows and columns and a column driver circuit for providing pixel drive signals to the columns of pixels. The column driver circuit comprises an array of current source circuits, a respective current source circuit being provided for each column of pixels, and each current source circuit comprises a current source (70; 80; 90), an output driver (71), a storage capacitor (72) connected to the output of the output driver; and a supply switch (78) for controlling the time during which the current source supplies current to or drains current from the storage capacitor (72), thereby determining the output voltage of the output driver. The device further comprises a mapping means (86) for deriving from a pixel drive level a digital value which represents a time period for the control of the supply switch (78) of each current source circuit.

Description

Active matrix display devices and methods of driving the same

This invention relates to active matrix display devices, and particularly to display devices in which an alternative driving scheme is employed, for example Active- Matrix Liquid Crystal Displays (AMLCDs). The invention relates in particular to the integrated driver circuits for such devices.

AMLCDs consist of a large number of liquid crystal pixels, the voltage across which determines their transmittance of light. The pixels are arranged in columns and rows. AMLCDs have on-glass Thin-Film Transistors (TFTs) that form a switch between each LCD pixel and its corresponding column line. The gates of these TFTs are connected together horizontally, so that a gate driver IC can "enable" the rows in a sequential order. The time during which an individual row is selected is referred to as the line addressing time. During the line addressing time, a source driver IC applies voltages to the columns that correspond to the desired transmittance of each pixel in the selected row. Basically, each output of the source driver IC is a buffered DAC output. The basic concept of an AMLCD including gate and source driver IC is illustrated in Fig. 1 for a screen resolution of N rows and M columns with an n-bit color depth. This implies that each LC pixel can be driven to one out of 2ⁿ transmittance levels. As an example, the rows are driven sequentially from top to bottom. Alternative orders are possible depending on the applied scanning algorithm. When all rows have been addressed and all pixels have reached the desired transmittance level, a complete frame has been written and the selection of rows repeats for writing the next frame. Depending on the size/resolution of the LCD screen, several gate driver ICs and several source driver ICs are applied in practical realizations.

Strong demands are imposed on the accuracy of the voltage that is reached on each pixel at the end of each line addressing time. The achieved transmittance of the LCD pixel is determined by the voltage across the capacitance labeled 'LC in Fig. 1. The bottom plates of these LCD pixels are connected to the common electrode with potential V_COm. Non- idealities in the outputs of the source driver ICs, such as variations in output level between two adjacent columns with identical digital input, will lead to image artefacts and should be minimized. In most LCD screens, an additional capacitor is used in parallel to the LC liquid crystal pixel capacitance for stabilization of the pixel voltage. The bottom plate of this capacitor can be either connected to V_COm, a separate electrode or an adjacent row-line. This capacitor has been omitted in Fig. 1 for simplicity. A prerequisite for any LCD driving scheme is that each pixel is driven with an

AC signal. This means that when a pixel should have a certain transmittance corresponding to a voltage level V_greyievei, the source driver IC should address the pixel with a voltage of +V_greyievei during one frame and with a voltage of-V_greyievei during the next frame. This is commonly referred to as frame inversion. The transmittance of the LCD pixel is not sensitive to the sign of the applied voltage. In order to implement this in practical source driver ICs, a polarity signal is used in addition to the digital transmittance level signals to determine the sign of the analogue voltage at the outputs of the source driver IC. This signal will toggle between positive and negative from frame to frame for each pixel. Different sequences of polarities are used in each line in practical displays to reduce large area flicker of images. This is defined in the so-called inversion scheme. For example, for dot inversion, adjacent pixels have opposite polarities in the same frame. Any driving scheme applied to AMLCDs should ensure AC drive and allow various inversion schemes.

The translation of the desired transmittance of the LCD pixel into an output voltage of the source driver IC occurs through a so-called gamma curve. This gamma curve is highly non- linear. Since AC drive is required and the complete effective gamma curve is usually asymmetrical (for example caused by the asymmetric signal injection via the gate electrodes of the TFTs), separate gamma curves are used for positive and negative driver output voltages, respectively. In order to allow application of the source driver IC to various LCD screens, the gamma curves should be programmable in a practical device. A common way of implementing the DAC function in the source driver IC is by using resistor ladders and a selection matrix. Depending on the desired polarity of a pixel, which in conventional drive schemes is the opposite of the polarity in the previous frame, a tap is selected from the ladder implementing the positive gamma curve or the negative gamma curve. This is shown in Fig. 2 for one row and one column. As can be seen in Fig. 2, both the positive (20) and negative ladder (22) have

2ⁿ taps. These ladders are shared, i.e. they generate the reference voltages for all individual selection matrices. Each selection matrix (24) selects one of these levels from either the positive or negative ladder, so 2ⁿ⁺¹ lines are fed from the ladders to the selection matrix. In a practical IC implementation the ladders are placed centrally on the IC, whereas the 2ⁿ⁺¹ lines are fed over the entire IC, with one selection matrix being used for pairs of columns, because hardware can be shared between adjacent columns when they have opposite polarities (26).

In case of using the concept illustrated in Fig. 2, the color depth for the display is implemented in the voltage domain. This means that when the color depth is increased, the number of voltage levels is increased with a factor of 2 for each additional bit. As a consequence, the size of the selection matrices doubles for each extra bit. This is a disadvantage of this set-up.

An alternative is to place the color depth in the time domain. An example of this can be found in patent US 6,567,062. The basic structure of the patent is shown in Fig. 3. As mentioned before, an additional capacitor is used in parallel to each liquid crystal cell. A different pixel configuration is used and the gates are addressed with a data signal whose pulse-width is a function of the desired transmittance of the connected LC pixel. This implies that the TFTs are no longer necessarily switched on during the complete line addressing time. The common electrodes have been separated for each line, as opposed to one common electrode for all pixels, and are driven by the "scan-signal driving circuit" 30. This circuit scans the lines sequentially via signals VyI, Vy2, etc, offered to the isolated common electrodes. Each time a line is scanned, a corresponding "grey-scale voltage selecting circuit" 32 provides a ramp voltage on the drains of all TFTs in that line. This means that the TFT is now used to sample the correct voltage level on the liquid crystal cell by means of using the corresponding pulse-width for driving the gate of the TFT. Therefore, the voltage on the pixel tracks the ramp voltage until the TFT switch is opened by the pulse-width signal, after which the voltage remains stable until the new voltage is written in the next frame. Since the gamma curve is non- linear, the ramp voltage does not need to be a linear ramp, but can be any sort of curve. Fig. 4 shows a pixel circuit for using a ramp voltage, which is tracked by the pixel and then sampled. In series with the regular TFT (40), which conducts during the complete line addressing time, an additional TFT (42) is used to sample the wanted value of a ramp voltage on the pixel.

In the circuit of Fig. 5, the sampling switch has been moved into the source driver IC 50 in the form of a transmission gate 52 (NMOS and PMOS switches in parallel), because the additional sampling TFT in Fig. 4 leads to a decrease in light throughput when placed in each pixel and the TFT has poor performance compared to transistors realized in IC-technology silicon. However, the main idea remains the same. The pixel configuration is then the same as in Fig. 1. With the continuing drive towards increased color depths of AMLCDs of 10 bits and beyond, the silicon area of these source driver ICs tends to become unacceptably high using existing topologies/architectures and driving schemes, like the driving method using resistor ladders shown in Fig. 2. At the same time, especially for mobile displays with moderate color depths of 6-8 bits, there is a continuing drive to get cost down for LCD driver ICs, implying lower silicon area.

In resistor ladder layouts, the silicon area needed to implement a color depth of the LCD screen of n bits scales with 2ⁿ. This means that for each additional bit the number of resistor taps doubles, as do the number of switches in the selection matrices, each having a track connected to it that is routed over the entire IC. Since this is inherent to any driving architecture using resistor ladders, this architecture is fundamentally unsuitable for realization of low silicon-area driver ICs.

An additional disadvantage of using resistor ladders becomes apparent when multiple source driver ICs have to be cascaded for large LCD panels. In that case, some ladder taps of the cascaded ICs need to be connected from IC to IC to prevent voltage-level differences, which would lead to image artefacts. Especially when moving to Chip-on-Glass technology, which will lead to high-ohmic connections between ladders, the accuracy of the ladder-tap voltages could be compromised when the connection resistance becomes roughly the same as the ladder resistance. The prior art discussed above with reference to Figs. 3 to 5 shows ways to overcome these problems by realizing the color depth in the time domain. In this case, a voltage signal with a certain waveform is offered to each column that includes all values to which the column should be charged to cover all possible transmittance values of the addressed pixel. An example of such a waveform is a ramp voltage. For each additional bit, the density in the used time grid increases with a factor of two, but this can be realized in silicon without scaling the area with a factor of two. Moreover, since the translation of a digital transmittance level to an analogue source-driver output is achieved by a translation to a time-period value, which can be implemented in e.g. a digital look-up table (LUT), it is no longer necessary to transport multiple ladder taps from IC to IC in case of cascaded ICs. This also has a positive effect on the programmability of the gamma curves.

One disadvantage of the time domain driving schemes described above derives from the use of one ramp voltage which is offered to all columns simultaneously during each line addressing time. This means that in order to realize dot inversion, the ramp voltage should cover all negative and positive gamma voltages in one line addressing time. This has a negative effect on the required time resolution, since a factor of two more time points are needed compared to a voltage waveform that only covers either the negative or positive gamma curve.

Another disadvantage of using a single ramp voltage for all columns simultaneously is the fact that this signal now needs to be generated on a central point on the IC and then needs to be distributed to all columns. Due to the switching nature of the driver ICs in an LCD panel, the danger of coupling of unwanted disturbance signals onto the ramp is realistic. Moreover, the coupling of these disturbance signals to the individual column driver sections will not be equal. This is especially true since the source driver ICs have an exceptional width in practice. This means that the ramp voltages used in the individual column driver outputs will have different disturbance signals superimposed on them, which leads to a difference in column driver outputs, even with identical digital inputs.

According to the invention, there is provided an active matrix display device comprising: an array of pixels arranged in rows and columns; a column driver circuit for providing pixel drive signals to the columns of pixels, wherein the column driver circuit comprises an array of current source circuits, a respective current source circuit being provided for each column of pixels, wherein each current source circuit comprises:

- a current source;

- an output driver;

- a storage capacitor connected to the output of the output driver; and - means for controlling the time during which the current source supplies current to or drains current from the storage capacitor (72), thereby determining the output voltage of the output driver,

- and wherein the device further comprises a mapping means for deriving from a pixel drive level a digital value which represents a time period for the control of the supply switch of each current source circuit.

This arrangement provides a current source circuit for each column, and this facilitates the application of inversion patterns, as each column is controlled independently. The control signals that are needed by the current source circuits are timing control signals, rather than signals to be sampled. These control signals can easily be provided across a large area array without loss of information. The means for controlling the time is preferably a supply switch.

The use of an output driver enables the resulting drive voltage to be independent of the characteristics of the column of pixels, as the pixel column is not used to derive the drive voltage.

The mapping means preferably implements a single mapping function for use in providing the digital values for all current source circuits.

The conversion of pixel drive levels to values representing time is thus carried out in a shared manner, so that the required area is kept to a minimum. It is, nevertheless, possible to calibrate the individual current source circuits independently if required.

The control circuit preferably comprises a look-up table (LUT).

Each current source circuit may comprise a precharge switch for connecting the output driver output to a predetermined voltage. This defines the starting point from which each column voltage is charged (or discharged) by the current source circuit. The current source of each current source circuit may comprise a unipolar current source, and in this case, the reference voltage is below the lowest pixel drive voltage or above the highest pixel drive voltage.

Alternatively, the current source of each current source circuit can comprise a bidirectional current source, and in this case the reference voltage is between the lowest pixel drive voltage and the highest pixel drive voltage.

The current source of each current source circuit can supply or drain a constant current over time.

The invention also provides a method of driving the pixels of an active matrix display device comprising an array of pixels arranged in rows and columns, the method comprising: deriving a digital value representing a time period for each column from a pixel drive level for each column using a common mapping of pixel drive levels to digital values; driving an array of current source circuits, with a respective current source circuit for each column of pixels, each current source circuit being driven for the time value corresponding to the respective digital value; varying the output voltage of an output driver associated with the respective current source circuit using the current source circuit charge flow; and driving the pixels with the resulting output driver output voltage. Examples of the invention will now be described in detail with reference to the accompanying drawings, in which: Fig. 1 shows a known AMLCD screen with a resolution of N rows and M columns;

Fig. 2 shows the known use of resistor ladders to implement the DAC function in a source driver IC;

Fig. 3 shows a pixel configuration and driving circuit for a driving scheme of US 6,567,062;

Fig. 4 shows a block diagram of another known pixel arrangement; Fig. 5 shows a block diagram of another known pixel arrangement; Fig. 6 is used to explain the principles underlying a proposed drive scheme of the applicant; Fig. 7 is used to explain the principles underlying the drive scheme of the invention;

Fig. 8 shows a first detailed embodiment of the invention using a unipolar current source for each column;

Fig. 9 shows waveforms for explaining the operation of the circuit of Fig. 8; Fig. 10 shows a second detailed embodiment of the invention using a bipolar current source for each column;

Fig. 11 shows waveforms for explaining the operation of the circuit of Fig. 10; and

Figs. 12A and 12B show alternative ways to provide precharging.

The applicant has proposed (but not yet published) a column driver circuit in which a current source circuit is used to provide charge to each column for a selected time period. This time period gives rise to an amount of charge which in turn leads to a desired end voltage on the column. A look-up table (LUT) is shared by all columns, and individual counters are present at each column for the conversion of a digital value from the LUT to time. The current source circuits can, however, be individually calibrated. This provides efficient use of silicon area for the column driver circuit whilst enabling accurate control of the pixel brightness output. The principles of the operation of the circuit are explained with reference to Fig. 6, which shows in schematic form the manner in which columns of pixels are driven.

Fig. 6 shows a single current source circuit 60 (which functions as a column driver) having a current source 62 and a supply switch 64 for controlling the time during which the current source supplies current to or drains current from the column. The bidirectional current source 62 and switch 64 are of course merely a schematic representation of the function, and they may also be implemented by two unipolar current sources each having a switch. Furthermore, the switch function is not necessarily implemented as a series switch with the current source but can be implemented as part of the output interface of the current source. A digital value representing time is derived from a pixel drive level, and a common mapping is used for all columns in obtaining the digital values from the pixel drive levels. This digital data is converted locally into a time period using a local counter (not shown in Fig. 6).

Each column-driver 60 has to drive a capacitive load of column and pixel and the voltage value to which this load capacitance C_load must be driven corresponds to a certain amount of charge stored in C_load- By integrating the current source current output lin_t in this capacitor C_load during the predetermined amount of time tgr_ey, the desired voltage end value across the capacitor can be reached. Time t^_y depends on the desired transmittance level. The capacitor starts with a known charge due to a pre-charge (Pc) to a precharge voltage level Vp_re-_Ch_arg_e that is applied at the beginning of the line addressing time. Depending on the desired polarity of the voltage, the current source lin_t can either sink or source current, as shown schematically in Fig. 6.

A constant value current source is shown in Fig. 6, leading to a ramp voltage on the capacitor, as shown in the lower part of Fig. 6, both for charging and discharging the capacitance. The scheme is not, however, limited to a constant current.

The main advantage compared to the resistor-ladder architecture of Fig. 2 is that the color depth is not implemented in the voltage domain, which means that the silicon area does not scale with 2^N. Both I^_t and t^_y determine the charge on C_load- This means that color depth can be implemented in the current and/or time domain. For varying values of lin_t the voltage on C_load will have a different shape than shown in Fig. 6.

An additional advantage is that multiple ladder-tap voltages no longer need to be transported from IC to IC in case of cascaded ICs. Instead, a simple digital LUT can be used in each IC, translating the desired transmittance level of a pixel into a combination of lin_t and tgr_ey. This enhances the programmability of the gamma curves. The digital LUT may instead be provided off-chip as a central resource which provides functionality to all column driver ICs.

One current source is also used for each column, so that there is no common ramp signal. This means that dot inversion is possible in a simple way, since the current sources in two adjacent columns can flow in opposite directions, leading to a voltage curve covering positive gamma voltages in one column and a voltage curve covering negative gamma voltages in the adjacent column. In this way, half the time resolution is required for a given resolution of the gamma curve, giving rise to simpler implementation. Any inversion scheme can be implemented simply by defining the current direction per column. The problem of a common ramp voltage being fed over the complete large-width IC, which is susceptible to noise pick-up, also is avoided.

Instead of feeding a dynamic ramp signal across the IC, only a reference signal for proper definition of the current source value lin_t is fed across the IC. It is much simpler to shield such a reference DC value from external disturbances. This has a positive effect on the reduction of image artefacts.

Local calibration loops can be used to make sure that the voltage waveform spanning all gamma voltages, generated by integrating Ijn_t in the column and pixel capacitance C_load, reaches a single (or multiple) defined intermediate value(s) during the line addressing time. Local calibration loops can also be used for cases wherein the load capacitance seen at the individual driver outputs differs from the anticipated value. This calibration essentially involves adjusting the charge delivered at the output to ensure the correct column end voltage.

Sampling is done in the driver IC with the switch operated by tgr_ey in Fig. 6, and timing accuracy is easily implemented on the IC.

This drive scheme can be applied to a conventional LCD panel as shown in Fig. 1, with one common electrode. The approach can of course be applied to other active- matrix LCD panel configurations as well.

The current source 62 is used during a fixed amount of time tgr_ey. This means that even when the switch and column have series resistance (which is always the case), the correct amount of charge is fed to the column and pixel. This drive scheme requires only the value of the capacitance of column and pixel (C_load) to be known to achieve the correct transmittance of the pixel. With a known value of lin_t, the value of t^_y can be determined from the values of I_mt, C_load and the desired end voltage on the pixel V_end, which depends on the desired transmittance level via the non-linear gamma curve, according to: f _ C ^ load V* end (Λ \ ^lgrey ~ j ' \ ^l )

assuming a linear capacitor C_load- Q_oad represents the capacitive load of the column and addressed pixel as seen from the driver output, and this makes the method dependent on the characteristics of the connected LCD screen. This works well for LCD screens where this load capacitance can be described accurately enough in the system.

However, the capacitance of a liquid crystal is voltage-dependent, making it a non- linear device. Depending on how the LCD screen is constructed, the ratio between column capacitance and pixel capacitance, and on whether the column capacitance is nonlinear or linear, the capacitance C_load, which is the sum of the column and pixel capacitance, may also become voltage-dependent, i.e. a non- linear capacitance. In that case the numerator in equation (1) changes to the voltage-dependent charge on the load capacitance to obtain end voltage V_end, i-e. Q(Vend)- This possible non-linearity has to be taken into account in the lookup table determining the value for tgr_ey for each transmission level. In summary, the look-up table translates a desired transmittance level into a desired end voltage V_end via the non- linear gamma curve. Voltage V_end is in turn translated into a tgr_ey value, assuming a fixed and known value for I_mt, or into an integrated charge value I_mttgr_ey For the latter translation step, information on the screen characteristics in terms of the possibly voltage-dependent capacitive load is needed.

When the load capacitance as seen from the individual driver outputs shows too much variation across the LCD screen in practice, i.e. there is no single C_load value that represents the capacitive load for each individual driver output and each addressed pixel, additional calibration schemes can be used, and various calibration schemes have also been proposed by the applicant. These can ensure that the charge Wgrey, supplied by each individual driver output, is calibrated such that the corresponding end voltage value V_end on each individual load capacitance C_load is correct, even if C_load has a different value than anticipated in the system. When the performance, both in terms of screen resolution (number of rows and columns) and color depth (number of possible transmittance levels of a liquid crystal) increases, it may become increasingly complex to include an accurate description of C_load in the system. First of all, C_load may become increasingly non- linear, e.g. due to cross-talk problems, making it more elaborate to describe the relation Q(V_end) accurately in a look-up table. Secondly, the larger the LCD screen becomes, the higher the chance that variations in pixel capacitance occur all over the screen. Variations in temperature will increasingly induce variations in C_load across the increasingly large LCD screen. This may imply that C_load, as seen at a single driver output connected to a single column, may also become different for different addressed rows. The use of calibration schemes to address all of these issues becomes increasingly complex.

Fig. 7 shows the basic concept underlying the drive scheme of the invention. The driving method is made independent of the LCD screen characteristics by integrating the output current of a driver output in an on-chip capacitor Csi, instead of integrating charge on the column and pixel capacitance C_load- Since the capacitance Csi is realized on the driver IC, with close control over its value, the integration time tgr_ey can now be determined according to equation (1) without the need to include any information on the LCD screen characteristics, i.e. Csi replaces C_load- In fact, the output of the driver becomes a voltage with an end value V_end, which is the result of storing a charge Iinttgrey on the on-chip capacitor Csi. The actual column and pixel capacitance C_load, as seen at the driver output, now becomes irrelevant in the definition of the transmission level of the liquid crystal.

The circuit comprises a current source 70 and supply switch 78 for controlling the coupling of the current source 70 to an output driver 71. The output driver has a feedback path including a storage capacitor 72 (CsO ^{as we}U ^{as a} precharge switch 74 in parallel with the storage capacitor 74. The current source 70 is selectively coupled by the switch 78 to the inverting input of the output driver 71, and the non- inverting input is connected to a reference voltage Vr_ef. The output of the output driver is connected to the column, represented as the load capacitance C_load to the common electrode voltage V_COm. As shown in the timing diagram of Fig. 7, starting from a pre-charge (Pc) phase which results in Vref at the output driver output for the particular circuit shown, current lin_t is integrated in capacitor Csi during time period t^_y until the output driver output voltage reaches the desired end voltage value V_end- Various values of tgr_ey and V_end for different rows on the LCD screen have been shown for illustration purposes. Since the capacitor 72 can be made linear, the translation from the desired end voltage V_end to tgr_ey is also linear, according to equation (1), and under complete control of the driver IC, irrespective of the value of the column capacitance C_load. Only the translation of transmission level to end voltage remains non- linear and screen-dependent, according to the gamma curve. This latter translation step occurs for any LCD driving scheme. The dependency of the translation from V_end to tgr_ey on the non- linear screen characteristics is thus removed.

The pre-charge of the capacitor 72 is needed to start off from a known charge at the start of the integration time. The output driver circuit 71 ensures equal voltages at its non inverting '+' and inverting '-' inputs.

The capacitor can be precharged using a short-circuiting method, and the resulting output voltage Vc then starts from V_ref at the beginning of each line addressing time tun_e- This is the simplest pre-charging method, but other methods of pre-charging may also be used. In fact, the value of the charge to which the capacitor is pre-charged is irrelevant, as long as its value is defined.

Once the desired end voltage V_end is reached at the end of time period tgr_ey, the output voltage of the output driver is kept constant at value V_end- The polarity of the end voltage is determined by the direction of the current source, which can either sink or source current out of or into the capacitor 72. Which current direction is used depends on the polarity signal that is used to determine the voltage polarity of the addressed pixel. A constant current source lin_t has been assumed for simplicity, leading to a ramp voltage at the output driver output. Alternatively, current lin_t may be made variable during the line addressing time, for instance to implement part of the depth-depth/ transmission- level resolution. In fact, the charge on Csi (Iin_ttgr_ey) is the accuracy-determining variable, and the level-depth/transmission- level resolution can therefore be implemented both in the amplitude domain (Ijn_t) and in the time domain (tgr_ey).

The approach of the invention is to apply a voltage to the columns using output driver circuitry (for example in the form of a buffer circuit), rather than applying a current to the columns of the LCD screen. This use of an output driver circuit to provide a voltage to the columns of the display is essentially the same as existing voltage-addressed architectures. However, the approach of the invention provides all of the advantages outlined above in connection with Fig. 6. In particular, the circuitry of Fig. 7 does not scale with a factor 2 in silicon area for each additional bit in color depth.

The output driver 71 maintains its inputs at virtual ground. This means that rail-to-rail inputs are not required, which makes the output driver circuitry simpler than buffer circuitry used in voltage-addressing schemes. The output driver 71 can thus be realized in a smaller silicon area. The reference voltage V_ref may be chosen at a convenient level for optimum DC settings. Since the DC voltage at the '-' input of the output driver is at V_ref, it can be chosen such that the realization of the current source becomes as simple as possible, allowing enough voltage headroom.

In conventional voltage-addressing schemes, the buffers need to be able to handle all gamma voltages, both of the positive and negative gamma curve, and this requires the buffer input circuitry to be rail-to-rail.

The drive scheme of the invention again avoids the use of a common ramp signal, thereby enabling the implementation of any inversion scheme and local calibration loops.

The drive scheme of this invention is screen- independent and does not need any information on the column capacitance C_load as input for the system. This becomes beneficial when the screen performance and area/size increases, making it increasingly difficult to include accurate information on C_load in the system.

Local calibration can be implemented, for example, by calibrating the charge delivered to the storage capacitor Csi to compensate for the actual values of lin_t and Csi being different from the anticipated values. The value of C_load is irrelevant in this calibration process. Thus, the calibration is not aimed at adapting the driver-IC characteristics to the screen characteristics, but is instead aimed at overcoming matching problems on the integrated circuit.

Fig. 8 shows first possible embodiment of the invention using a unipolar current source 80 for each column. For simplicity, Fig. 8 shows a single column 82 and a single schematic pixel circuit 84 within the column. The switch 78 is controlled by a look-up table 86, and this look-up table may be shared between all column driver circuits.

As shown to the right of Fig. 8, the range of voltages to which the column must be driven is V_N,_O to Vp₎₀ , which are the required voltages for a black state for the two polarity schemes (for a 'normally- white' LCD screen). For a unipolar current source, the reference voltage (the starting voltage) must be at the boundary of, or outside, this voltage range.

The current source lin_t 80 is shown to flow in the upward direction as an illustration, leading to a rising voltage waveform at the output of the output driver 71 from Vr_ef to Vp₎₀. Assuming a constant value for 1^, a voltage ramp will occur at the output of the output driver circuit. Other embodiments where the current is variable, i.e. color depth resolution is placed both in the amplitude (lin_t) and time (tgr_ey) domain, can also be envisioned, as mentioned earlier. Of course, the current may also flow in the downward direction. The reference voltage should then be chosen greater than or equal to Vp₎₀ as indicated in the Figure. The integration time period tgr_ey is obtained from the look-up table 86 based on the desired transmittance information.

The look-up table 86 includes the entire gamma curve. The translation can be done based on a constant-cycle-time clock, or based on a variable-cycle-time clock. The reference voltage V_ref may be chosen for optimum DC settings of the circuits. When the pre-charge of the capacitor Csi is implemented by means of short- circuiting, as indicated in Fig. 8 for illustration purposes, the output of the output driver is also pre-charged to V_ref. With current lin_t flowing in the indicated direction, and a rising voltage waveform is obtained at the output driver output, the value of V_ref should be less than V_N,_O- In that case, the voltage waveform after pre-charge will include all gamma voltages ranging from V_N,_O to Vp₎₀. Other pre-charge schemes may also be used, as long as the capacitor starts with a defined charge and as long as the resulting voltage waveform at the output driver output includes all gamma voltages in the range. This allows more freedom in choosing V_ref. In the embodiment depicted in Fig. 8, the column and pixel are also pre- charged to Vr_ef, since the output driver output always remains connected to the column. This is, however, not necessary. By temporarily disconnecting the driver output from the column during pre-charge of Csi, other possible forms of pre-charging the column for power-saving or other reasons can also be used. There may even be no need to pre-charge the columns themselves. This is possible as the column capacitance is not used in the definition of the column voltage. The value of the column capacitance C_load and its initial charge are irrelevant, as the desired end voltage of the pixel is defined by integrating current in Csi, so that only Csi needs to be pre-charged.

The initial charge on C_load can be chosen to be able to reach the desired end voltage in time. Whether this is needed depends on the available line addressing time and the value of the load capacitance C_load-

Fig. 9 shows possible waveforms to clarify the idea.

For the purpose of explanation, a 10-μs line addressing time can be assumed. For realization of both the negative and positive gamma voltages during this time, both with a linear time grid resolution of 13 bits (to realize a non-linear resolution of 10 bits), 14 bits are needed to realize the total time grid. This implies a time grid of 600 ps, which is feasible with state-of-the-art IC processes used to implement the source driver IC.

The top plot in Fig. 9 shows the column voltage returning to the pre-charge voltage at the end of each line addressing time, and shows the column being charged to a voltage lying alternately in the two polarity ranges. The second plot in Fig. 9 shows the control of the precharge switch 74 (see Fig. 8), the third shows the control of the current source switch 78 (see Fig. 8), and the bottom plot shows a polarity control signal.

A possible embodiment with a bipolar current source is shown in Fig. 10. Similar considerations, concerning the choice of V_ref, implementation of pre-charge for Csi, and pre-charge of the columns apply for this embodiment. In the embodiment shown, the precharge has again been implemented by short-circuiting Csi, as before, which means that V_ref will appear at the output driver output during pre-charging. By choosing V_ref between the voltage values of the negative and positive gamma curves, e.g. equal to V_COm as indicated in the right hand part of Fig. 10, the voltage waveform at the output driver output will include all voltages between V_COm and V_N,_O for negative polarities and all voltages between V_COm and Vp₎₀ for positive polarities. Other embodiments achieving this with a bipolar current source can also be envisioned.

The main voltage waveforms for this embodiment are illustrated in Fig. 11, showing the same plots and desired transmittance levels as in Fig. 9.

There are a number of advantages of using a bipolar current source. The pre- charge level V_com, can be an intermediate level, in the middle between the negative and positive gamma curves. This is more efficient, especially for positive gamma voltages, since the capacitor no longer needs to be charged starting from voltage Vpre-charge lower than V_N,_O- Fig. 11 shows that the pre-charge is more efficient, since the variations in the column voltage are reduced.

A time grid that is a factor of two coarser compared to the time grid required for a unipolar source can now be used. Since the slopes of the ramps are less, the signals tgr_ey and/or the value of lint have also changed. The influence of variations of parameters on the performance of the driver circuit is also made equal for negative and positive gamma curves. This leads to less image flicker. Any error accumulates during time integration, so that the error is largest at the end of the line addressing time tun_e- In the case of a unipolar current source, the ramp has to run all the way from V_N,_O to Vp₎₀, and therefore the error is larger for the positive gamma curve than for the negative gamma curve. This can lead to undesired flicker, because of differences in transmittance levels for positive and negative frames. When a bipolar current source is used, this problem is overcome, since the errors for negative and positive gamma curve are the same. As mentioned above, individual calibration can be carried out, but this is not for compensation of column capacitance variations. The current lin_t must be integrated in Csi to reach a predetermined end voltage value, e.g. maximum black for each polarity. This voltage can then be compared to a reference voltage. The calibration loop can be implemented locally around the output driver circuit, enabling simple circuit implementation of this calibration scheme.

There are numerous further possible variations to the embodiments described above. Since the positive and negative gamma curve may differ, the LUT in the embodiments above can actually include two sub-LUTs, one implementing the negative gamma curve and one implementing the positive gamma curve. Which sub-LUT is used for a certain frame depends on the desired polarity, hence on the value of V_poi.

In addition to implementing the color depth in the time domain by defining the value of tgr_ey based on the desired transmittance, the value of the current source lin_t can also be made variable. In this way, any voltage waveform can be generated. The LUT is then used to translate the desired transmittance level into a combination of lin_t and tgr_ey. However, a single mapping operation can still be provided for all column driver current source circuits.

The charging capacitor does not have to be charged by a pure current source, and the current source can be implemented as a voltage source with a series impedance, providing the series resistance does not become dominant or significant compared to the load capacitance.

The output driver can be implemented with either low output impedance (for example an operational amplifier (opamp)) or with high output impedance (for example and operational transconductance amplifier (OTA)). The gain should be high enough to guarantee a virtual ground at the inverting input and a correct output voltage irrespective of the load impedance, when the load is within the expected range of possible output loads to be experienced in operation of the circuit. The output of the driver is a voltage, and the voltage level is determined by the current integration step. The output driver provides isolation between the pixel columns and the circuit providing the output drive level.

In the examples above, each current source circuit comprises a precharge switch for connecting the output driver output to the reference voltage, to define the starting point from which each column voltage is charged (or discharged) by the current source circuit. There are many alternative approaches. For example, the output driver output could be connected to the common voltage V_COm (in case the current source is bi-directional), with the non- inverting input of the output driver still at V_ref. In this case, the capacitor 72 (see Fig. 7) is not pre-charged to Q = 0 as in the examples above, but to Q = Csi(V_Com-V_ref). This approach can be implemented with a feedback loop including a voltage comparator. Essentially, the any pre-charge method can be used which sets the output voltage of the output driver to a pre-defined voltage, such that the capacitor is pre-charged. The use of a shorting switch across the capacitor, as shown in the detailed examples above, is merely one example, and which sets the starting point at V_ref.

Fig. 12 shows in simplified form two examples of alternative ways to provide precharging.

In Fig. 12 A, an operational amplifier is used in the feedback path as a voltage comparator. When the amplifier is turned on (for example using the bias currents), the reference voltage V_R results at the inverting input of the output driver 71, and a corresponding charge is held on the capacitor.

In Fig. 12B, an operational transconductance amplifier (OTA) is used in the feedback path. This delivers a current 120 to the capacitor until the output of the driver is at the common voltage Vcom supplied to the OTA.

In the examples above, a look up table is used for deriving time values from the pixel values. Mathematical expressions may instead be used for this purpose, for describing the non- linear relation between transmission level and voltage of a liquid crystal.

In the examples above, a supply switch is used to control the supply of current. This may be a part of the current source circuit itself, and other controlling means may be used.

The invention is of particular advantage for source driver ICs for AMLCD panels, and enables production of simple, small- silicon-area source drivers for displays with moderate color depths. The invention can also be used to realize higher color depths, without the dramatic increase in silicon area.

Various other modifications will be apparent to those skilled in the art.

Claims

CLAIMS:

1. An active matrix display device comprising: an array of pixels arranged in rows and columns; a column driver circuit for providing pixel drive signals to the columns of pixels, wherein the column driver circuit comprises an array of current source circuits, a respective current source circuit being provided for each column of pixels, wherein each current source circuit comprises:

- a current source (70; 80; 90);

- an output driver (71);

- a storage capacitor (72) connected to the output of the output driver; and - means (78) for controlling the time during which the current source supplies current to or drains current from the storage capacitor (72), thereby determining the output voltage of the output driver,

- and wherein the device further comprises a mapping means (86) for deriving from a pixel drive level a digital value which represents a time period for the control of the controlling means (78) of each current source circuit.

2. A device as claimed in claim 1, wherein the mapping means (86) implementing a single mapping function for use in providing the digital values for all current source circuits.

3. A device as claimed in claim 2, wherein the mapping means (86) comprises a look-up table.

4. A device as claimed in any preceding claim, wherein each current source circuit comprises a precharge switch (74) connected to the output of the output driver for connecting the output of the output driver to a predetermined voltage (V_ref).

5. A device as claimed in any preceding claim, wherein the current source of each current source circuit comprises a unipolar current source (80).

6. A device as claimed in claim 4 and 5, wherein the reference voltage (V_ref) is below the lowest pixel drive voltage or above the highest pixel drive voltage.

7. A device as claimed in any one of claims 1 to 4, wherein the current source of each current source circuit comprises a bidirectional current source (90).

8. A device as claimed in claims 4 and 7, wherein the reference voltage (V_ref) is between the lowest pixel drive voltage and the highest pixel drive voltage.

9. A device as claimed in any preceding claim, wherein the current source of each current source circuit supplies or drains a constant current over time.

10. A device as claimed in any one of claims 1 to 8, wherein the current source of each current source circuit supplies or drains a variable current over time.

11. A device as claimed in any preceding claim, comprising an active matrix liquid crystal display.

12. A device as claimed in claim 10, wherein the column driver circuit is adapted to apply a polarity inversion scheme.

13. A method of driving the pixels of an active matrix display device comprising an array of pixels arranged in rows and columns, the method comprising: - deriving a digital value representing a time period for each column from a pixel drive level for each column using a common mapping (86) of pixel drive levels to digital values; driving an array of current source circuits, with a respective current source circuit for each column of pixels, each current source circuit being driven for the time value (tgrey) corresponding to the respective digital value; varying the output voltage of an output driver associated with the respective current source circuit using the current source circuit charge flow; and driving the pixels with the resulting output driver output voltage.

14. A method as claim in claim 13, wherein deriving a digital value comprises addressing a look-up table (86).

15. A method as claimed in claim 13 or 14, further comprising, before driving the array of current source circuits, connecting the output of the output driver column to a predetermined voltage (V_ref).

16. A method as claimed in any one of claims 13 to 15, wherein driving the array of current source circuits comprising supplying or draining a constant current over time.

17. A method as claimed in any one of claims 13 to 15, wherein driving the array of current source circuits comprising supplying or draining a variable current over time.