WO2007053272A3 - Electrostatic discharge (esd) protection circuit for multiple power domain integrated circuit - Google Patents

Electrostatic discharge (esd) protection circuit for multiple power domain integrated circuit Download PDF

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Publication number
WO2007053272A3
WO2007053272A3 PCT/US2006/039647 US2006039647W WO2007053272A3 WO 2007053272 A3 WO2007053272 A3 WO 2007053272A3 US 2006039647 W US2006039647 W US 2006039647W WO 2007053272 A3 WO2007053272 A3 WO 2007053272A3
Authority
WO
WIPO (PCT)
Prior art keywords
power domain
cells
esd
integrated circuit
electrostatic discharge
Prior art date
Application number
PCT/US2006/039647
Other languages
French (fr)
Other versions
WO2007053272A2 (en
Inventor
Michael G Khazhinsky
Martin J Bayer
James W Miller
Bryan D Preble
Original Assignee
Freescale Semiconductor Inc
Michael G Khazhinsky
Martin J Bayer
James W Miller
Bryan D Preble
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=37995969&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2007053272(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Freescale Semiconductor Inc, Michael G Khazhinsky, Martin J Bayer, James W Miller, Bryan D Preble filed Critical Freescale Semiconductor Inc
Publication of WO2007053272A2 publication Critical patent/WO2007053272A2/en
Publication of WO2007053272A3 publication Critical patent/WO2007053272A3/en

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H02H9/046—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An integrated circuit (300/400) includes first and second power domains and a bank of input/output (I/O) cells (305/405) coupled to the first and second power domains. The bank of I/O cells (305/405) includes a first plurality of active clamps (374/445) for the first power domain and a second plurality of active clamps (384/425) for the second power domain wherein the first (374/445) and second (384/425) pluralities of active clamps overlap along the bank of I/O cells. According to one aspect each of the plurality of input/output cells (420, 440) has a bonding pad (421, 441) for receiving an output signal referenced to a respective first power domain, and at least one ESD protection element (425, 445) for a respective second power domain. According to another aspect, each of the plurality of input/output cells (420, 440) has a bonding pad (421, 441) for receiving a respective output signal and at least one ESD protection element for each of a first power domain and a second power domain.
PCT/US2006/039647 2005-11-01 2006-10-10 Electrostatic discharge (esd) protection circuit for multiple power domain integrated circuit WO2007053272A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/264,557 US7593202B2 (en) 2005-11-01 2005-11-01 Electrostatic discharge (ESD) protection circuit for multiple power domain integrated circuit
US11/264,557 2005-11-01

Publications (2)

Publication Number Publication Date
WO2007053272A2 WO2007053272A2 (en) 2007-05-10
WO2007053272A3 true WO2007053272A3 (en) 2009-04-23

Family

ID=37995969

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/039647 WO2007053272A2 (en) 2005-11-01 2006-10-10 Electrostatic discharge (esd) protection circuit for multiple power domain integrated circuit

Country Status (3)

Country Link
US (1) US7593202B2 (en)
TW (1) TWI425608B (en)
WO (1) WO2007053272A2 (en)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100532463B1 (en) * 2003-08-27 2005-12-01 삼성전자주식회사 Integrated circuit device having I/O electrostatic discharge protection cell with electrostatic discharge protection device and power clamp
US7791851B1 (en) 2006-01-24 2010-09-07 Cypress Semiconductor Corporation Cascode combination of low and high voltage transistors for electrostatic discharge circuit
US7385793B1 (en) * 2006-01-24 2008-06-10 Cypress Semiconductor Corporation Cascode active shunt gate oxide project during electrostatic discharge event
KR20080090725A (en) * 2007-04-05 2008-10-09 주식회사 하이닉스반도체 Electrostatic discharge protection circuit
US7656627B2 (en) * 2007-07-17 2010-02-02 Amazing Microelectronic Corp. ESD protection circuit with active triggering
US8089739B2 (en) * 2007-10-30 2012-01-03 Agere Systems Inc. Electrostatic discharge protection circuit
US7839016B2 (en) * 2007-12-13 2010-11-23 Arm Limited Maintaining output I/O signals within an integrated circuit with multiple power domains
US8373953B2 (en) * 2008-12-29 2013-02-12 Freescale Semiconductor, Inc. Distribution of electrostatic discharge (ESD) circuitry within an integrated circuit
US8238068B2 (en) * 2009-04-24 2012-08-07 Silicon Laboratories Inc. Electrical over-stress detection circuit
KR101047060B1 (en) 2009-12-28 2011-07-06 주식회사 하이닉스반도체 Data output circuit
US20110242712A1 (en) * 2010-04-01 2011-10-06 Fwu-Juh Huang Chip with esd protection function
US8861158B2 (en) * 2010-04-21 2014-10-14 Cypress Semiconductor Corporation ESD trigger for system level ESD events
US8879220B2 (en) * 2011-04-20 2014-11-04 United Microelectronics Corp. Electrostatic discharge protection circuit
JP2012253266A (en) * 2011-06-06 2012-12-20 Sony Corp Semiconductor integrated circuit
US9070700B2 (en) * 2011-11-04 2015-06-30 Broadcom Corporation Apparatus for electrostatic discharge protection and noise suppression in circuits
US9069924B2 (en) 2011-12-29 2015-06-30 Taiwan Semiconductor Manufacturing Co., Ltd. ESD protection circuit cell
US9362252B2 (en) 2013-03-13 2016-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus of ESD protection in stacked die semiconductor device
US9076656B2 (en) 2013-05-02 2015-07-07 Freescale Semiconductor, Inc. Electrostatic discharge (ESD) clamp circuit with high effective holding voltage
US9064938B2 (en) * 2013-05-30 2015-06-23 Freescale Semiconductor, Inc. I/O cell ESD system
US11211376B2 (en) * 2014-01-30 2021-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional integrated circuit having ESD protection circuit
US9478529B2 (en) 2014-05-28 2016-10-25 Freescale Semiconductor, Inc. Electrostatic discharge protection system
US9553446B2 (en) 2014-10-31 2017-01-24 Nxp Usa, Inc. Shared ESD circuitry
US10529702B2 (en) * 2014-11-05 2020-01-07 Texas Instruments Incorporated Method and circuitry for on-chip electro-static discharge protection scheme for low cost gate driver integrated circuit
US9871373B2 (en) 2015-03-27 2018-01-16 Analog Devices Global Electrical overstress recording and/or harvesting
US10557881B2 (en) 2015-03-27 2020-02-11 Analog Devices Global Electrical overstress reporting
CN107240585B (en) * 2016-03-29 2020-03-17 扬智科技股份有限公司 Circuit device with electrostatic protection function
US10338132B2 (en) 2016-04-19 2019-07-02 Analog Devices Global Wear-out monitor device
US10365322B2 (en) 2016-04-19 2019-07-30 Analog Devices Global Wear-out monitor device
US10074643B2 (en) * 2016-09-22 2018-09-11 Nxp Usa, Inc. Integrated circuit with protection from transient electrical stress events and method therefor
US11024525B2 (en) 2017-06-12 2021-06-01 Analog Devices International Unlimited Company Diffusion temperature shock monitor
US10763205B2 (en) * 2017-07-13 2020-09-01 Seagate Technology Llc Input/output cell wire connector
US10395733B2 (en) 2017-12-21 2019-08-27 Macronix International Co., Ltd. Forming structure and method for integrated circuit memory
US11056879B2 (en) * 2019-06-12 2021-07-06 Nxp Usa, Inc. Snapback clamps for ESD protection with voltage limited, centralized triggering scheme
EP4057463A4 (en) * 2019-12-06 2022-11-23 Huawei Technologies Co., Ltd. Esd protection circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078068A (en) * 1998-07-15 2000-06-20 Adaptec, Inc. Electrostatic discharge protection bus/die edge seal
US7272802B2 (en) * 2005-05-11 2007-09-18 Lsi Corporation R-cells containing CDM clamps

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS577969A (en) * 1980-06-18 1982-01-16 Toshiba Corp Semiconductor integrated circuit
JPH02113623A (en) * 1988-10-21 1990-04-25 Sharp Corp Static electricity protecting circuit for integrated circuit
EP0435047A3 (en) * 1989-12-19 1992-07-15 National Semiconductor Corporation Electrostatic discharge protection for integrated circuits
US5237395A (en) * 1991-05-28 1993-08-17 Western Digital Corporation Power rail ESD protection circuit
US5255146A (en) * 1991-08-29 1993-10-19 National Semiconductor Corporation Electrostatic discharge detection and clamp control circuit
US5287241A (en) * 1992-02-04 1994-02-15 Cirrus Logic, Inc. Shunt circuit for electrostatic discharge protection
JP2589938B2 (en) * 1993-10-04 1997-03-12 日本モトローラ株式会社 ESD protection circuit for semiconductor integrated circuit device
US5361185A (en) * 1993-02-19 1994-11-01 Advanced Micro Devices, Inc. Distributed VCC/VSS ESD clamp structure
US5311391A (en) * 1993-05-04 1994-05-10 Hewlett-Packard Company Electrostatic discharge protection circuit with dynamic triggering
US5440162A (en) * 1994-07-26 1995-08-08 Rockwell International Corporation ESD protection for submicron CMOS circuits
US5610790A (en) * 1995-01-20 1997-03-11 Xilinx, Inc. Method and structure for providing ESD protection for silicon on insulator integrated circuits
US5559659A (en) * 1995-03-23 1996-09-24 Lucent Technologies Inc. Enhanced RC coupled electrostatic discharge protection
DE69622465T2 (en) * 1995-04-24 2003-05-08 Conexant Systems Inc Method and apparatus for coupling various, independent on-chip Vdd buses to an ESD terminal
US5991135A (en) * 1998-05-11 1999-11-23 Vlsi Technology, Inc. System including ESD protection
US5946177A (en) * 1998-08-17 1999-08-31 Motorola, Inc. Circuit for electrostatic discharge protection
US6456472B1 (en) * 2000-04-07 2002-09-24 Philsar Semiconductor Inc. ESD protection in mixed signal ICs
US6385021B1 (en) * 2000-04-10 2002-05-07 Motorola, Inc. Electrostatic discharge (ESD) protection circuit
US6801416B2 (en) * 2001-08-23 2004-10-05 Institute Of Microelectronics ESD protection system for high frequency applications
US6724603B2 (en) * 2002-08-09 2004-04-20 Motorola, Inc. Electrostatic discharge protection circuitry and method of operation
US7279927B2 (en) * 2004-02-06 2007-10-09 Agere Systems Inc. Integrated circuit with multiple power domains

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078068A (en) * 1998-07-15 2000-06-20 Adaptec, Inc. Electrostatic discharge protection bus/die edge seal
US7272802B2 (en) * 2005-05-11 2007-09-18 Lsi Corporation R-cells containing CDM clamps

Also Published As

Publication number Publication date
TW200733340A (en) 2007-09-01
US20070097581A1 (en) 2007-05-03
TWI425608B (en) 2014-02-01
US7593202B2 (en) 2009-09-22
WO2007053272A2 (en) 2007-05-10

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