WO2007061667A3 - Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits - Google Patents

Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits Download PDF

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Publication number
WO2007061667A3
WO2007061667A3 PCT/US2006/044014 US2006044014W WO2007061667A3 WO 2007061667 A3 WO2007061667 A3 WO 2007061667A3 US 2006044014 W US2006044014 W US 2006044014W WO 2007061667 A3 WO2007061667 A3 WO 2007061667A3
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
memory elements
integrated circuits
core logic
logic device
Prior art date
Application number
PCT/US2006/044014
Other languages
French (fr)
Other versions
WO2007061667A2 (en
Inventor
Lin-Shih Liu
Mark T Chan
Toan D Do
Original Assignee
Altera Corp
Lin-Shih Liu
Mark T Chan
Toan D Do
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp, Lin-Shih Liu, Mark T Chan, Toan D Do filed Critical Altera Corp
Priority to CN2006800508205A priority Critical patent/CN101356584B/en
Publication of WO2007061667A2 publication Critical patent/WO2007061667A2/en
Publication of WO2007061667A3 publication Critical patent/WO2007061667A3/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17784—Structural details for adapting physical parameters for supply voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17792—Structural details for adapting physical parameters for operating speed

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)

Abstract

Integrated circuits are provided that have volatile memory elements. The memory elements produce output signals . The integrated circuits may be programmable logic device integrated circuits containing programmable core logic including transistors with gates. The core logic is powered using a core logic power supply level defined by a core logic positive power supply voltage and a core logic ground voltage. When loaded with configuration data, the memory elements produce output signals that are applied to the gates of the transistors in the core logic to customize the programmable logic device. The memory elements are powered with a memory element power supply level defined by a memory element positive power supply voltage and a memory element ground power supply voltage. The memory element power supply level is elevated with respect to the core logic power supply level .
PCT/US2006/044014 2005-11-17 2006-11-10 Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits WO2007061667A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2006800508205A CN101356584B (en) 2005-11-17 2006-11-10 Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/282,437 US7411853B2 (en) 2005-11-17 2005-11-17 Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits
US11/282,437 2005-11-17

Publications (2)

Publication Number Publication Date
WO2007061667A2 WO2007061667A2 (en) 2007-05-31
WO2007061667A3 true WO2007061667A3 (en) 2008-01-03

Family

ID=38040128

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/044014 WO2007061667A2 (en) 2005-11-17 2006-11-10 Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits

Country Status (3)

Country Link
US (3) US7411853B2 (en)
CN (2) CN102394104B (en)
WO (1) WO2007061667A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9595964B2 (en) 2011-05-19 2017-03-14 Semiconductor Energy Laboratory Co., Ltd. Programmable logic device

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US7430148B2 (en) * 2005-11-17 2008-09-30 Altera Corporation Volatile memory elements with boosted output voltages for programmable logic device integrated circuits
US7411853B2 (en) 2005-11-17 2008-08-12 Altera Corporation Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits
US7277351B2 (en) * 2005-11-17 2007-10-02 Altera Corporation Programmable logic device memory elements with elevated power supply levels
US8045353B2 (en) * 2005-12-30 2011-10-25 Stmicroelectronics Pvt. Ltd. Integrated circuit capable of operating at different supply voltages
US7339816B1 (en) * 2006-01-27 2008-03-04 Altera Corporation Soft error tolerance for configuration memory in programmable devices
US7266028B1 (en) * 2006-02-16 2007-09-04 Altera Corporation Method and apparatus for bit mapping memories in programmable logic device integrated circuits during at-speed testing
US7358764B1 (en) * 2006-06-09 2008-04-15 Altera Corporation Preset and reset circuitry for programmable logic device memory elements
US7859301B2 (en) * 2007-04-30 2010-12-28 Altera Corporation Power regulator circuitry for programmable logic device memory elements
US7911826B1 (en) 2008-03-27 2011-03-22 Altera Corporation Integrated circuits with clearable memory elements
US7957177B2 (en) * 2008-06-05 2011-06-07 Altera Corporation Static random-access memory with boosted voltages
CN103778946B (en) * 2008-10-01 2017-01-04 阿尔特拉公司 There is the volatile memory elements of soft error upset vulnerability to jamming
US8081503B1 (en) 2009-02-27 2011-12-20 Altera Corporation Volatile memory elements with minimized area and leakage current
US7872903B2 (en) * 2009-03-19 2011-01-18 Altera Corporation Volatile memory elements with soft error upset immunity
US8072237B1 (en) * 2009-06-04 2011-12-06 Altera Corporation Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks
US8618786B1 (en) * 2009-08-31 2013-12-31 Altera Corporation Self-biased voltage regulation circuitry for memory
EP2317519A1 (en) * 2009-10-20 2011-05-04 STMicroelectronics Rousset SAS Integrated circuit including a non-dedicated terminal for receiving a high voltage for deleting programs
EP2428961A1 (en) * 2010-09-13 2012-03-14 Imec Method for improving writability of SRAM memory
US8411491B1 (en) * 2011-01-03 2013-04-02 Altera Corporation Memory array with distributed clear transistors and variable memory element power supply
US8633731B1 (en) 2011-08-09 2014-01-21 Altera Corporation Programmable integrated circuit with thin-oxide passgates
US9256266B1 (en) 2011-11-04 2016-02-09 Altera Corporation Negative bit line driver circuitry
US9444460B1 (en) 2013-11-22 2016-09-13 Altera Corporation Integrated circuits with programmable overdrive capabilities
US10121534B1 (en) * 2015-12-18 2018-11-06 Altera Corporation Integrated circuit with overdriven and underdriven pass gates
CN106297862B (en) * 2016-08-01 2018-09-11 中国电子科技集团公司第五十八研究所 Data relay structure for programmable logic device configuration memory

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US7277351B2 (en) * 2005-11-17 2007-10-02 Altera Corporation Programmable logic device memory elements with elevated power supply levels

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US5214327A (en) * 1989-09-04 1993-05-25 Kabushiki Kaisha Toshiba Programmable logic device and storage circuit used therewith
US5757702A (en) * 1995-10-31 1998-05-26 Matsushita Electric Industrial Co., Ltd. Data holding circuit
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US7277351B2 (en) * 2005-11-17 2007-10-02 Altera Corporation Programmable logic device memory elements with elevated power supply levels

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9595964B2 (en) 2011-05-19 2017-03-14 Semiconductor Energy Laboratory Co., Ltd. Programmable logic device

Also Published As

Publication number Publication date
US20080266997A1 (en) 2008-10-30
US7995375B2 (en) 2011-08-09
CN101356584B (en) 2011-11-16
US20110285422A1 (en) 2011-11-24
CN102394104A (en) 2012-03-28
CN101356584A (en) 2009-01-28
US9245592B2 (en) 2016-01-26
US20070109017A1 (en) 2007-05-17
CN102394104B (en) 2016-08-03
US7411853B2 (en) 2008-08-12
WO2007061667A2 (en) 2007-05-31

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