WO2007089661A3 - Power sparing synchronous apparatus - Google Patents

Power sparing synchronous apparatus Download PDF

Info

Publication number
WO2007089661A3
WO2007089661A3 PCT/US2007/002298 US2007002298W WO2007089661A3 WO 2007089661 A3 WO2007089661 A3 WO 2007089661A3 US 2007002298 W US2007002298 W US 2007002298W WO 2007089661 A3 WO2007089661 A3 WO 2007089661A3
Authority
WO
WIPO (PCT)
Prior art keywords
power plane
power
operable
subcircuit
synchronous apparatus
Prior art date
Application number
PCT/US2007/002298
Other languages
French (fr)
Other versions
WO2007089661A2 (en
Inventor
William Henry Mangione-Smith
Original Assignee
Searete Llc
William Henry Mangione-Smith
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/343,927 external-priority patent/US8214191B2/en
Priority claimed from US11/343,745 external-priority patent/US8209524B2/en
Priority claimed from US11/364,130 external-priority patent/US7493516B2/en
Application filed by Searete Llc, William Henry Mangione-Smith filed Critical Searete Llc
Publication of WO2007089661A2 publication Critical patent/WO2007089661A2/en
Publication of WO2007089661A3 publication Critical patent/WO2007089661A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/1407Checkpointing the instruction stream
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/3471Address tracing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
PCT/US2007/002298 2006-01-31 2007-01-26 Power sparing synchronous apparatus WO2007089661A2 (en)

Applications Claiming Priority (14)

Application Number Priority Date Filing Date Title
US11/343,745 2006-01-31
US11/343,927 US8214191B2 (en) 2005-08-29 2006-01-31 Cross-architecture execution optimization
US11/343,745 US8209524B2 (en) 2005-08-29 2006-01-31 Cross-architecture optimization
US11/343,927 2006-01-31
US11/364,573 2006-02-28
US11/364,130 US7493516B2 (en) 2005-08-29 2006-02-28 Hardware-error tolerant computing
US11/364,573 US7607042B2 (en) 2005-08-29 2006-02-28 Adjusting a processor operating parameter based on a performance criterion
US11/364,131 US8375247B2 (en) 2005-08-29 2006-02-28 Handling processor computational errors
US11/364,130 2006-02-28
US11/364,131 2006-02-28
US11/384,237 2006-03-17
US11/384,237 US7512842B2 (en) 2005-08-29 2006-03-17 Multi-voltage synchronous systems
US11/384,236 US7653834B2 (en) 2005-08-29 2006-03-17 Power sparing synchronous apparatus
US11/384,236 2006-03-17

Publications (2)

Publication Number Publication Date
WO2007089661A2 WO2007089661A2 (en) 2007-08-09
WO2007089661A3 true WO2007089661A3 (en) 2009-03-26

Family

ID=38327940

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2007/002296 WO2007089660A2 (en) 2006-01-31 2007-01-26 Multi-voltage synchronous systems
PCT/US2007/002298 WO2007089661A2 (en) 2006-01-31 2007-01-26 Power sparing synchronous apparatus

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/US2007/002296 WO2007089660A2 (en) 2006-01-31 2007-01-26 Multi-voltage synchronous systems

Country Status (2)

Country Link
US (2) US7653834B2 (en)
WO (2) WO2007089660A2 (en)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8181004B2 (en) * 2005-08-29 2012-05-15 The Invention Science Fund I, Llc Selecting a resource management policy for a resource available to a processor
US20070050608A1 (en) * 2005-08-29 2007-03-01 Searete Llc, A Limited Liability Corporatin Of The State Of Delaware Hardware-generated and historically-based execution optimization
US7539852B2 (en) 2005-08-29 2009-05-26 Searete, Llc Processor resource management
US8375247B2 (en) * 2005-08-29 2013-02-12 The Invention Science Fund I, Llc Handling processor computational errors
US7739524B2 (en) * 2005-08-29 2010-06-15 The Invention Science Fund I, Inc Power consumption management
US7877584B2 (en) 2005-08-29 2011-01-25 The Invention Science Fund I, Llc Predictive processor resource management
US8516300B2 (en) * 2005-08-29 2013-08-20 The Invention Science Fund I, Llc Multi-votage synchronous systems
US7647487B2 (en) * 2005-08-29 2010-01-12 Searete, Llc Instruction-associated processor resource optimization
US8423824B2 (en) * 2005-08-29 2013-04-16 The Invention Science Fund I, Llc Power sparing synchronous apparatus
US7653834B2 (en) 2005-08-29 2010-01-26 Searete, Llc Power sparing synchronous apparatus
US7725693B2 (en) * 2005-08-29 2010-05-25 Searete, Llc Execution optimization using a processor resource management policy saved in an association with an instruction group
US20070050605A1 (en) * 2005-08-29 2007-03-01 Bran Ferren Freeze-dried ghost pages
US7627739B2 (en) 2005-08-29 2009-12-01 Searete, Llc Optimization of a hardware resource shared by a multiprocessor
US8209524B2 (en) 2005-08-29 2012-06-26 The Invention Science Fund I, Llc Cross-architecture optimization
US7779213B2 (en) 2005-08-29 2010-08-17 The Invention Science Fund I, Inc Optimization of instruction group execution through hardware resource management policies
US8214191B2 (en) * 2005-08-29 2012-07-03 The Invention Science Fund I, Llc Cross-architecture execution optimization
US7650527B2 (en) * 2006-02-07 2010-01-19 Broadcom Corporation MIPS recovery technique
US7937618B2 (en) 2007-04-26 2011-05-03 International Business Machines Corporation Distributed, fault-tolerant and highly available computing system
US7984312B2 (en) * 2007-12-14 2011-07-19 International Business Machines Corporation System and method for interchangeably powering single or multiple motherboards
AU2009305636A1 (en) * 2008-10-15 2010-04-22 Ionis Pharmaceuticals, Inc. Modulation of Factor 11 expression
US8424005B2 (en) 2009-07-27 2013-04-16 International Business Machines Corporation System and method for time-aware run-time to guarantee time
US8909957B2 (en) 2010-11-04 2014-12-09 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Dynamic voltage adjustment to computer system memory
US9015513B2 (en) 2011-11-03 2015-04-21 Vocollect, Inc. Receiving application specific individual battery adjusted battery use profile data upon loading of work application for managing remaining power of a mobile device
US20150212570A1 (en) * 2012-09-03 2015-07-30 Hitachi, Ltd. Computer system and control method for computer system
US20220329725A1 (en) * 2020-05-14 2022-10-13 Cirrus Logic International Semiconductor Ltd. Multi-chip camera controller system with inter-chip communication

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5526313A (en) * 1988-06-17 1996-06-11 Hitachi Ltd. Large scale integrated circuit with sense amplifier circuits for low voltage operation
US5774736A (en) * 1995-12-15 1998-06-30 Wright; Robert S. Redundant CPU power system
US6924790B1 (en) * 1995-10-16 2005-08-02 Nec Corporation Mode switching for pen-based computer systems

Family Cites Families (86)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
EP0128945B1 (en) * 1982-12-09 1991-01-30 Sequoia Systems, Inc. Memory backup system
US4819154A (en) * 1982-12-09 1989-04-04 Sequoia Systems, Inc. Memory back up system with one cache memory and two physically separated main memories
US4751639A (en) * 1985-06-24 1988-06-14 Ncr Corporation Virtual command rollback in a fault tolerant data processing system
US4847755A (en) 1985-10-31 1989-07-11 Mcc Development, Ltd. Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies
US5084891A (en) * 1989-09-08 1992-01-28 Bell Communications Research, Inc. Technique for jointly performing bit synchronization and error detection in a TDM/TDMA system
US5212777A (en) * 1989-11-17 1993-05-18 Texas Instruments Incorporated Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
US5966528A (en) * 1990-11-13 1999-10-12 International Business Machines Corporation SIMD/MIMD array processor with vector processing
EP0496506B1 (en) * 1991-01-25 2000-09-20 Hitachi, Ltd. Fault tolerant computer system incorporating processing units which have at least three processors
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
CA2073516A1 (en) * 1991-11-27 1993-05-28 Peter Michael Kogge Dynamic multi-mode parallel processor array architecture computer system
US5535405A (en) * 1993-12-23 1996-07-09 Unisys Corporation Microsequencer bus controller system
US6052773A (en) * 1995-02-10 2000-04-18 Massachusetts Institute Of Technology DPGA-coupled microprocessors
US5691870A (en) * 1995-11-07 1997-11-25 Compaq Computer Corporation Circuit for monitoring and disabling power supply signals to a microprocessor in a computer system utilizing secondary voltage regulators
US6535903B2 (en) 1996-01-29 2003-03-18 Compaq Information Technologies Group, L.P. Method and apparatus for maintaining translated routine stack in a binary translation environment
US6199095B1 (en) * 1996-01-29 2001-03-06 Compaq Computer Corporation System and method for achieving object method transparency in a multi-code execution environment
US5915232A (en) * 1996-12-10 1999-06-22 Advanced Micro Devices, Inc. Method and apparatus for tracking power of an integrated circuit
US6021489A (en) * 1997-06-30 2000-02-01 Intel Corporation Apparatus and method for sharing a branch prediction unit in a microprocessor implementing a two instruction set architecture
US6374349B2 (en) * 1998-03-19 2002-04-16 Mcfarling Scott Branch predictor with serially connected predictor stages for improving branch prediction accuracy
US6247118B1 (en) * 1998-06-05 2001-06-12 Mcdonnell Douglas Corporation Systems and methods for transient error recovery in reduced instruction set computer processors via instruction retry
US6553488B2 (en) * 1998-09-08 2003-04-22 Intel Corporation Method and apparatus for branch prediction using first and second level branch prediction tables
US6611910B2 (en) * 1998-10-12 2003-08-26 Idea Corporation Method for processing branch operations
GB9825102D0 (en) 1998-11-16 1999-01-13 Insignia Solutions Plc Computer system
US6954923B1 (en) * 1999-01-28 2005-10-11 Ati International Srl Recording classification of instructions executed by a computer
US8121828B2 (en) 1999-01-28 2012-02-21 Ati Technologies Ulc Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions
US6763452B1 (en) * 1999-01-28 2004-07-13 Ati International Srl Modifying program execution based on profiling
US6496056B1 (en) * 1999-03-08 2002-12-17 Agere Systems Inc. Process-tolerant integrated circuit design
US6499101B1 (en) * 1999-03-18 2002-12-24 I.P. First L.L.C. Static branch prediction mechanism for conditional branch instructions
US6427206B1 (en) * 1999-05-03 2002-07-30 Intel Corporation Optimized branch predictions for strongly predicted compiler branches
US6985547B2 (en) * 1999-09-27 2006-01-10 The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations System and method of digital system performance enhancement
US6324643B1 (en) * 1999-10-01 2001-11-27 Hitachi, Ltd. Branch prediction and target instruction control for processor
US6772325B1 (en) * 1999-10-01 2004-08-03 Hitachi, Ltd. Processor architecture and operation for exploiting improved branch control instruction
US6675374B2 (en) * 1999-10-12 2004-01-06 Hewlett-Packard Development Company, L.P. Insertion of prefetch instructions into computer program code
US6363523B1 (en) 1999-11-12 2002-03-26 Sun Microsystems, Inc. Optimization of N-base typed arithmetic expressions
US6625750B1 (en) * 1999-11-16 2003-09-23 Emc Corporation Hardware and software failover services for a file server
KR100395763B1 (en) * 2000-02-01 2003-08-25 삼성전자주식회사 A branch predictor for microprocessor having multiple processes
US7085920B2 (en) * 2000-02-02 2006-08-01 Fujitsu Limited Branch prediction method, arithmetic and logic unit, and information processing apparatus for performing brach prediction at the time of occurrence of a branch instruction
JP3502592B2 (en) * 2000-03-02 2004-03-02 株式会社東芝 Branch prediction device
JP3641997B2 (en) * 2000-03-30 2005-04-27 日本電気株式会社 Program conversion apparatus and method, and recording medium
JP3664473B2 (en) * 2000-10-04 2005-06-29 インターナショナル・ビジネス・マシーンズ・コーポレーション Program optimization method and compiler using the same
GB0028079D0 (en) * 2000-11-17 2001-01-03 Imperial College System and method
US20020087828A1 (en) 2000-12-28 2002-07-04 International Business Machines Corporation Symmetric multiprocessing (SMP) system with fully-interconnected heterogenous microprocessors
US6986066B2 (en) * 2001-01-05 2006-01-10 International Business Machines Corporation Computer system having low energy consumption
US7231531B2 (en) * 2001-03-16 2007-06-12 Dualcor Technologies, Inc. Personal electronics device with a dual core processor
US7140010B2 (en) * 2001-03-30 2006-11-21 Sun Microsystems, Inc. Method and apparatus for simultaneous optimization of code targeting multiple machines
US7072975B2 (en) 2001-04-24 2006-07-04 Wideray Corporation Apparatus and method for communicating information to portable computing devices
JP3663393B2 (en) 2001-06-27 2005-06-22 インターナショナル・ビジネス・マシーンズ・コーポレーション Method, processor unit and computer system for checkpointing a multi-processor data processing system
US6792599B2 (en) * 2001-10-15 2004-09-14 Intel Corporation Method and apparatus for an atomic operation in a parallel computing environment
US7039910B2 (en) * 2001-11-28 2006-05-02 Sun Microsystems, Inc. Technique for associating execution characteristics with instructions or operations of program code
US7082602B2 (en) * 2002-04-12 2006-07-25 Intel Corporation Function unit based finite state automata data structure, transitions and methods for making the same
US7254810B2 (en) 2002-04-18 2007-08-07 International Business Machines Corporation Apparatus and method for using database knowledge to optimize a computer program
US7100060B2 (en) * 2002-06-26 2006-08-29 Intel Corporation Techniques for utilization of asymmetric secondary processing resources
US20040093591A1 (en) * 2002-11-12 2004-05-13 Spiros Kalogeropulos Method and apparatus prefetching indexed array references
US7028218B2 (en) * 2002-12-02 2006-04-11 Emc Corporation Redundant multi-processor and logical processor configuration for a file server
US7260742B2 (en) 2003-01-28 2007-08-21 Czajkowski David R SEU and SEFI fault tolerant computer
WO2004084070A1 (en) * 2003-03-20 2004-09-30 Arm Limited Systematic and random error detection and recovery within processing stages of an integrated circuit
US7093147B2 (en) * 2003-04-25 2006-08-15 Hewlett-Packard Development Company, L.P. Dynamically selecting processor cores for overall power efficiency
US7373642B2 (en) * 2003-07-29 2008-05-13 Stretch, Inc. Defining instruction extensions in a standard programming language
US20050093607A1 (en) * 2003-11-05 2005-05-05 David Marshall Data transmission circuit and method
US20050138478A1 (en) 2003-11-14 2005-06-23 Safford Kevin D. Error detection method and system for processors that employ alternating threads
US7770034B2 (en) 2003-12-16 2010-08-03 Intel Corporation Performance monitoring based dynamic voltage and frequency scaling
US20050149915A1 (en) * 2003-12-29 2005-07-07 Intel Corporation Methods and apparatus for optimizing a program undergoing dynamic binary translation using profile information
US7496908B2 (en) * 2004-01-14 2009-02-24 International Business Machines Corporation Method and apparatus for optimizing code execution using annotated trace information having performance indicator and counter information
US20060020852A1 (en) * 2004-03-30 2006-01-26 Bernick David L Method and system of servicing asynchronous interrupts in multiple processors executing a user program
JP2005301476A (en) * 2004-04-08 2005-10-27 Hitachi Ltd Power supply control system and storage device
US7409569B2 (en) * 2004-06-08 2008-08-05 Dartdevices Corporation System and method for application driven power management among intermittently coupled interoperable electronic devices
US7376849B2 (en) 2004-06-30 2008-05-20 Intel Corporation Method, apparatus and system of adjusting one or more performance-related parameters of a processor
US7415644B2 (en) * 2004-10-22 2008-08-19 International Business Machines Corporation Self-repairing of microprocessor array structures
US20060119382A1 (en) 2004-12-07 2006-06-08 Shumarayev Sergey Y Apparatus and methods for adjusting performance characteristics of programmable logic devices
US7791889B2 (en) * 2005-02-16 2010-09-07 Hewlett-Packard Development Company, L.P. Redundant power beneath circuit board
JP4330547B2 (en) * 2005-03-17 2009-09-16 富士通株式会社 Information processing system control method, information processing system, information processing system control program, and redundant configuration control device
US20070006178A1 (en) * 2005-05-12 2007-01-04 Microsoft Corporation Function-level just-in-time translation engine with multiple pass optimization
US8375247B2 (en) 2005-08-29 2013-02-12 The Invention Science Fund I, Llc Handling processor computational errors
US8181004B2 (en) 2005-08-29 2012-05-15 The Invention Science Fund I, Llc Selecting a resource management policy for a resource available to a processor
US7627739B2 (en) * 2005-08-29 2009-12-01 Searete, Llc Optimization of a hardware resource shared by a multiprocessor
US7653834B2 (en) * 2005-08-29 2010-01-26 Searete, Llc Power sparing synchronous apparatus
US20070050608A1 (en) 2005-08-29 2007-03-01 Searete Llc, A Limited Liability Corporatin Of The State Of Delaware Hardware-generated and historically-based execution optimization
US8209524B2 (en) * 2005-08-29 2012-06-26 The Invention Science Fund I, Llc Cross-architecture optimization
US7647487B2 (en) 2005-08-29 2010-01-12 Searete, Llc Instruction-associated processor resource optimization
US7539852B2 (en) 2005-08-29 2009-05-26 Searete, Llc Processor resource management
US20070050605A1 (en) * 2005-08-29 2007-03-01 Bran Ferren Freeze-dried ghost pages
US7779213B2 (en) 2005-08-29 2010-08-17 The Invention Science Fund I, Inc Optimization of instruction group execution through hardware resource management policies
US7877584B2 (en) 2005-08-29 2011-01-25 The Invention Science Fund I, Llc Predictive processor resource management
US8214191B2 (en) 2005-08-29 2012-07-03 The Invention Science Fund I, Llc Cross-architecture execution optimization
US7725693B2 (en) * 2005-08-29 2010-05-25 Searete, Llc Execution optimization using a processor resource management policy saved in an association with an instruction group
US7739524B2 (en) * 2005-08-29 2010-06-15 The Invention Science Fund I, Inc Power consumption management

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5526313A (en) * 1988-06-17 1996-06-11 Hitachi Ltd. Large scale integrated circuit with sense amplifier circuits for low voltage operation
US6924790B1 (en) * 1995-10-16 2005-08-02 Nec Corporation Mode switching for pen-based computer systems
US5774736A (en) * 1995-12-15 1998-06-30 Wright; Robert S. Redundant CPU power system

Also Published As

Publication number Publication date
WO2007089660A3 (en) 2008-08-07
US20070050582A1 (en) 2007-03-01
US7512842B2 (en) 2009-03-31
WO2007089660A2 (en) 2007-08-09
WO2007089661A2 (en) 2007-08-09
US7653834B2 (en) 2010-01-26
US20070050581A1 (en) 2007-03-01

Similar Documents

Publication Publication Date Title
WO2007089661A3 (en) Power sparing synchronous apparatus
WO2010090870A3 (en) Method and apparatus for characterizing a circuit coupled to an ac line
AR086116A1 (en) A CONTROL DEVICE FOR USE WITH A DETONATOR
EP3915465A3 (en) Use of sensor redundancy to detect sensor failures
WO2006066112A3 (en) Using parametric measurement units as a source of power for a device under test
WO2008024451A3 (en) Current sensing load demand apparatus and methods
WO2009062105A3 (en) Device and method for providing power to lighting elements for use as a visual indicator in a medical probe
ATE443281T1 (en) DEFECT REPAIR DEVICE AND DEFECT REPAIR METHOD
WO2010091244A3 (en) Method and apparatus for determining a corrected monitoring voltage
WO2008124701A3 (en) Light unit with internal power failure detection
WO2009008411A1 (en) Electronic apparatus and method for controlling the same
WO2006081167A3 (en) System for providing power over communication cable having mechanism for determining resistance of communication cable
WO2011156127A3 (en) Rack-based uninterruptible power supply
WO2006083985A3 (en) Systems and methods for controlling use of power in a computer system
WO2011078540A3 (en) Mobile device and related control method for external output depending on user interaction based on image sensing module
WO2009075985A3 (en) Apparatuses and methods to connect power sources to an electric power system
WO2011099651A3 (en) Voltage detection apparatus
ATE456828T1 (en) BASE ASSEMBLY WITH STANDBY BASE
EP1928082A3 (en) Power system fault characterization using transformed values
DE502006004200D1 (en) VACUUM SYSTEM
BR112014017459A8 (en) power supply device for adapting input power to supply power to a portable device connected to the power supply device, and portable device for use with a power supply device
DE602007010297D1 (en) HANDOVER OF A COMMUNICATION DEVICE
TW200701589A (en) Apparatus for supplying power source
WO2009034831A1 (en) Ultraviolet sensor
WO2005029101A3 (en) Method and system for verifying voltage in an electrical system

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07762807

Country of ref document: EP

Kind code of ref document: A2