WO2007089661A3 - Power sparing synchronous apparatus - Google Patents
Power sparing synchronous apparatus Download PDFInfo
- Publication number
- WO2007089661A3 WO2007089661A3 PCT/US2007/002298 US2007002298W WO2007089661A3 WO 2007089661 A3 WO2007089661 A3 WO 2007089661A3 US 2007002298 W US2007002298 W US 2007002298W WO 2007089661 A3 WO2007089661 A3 WO 2007089661A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- power plane
- power
- operable
- subcircuit
- synchronous apparatus
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
- G06F11/1407—Checkpointing the instruction stream
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
- G06F11/3471—Address tracing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
Applications Claiming Priority (14)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/343,745 | 2006-01-31 | ||
US11/343,927 US8214191B2 (en) | 2005-08-29 | 2006-01-31 | Cross-architecture execution optimization |
US11/343,745 US8209524B2 (en) | 2005-08-29 | 2006-01-31 | Cross-architecture optimization |
US11/343,927 | 2006-01-31 | ||
US11/364,573 | 2006-02-28 | ||
US11/364,130 US7493516B2 (en) | 2005-08-29 | 2006-02-28 | Hardware-error tolerant computing |
US11/364,573 US7607042B2 (en) | 2005-08-29 | 2006-02-28 | Adjusting a processor operating parameter based on a performance criterion |
US11/364,131 US8375247B2 (en) | 2005-08-29 | 2006-02-28 | Handling processor computational errors |
US11/364,130 | 2006-02-28 | ||
US11/364,131 | 2006-02-28 | ||
US11/384,237 | 2006-03-17 | ||
US11/384,237 US7512842B2 (en) | 2005-08-29 | 2006-03-17 | Multi-voltage synchronous systems |
US11/384,236 US7653834B2 (en) | 2005-08-29 | 2006-03-17 | Power sparing synchronous apparatus |
US11/384,236 | 2006-03-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007089661A2 WO2007089661A2 (en) | 2007-08-09 |
WO2007089661A3 true WO2007089661A3 (en) | 2009-03-26 |
Family
ID=38327940
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/002296 WO2007089660A2 (en) | 2006-01-31 | 2007-01-26 | Multi-voltage synchronous systems |
PCT/US2007/002298 WO2007089661A2 (en) | 2006-01-31 | 2007-01-26 | Power sparing synchronous apparatus |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2007/002296 WO2007089660A2 (en) | 2006-01-31 | 2007-01-26 | Multi-voltage synchronous systems |
Country Status (2)
Country | Link |
---|---|
US (2) | US7653834B2 (en) |
WO (2) | WO2007089660A2 (en) |
Families Citing this family (25)
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US8181004B2 (en) * | 2005-08-29 | 2012-05-15 | The Invention Science Fund I, Llc | Selecting a resource management policy for a resource available to a processor |
US20070050608A1 (en) * | 2005-08-29 | 2007-03-01 | Searete Llc, A Limited Liability Corporatin Of The State Of Delaware | Hardware-generated and historically-based execution optimization |
US7539852B2 (en) | 2005-08-29 | 2009-05-26 | Searete, Llc | Processor resource management |
US8375247B2 (en) * | 2005-08-29 | 2013-02-12 | The Invention Science Fund I, Llc | Handling processor computational errors |
US7739524B2 (en) * | 2005-08-29 | 2010-06-15 | The Invention Science Fund I, Inc | Power consumption management |
US7877584B2 (en) | 2005-08-29 | 2011-01-25 | The Invention Science Fund I, Llc | Predictive processor resource management |
US8516300B2 (en) * | 2005-08-29 | 2013-08-20 | The Invention Science Fund I, Llc | Multi-votage synchronous systems |
US7647487B2 (en) * | 2005-08-29 | 2010-01-12 | Searete, Llc | Instruction-associated processor resource optimization |
US8423824B2 (en) * | 2005-08-29 | 2013-04-16 | The Invention Science Fund I, Llc | Power sparing synchronous apparatus |
US7653834B2 (en) | 2005-08-29 | 2010-01-26 | Searete, Llc | Power sparing synchronous apparatus |
US7725693B2 (en) * | 2005-08-29 | 2010-05-25 | Searete, Llc | Execution optimization using a processor resource management policy saved in an association with an instruction group |
US20070050605A1 (en) * | 2005-08-29 | 2007-03-01 | Bran Ferren | Freeze-dried ghost pages |
US7627739B2 (en) | 2005-08-29 | 2009-12-01 | Searete, Llc | Optimization of a hardware resource shared by a multiprocessor |
US8209524B2 (en) | 2005-08-29 | 2012-06-26 | The Invention Science Fund I, Llc | Cross-architecture optimization |
US7779213B2 (en) | 2005-08-29 | 2010-08-17 | The Invention Science Fund I, Inc | Optimization of instruction group execution through hardware resource management policies |
US8214191B2 (en) * | 2005-08-29 | 2012-07-03 | The Invention Science Fund I, Llc | Cross-architecture execution optimization |
US7650527B2 (en) * | 2006-02-07 | 2010-01-19 | Broadcom Corporation | MIPS recovery technique |
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US7627739B2 (en) * | 2005-08-29 | 2009-12-01 | Searete, Llc | Optimization of a hardware resource shared by a multiprocessor |
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US8214191B2 (en) | 2005-08-29 | 2012-07-03 | The Invention Science Fund I, Llc | Cross-architecture execution optimization |
US7725693B2 (en) * | 2005-08-29 | 2010-05-25 | Searete, Llc | Execution optimization using a processor resource management policy saved in an association with an instruction group |
US7739524B2 (en) * | 2005-08-29 | 2010-06-15 | The Invention Science Fund I, Inc | Power consumption management |
-
2006
- 2006-03-17 US US11/384,236 patent/US7653834B2/en not_active Expired - Fee Related
- 2006-03-17 US US11/384,237 patent/US7512842B2/en not_active Expired - Fee Related
-
2007
- 2007-01-26 WO PCT/US2007/002296 patent/WO2007089660A2/en active Application Filing
- 2007-01-26 WO PCT/US2007/002298 patent/WO2007089661A2/en active Application Filing
Patent Citations (3)
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---|---|---|---|---|
US5526313A (en) * | 1988-06-17 | 1996-06-11 | Hitachi Ltd. | Large scale integrated circuit with sense amplifier circuits for low voltage operation |
US6924790B1 (en) * | 1995-10-16 | 2005-08-02 | Nec Corporation | Mode switching for pen-based computer systems |
US5774736A (en) * | 1995-12-15 | 1998-06-30 | Wright; Robert S. | Redundant CPU power system |
Also Published As
Publication number | Publication date |
---|---|
WO2007089660A3 (en) | 2008-08-07 |
US20070050582A1 (en) | 2007-03-01 |
US7512842B2 (en) | 2009-03-31 |
WO2007089660A2 (en) | 2007-08-09 |
WO2007089661A2 (en) | 2007-08-09 |
US7653834B2 (en) | 2010-01-26 |
US20070050581A1 (en) | 2007-03-01 |
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