WO2008017416A2 - Multitransducer array and method for configuring such a device - Google Patents

Multitransducer array and method for configuring such a device Download PDF

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Publication number
WO2008017416A2
WO2008017416A2 PCT/EP2007/006822 EP2007006822W WO2008017416A2 WO 2008017416 A2 WO2008017416 A2 WO 2008017416A2 EP 2007006822 W EP2007006822 W EP 2007006822W WO 2008017416 A2 WO2008017416 A2 WO 2008017416A2
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Prior art keywords
transducers
array
routing
transducer
switches
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PCT/EP2007/006822
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French (fr)
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WO2008017416A3 (en
Inventor
Andreas Hierlemann
Urs Frey
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Eth Zurich
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Publication of WO2008017416A3 publication Critical patent/WO2008017416A3/en

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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00Measuring for diagnostic purposes; Identification of persons
    • A61B5/24Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00Measuring for diagnostic purposes; Identification of persons
    • A61B5/24Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
    • A61B5/25Bioelectric electrodes therefor
    • A61B5/279Bioelectric electrodes therefor specially adapted for particular uses
    • A61B5/28Bioelectric electrodes therefor specially adapted for particular uses for electrocardiography [ECG]
    • A61B5/282Holders for multiple electrodes

Definitions

  • the invention relates to a multitransducer array and to a method for configuring such a device.
  • the invention relates to a device featuring a high density transducer array and an embedded multiplexer for generating a reconf ⁇ gurable routing from an almost arbitrary subset of transducers to a limited number of channels.
  • MEA Microelectrode arrays
  • Conventional and commercially available MEAs are arrangements of usually approximately 60 electrodes with diameters ranging between 10 ⁇ m and 30 ⁇ m and densities of up to 100 electrodes per mm 2 .
  • the device according to the invention comprises a transducer array with a plurality of transducers, e.g. sensors and/or actuators, a plurality of channels, each channel having its own channel unit for signal processing and/or actuation, said channel unit being located outside the transducer array, and routing means for routing signals from a subset of transducers to the channels and/or vice versa.
  • transducers e.g. sensors and/or actuators
  • channels each channel having its own channel unit for signal processing and/or actuation, said channel unit being located outside the transducer array, and routing means for routing signals from a subset of transducers to the channels and/or vice versa.
  • the inventive method for configuring such a device for, e.g., the detection of signals from a plurality of interesting spots, located in proximity to transducers of the array comprises the steps of selecting a subset of transducers corresponding to the plurality of interesting spots and using a routing scheme that connects each of the transducers of the subset to a channel, and by configuring the routing means so that the signal of each transducer of interest is routed to one of the channels and/or vice versa.
  • the present invention is based on a different approach than transducer arrays presently known. Instead of addressing all transducers of a transducer array, a 'flexible' subset of pixels in large pixel arrays is selected, and only this subset is read out and/or used for actuation. Every channel has, e.g., its own continuous-time filtering and amplification stage, which is located outside the sensor array itself. This allows for a high signal-to-noise ratio as well as high spatial resolution, as the transducers can be densely packed within the array. As a consequence, it is not possible to, e.g., read out all channels simultaneously, as this would require realizing the complete channel electronics per transducer.
  • the transducer selection can be changed so that a recording/actuation of all transducers is possible, however, at different points in time.
  • the mapping from the transducers to the channels i.e., the selection of a subset of pixels used for recording and/or actuation, or both at the same time, is realized in an as flexible way as possible by the claimed architecture and method.
  • the routing means is represented by an array of analog switches defining the connections, and an array of memory units storing the respective configuration bits.
  • Said array of switches is embedded within the transducer array itself, preferably underneath the transducers.
  • SRAM cells also integrated within the array. This results in a very high flexibility of selecting subsets of transducers and helps to overcome, e.g., the problems associated with the mere multiplexing of minute analog signals as described above.
  • the array of switches in combination with the memory units will also be designated as switch matrix.
  • the advantage of such an architecture is that it allows for having, at the same time, ultra-high transducer density and very high signal quality, i.e., very high signal-to- noise ratio and high sampling rate, from a nearly arbitrary subset of electrodes.
  • ultra-high transducer density and very high signal quality i.e., very high signal-to- noise ratio and high sampling rate.
  • the invention has the following advantages:
  • Possible applications include all transducer arrays where reading out an 'arbitrary' subset or addressing an arbitrary subset of the whole array is desired and some of the above-mentioned criteria apply. Possible applications also include differential or referencing methods, where it is interesting to read out differential signals between different ensembles or single measuring and reference transducers.
  • the pixel transducer could detect electromagnetic radiation, light, particles etc.
  • the transducers could also consist of noble metal electrodes for electro-chemical analysis, like voltammetry, conductometry etc.
  • a further application includes routing of signals to a flexible set of locations within the transducer array by using the channels defined above backwards, e.g., as actuation or stimulation channels.
  • the transducers then deliver a signal to the exterior of the transducer array with high spatial precision.
  • the transducer may, for example, be an electrode that stimulates a biological cell by an electrical signal. This enables investigation of the response of a single cell or interconnected cells to spatially well defined electrical stimuli.
  • a “transducer” includes both directions of signal transfer, i.e. from the recording site to the electronics, and/or vice versa (sensor and actuator).
  • a “transducer” may just translate a signal or may transform it from one domain into another one, e.g., from the chemical, biological, or mechanical domain into the electrical domain.
  • Signals of extracellular recordings from neuronal cells with 'small' metal electrodes have the following properties: their amplitude is around a few 10 ⁇ V, heavily depending on cell type, cell adhesion, cell/electrode alignment etc.
  • the metal electrodes show significant 1/f noise at low frequencies ( ⁇ 10 Hz), and a thermal noise of around 10 nWsqrt(Hz). Additionally, background noise of cell membrane ion currents add to the noise level.
  • the signals of interest are in the frequency band from 1 Hz - 5 kHz, depending on the type of cell/measurement. Efficient filtering is, therefore, needed to cull out the relevant signals at good signal-to-noise ratio.
  • Scanning or multiplexing requires the signals to be buffered at each transducer so that the front-end amplifier must be placed within the pixel, where a low-noise implementation may not be possible due to area constraints. Moreover, when scanning through several electrodes and multiplexing the signals, an anti-aliasing filter must be placed in front of the multiplexing switch, which again, requires considerable space.
  • Transducer or electrode arrays on implantable devices where the selection of the "best" transducer or electrode for recording or stimulation may drastically reduce power consumption for spike detection, stimulation and signal transmission and may also reduce the associated damage or stress to the surrounding biological material or tissue.
  • Applications include e.g., deep-brain implantable electrodes.
  • Figure 1 Proposed architecture (simplified) for selective readout and stimulation
  • Figure 2 A general routing scheme for selective readout and stimulation
  • Figure 4 Layout view of the transducer-array device
  • Figure 6 Schematics of the 1 st stage of the signal processing means
  • Figure 7 Chip Micrograph, illustrating the separation of the array and the channel electronics, which, in this case, consist of readout amplifiers
  • Figure 8 Measurement setup
  • Figure 9 A detail of a CMOS wafer to illustrate fabrication of the array device
  • Figure 11 A SEM image of a neuron grown on an inventive array device
  • Fig. 1 shows the (simplified) architecture of an inventive sensor device 10 comprising an array 14 of exemplarily 6x6 transducers 12 for selective readout and stimulation from/at a subset of six transducers 1, 2, 3, 4, 5, 6.
  • filters 1', 2', 3', 4', 5', 6' acting as signal processing units 24' for six readout channels 24. They are located outside the area 14' occupied by the transducer array 14 itself.
  • each transducer 12 can be (theoretically) connected with each of the filters 1 ', 2', 3', 4', 5', 6' and thus with each of the readout channels 24/readout filters 24'.
  • the routing scheme of the signals i.e., which of the transducers 12 are read out and which way the signal takes, is determined by switches 20 that connect the transducers 12 to the wires 16 and by switches 22 that connect horizontal wires 16 to vertical wires 18. There could also be switches that interrupt a wire 16, 18 without connecting it to another one (see switches 21 in Fig. 2).
  • the switches 20, 22 and the memory units 25 are arranged in a switch matrix 34 acting as routing means.
  • Fig. 1 exemplarily sketches the proposed wiring scheme for a 6x6 array with three horizontal wires 16 per row and one vertical wire 18 per two columns. For larger arrays and more flexible selection possibilities, the number of switches, horizontal and vertical wires is increased.
  • FIG. 1 shows such a scheme applied to a transducer array 14.
  • Each pixel consists of a transducer 12 that is connected to the routing matrix 34 through the two connection boxes (C-boxes) C h and C v .
  • C-boxes connection boxes
  • C h connection boxes
  • C v 18 and Wh 16
  • S-box switch-box
  • the switches 21, 22 in the S-box are symbolized by the dashed lines.
  • a basic unit comprising one transducer 12, two connection boxes C h and C v , and one S-box, is indicated by a square in dashed lines.
  • the transducer array 14 with the routing means 34 is built up by a given number of such basic units.
  • the transducer array 14 features somewhat relaxed routing constraints in comparison to an FPGA, as only transducer-channel nets are required, where usually any channel can be selected, and where it is often sufficient to connect one of a few neighbored transducers.
  • the number of switches in the signal path may also be of importance as it increases the serial resistance between transducer and channel.
  • FIG 2 (b) an S-box with reduced flexibility in comparison to a general one is shown, however this S-box still offers a very high degree of freedom for routing.
  • Figure 2 (c) shows a section of the array as it has been implemented and is shown in Figures 4, 7.
  • the number of horizontal wires Wj 1 16 is six and the number of vertical wires W v 18 is one.
  • the space available within each pixel limits the total number of switches per pixel for the two C-boxes and the S-box to one. Therefore, there is no Cy-box, and only one single switch in the C h -box.
  • the S-box with a single switch 12 is only implemented every 19 th pixel, where the transducer 12 was omitted.
  • the transducers 12 have then been shifted by a small margin to cover the corresponding 'holes' at positions, where the transducer has been omitted.
  • the switching architecture can be represented as a graph, as shown in Fig. 3.
  • the arcs represent switches and the nodes wires.
  • source nodes which represent interesting spots and sink nodes, representing the available readout filters.
  • Graph algorithms such as a "Max-Flow, Min-Cost” optimization can then be applied to obtain the settings for the switches that connect electrodes and filters.
  • the switches are either on or off, they are represented by binary integers, therefore, the "Max-Flow, Min-Cost"-like algorithms maybe replaced by a general integer linear program (ILP), and the solution may be obtained with an appropriate solver.
  • IDP general integer linear program
  • the time required to reconfigure the transducer array 14 is on the order of milliseconds.
  • Arcs from spots of interest to a set of transducers are assigned a cost, such as the Euclidian distance to the center of the spots.
  • Simulations for the task of routing 126 randomly distributed spots of interest to the 126 channels were carried out to assess the ability to select spots of interest.
  • the implemented routing scheme provides an average distance to the connected electrode of 7.1 ⁇ m, whereat 114.6 of the 126 spots can be read out via the closest transducer.
  • 102 transducers in a 6x17 rectangular configuration constitute the largest obtainable coherent transducer block.
  • Fig. 4 shows a 3D view of the prototype layout, displaying the different chip layers and illustrating how subsets of transducers 12, here electrodes, can be selected, and how the actual multiplexer 34 with its configuration bits is embedded into the sensor array 14.
  • the flexibility in the transducer selection is attained by the use of an analog switch matrix 34 integrated underneath the transducer array 14, as shown in Fig. 4.
  • the switch matrix consists of 13k SRAM cells 24 and analog switches 20, 22 to define the routing from the electrode to the amplifiers as sketched in Fig. 1.
  • the sensor device 10 is manufactured in a CMOS process with here three metal layers, METl, MET2, MET3.
  • the first layer, MET3, carries the vertical wires 18 and the contact area for the transducers
  • the second layer, MET2 carries the horizontal wires 16
  • the switch matrix 34 with the switches 20, 22 and memory units 24 is implemented using the third metal layer, METl and the transistors underneath.
  • the transducers 12 are located at the surface of the first layer. The fabrication will be described in detail in connection with Fig. 9.
  • Fig. 5 the block diagram of the on-chip components of the system is shown.
  • Fig. 6 shows schematically the 1 st stage of the channel electronics, or in this case, the signal conditioning unit.
  • Fig. 7 shows a micrograph of the chip, illustrating the spatial separation of the transducer array 14 and the channel electronics units 24', e.g., readout amplifiers/filters.
  • Fig. 8 shows the measurement setup. Figs. 5-8 will be described in the following:
  • the transducer array 14 and the switch matrix 34 embedded in the transducer array 14 are spatially separated from the channel electronics units 24 or, in this case, signal processing units 24'.
  • the signals are amplified and filtered in the electronics channels using three stages, each built using a Miller-compensated amplifier.
  • the first stage is shown in Fig. 6.
  • the gain is programmable via the digital interface from 0 to 8OdB in 18 steps to account for the large variation in the signal amplitudes of different cell types.
  • the maximum gain of the first stage is 29.5dB.
  • This stage also provides a first-order HPF featuring a low cut-off frequency given by the capacitance Ci (15OfF) and the two diode-connected transistors Di and D2 used as resistors.
  • the low cut-off frequency is needed to reject the large DC offsets and fluctuations of the electrode-solution interface.
  • the first stage has a measured high-pass frequency of 0.3Hz.
  • the second stage further reduces the bandwidth to 4 or 14kHz.
  • the signals are multiplexed after the second stage, sampled at 2OkHz and digitalized with 16 8b successive-approximation ADCs 27.
  • the data can be oversampled at up to 16OkHz by skipping channels.
  • the data are transferred off chip along with the chip-status and a cyclic redundancy check (CRC).
  • the stimulation capability is provided through an 8b flash DAC and stimulation buffers. Additional channels are used to record the on- chip temperature and the electrode DC potential. To electrically characterize the chip, probe switches driven by a shift-register are integrated that allow for automated analog testing.
  • the digital core 26 of the chip is split into two parts 28, 30.
  • the transmitter 28 controls the 16 successive-approximation ADCs 27, the corresponding multiplexers, and sends the data off chip together with the chip status and a CRC (cyclic redundancy check) for transmission error detection.
  • the receiver 30 decodes commands sent to the chip used for array configuration, amplifier settings and stimulation.
  • Fig. 8 shows schematically the measurement setup.
  • a custom-designed PCB provides sockets for five sensor devices (neurochips) that can be operated simultaneously.
  • the multichip setup avoids mechanical perturbation by handling devices with plated cells prior to measurements.
  • the data from the five devices are multiplexed to a single low-voltage differential signaling (LVDS) twisted pair and sent to an field-programmable gate array (FPGA) board at a rate of 16MB/s.
  • the FPGA provides data processing features, such as CRC error detection, digital filtering, event detection and data reduction/compression.
  • the preprocessed data are sent to a personal computer (PC) for further data processing, visualization and storage.
  • PC personal computer
  • the sensor device 10 is not only able to read out electrical signals. Additionally or alternatively it may also be used for electrical stimulation via a stimulation path 32: Electrical stimulation signals are generated via an 8-bit digital-analog-converter DAC 27' and transmitted to buffers, which, in turn, can be connected to the electrodes 12 through the same routing scheme as is used for the readout.
  • the data acquisition system consists of a printed-circuit board PCB that provides power supply and voltage references and of a commercially available field- programmable gate array (FPGA).
  • the FPGA provides data processing features, such as CRC error detection, digital filtering, event detection and data reduction/compression.
  • the preprocessed data are sent to a PC for further data processing, visualization and storage.
  • Fig. 9 shows a detail of the CMOS wafer to illustrate the fabrication of the sensor device.
  • the chip has been fabricated in an industrial 0.6 ⁇ m CMOS-process that features three metal layers METl, MET2, MET3, two polysilicon layers and a high- resistance polysilicon layer.
  • the electrodes are fabricated in a two-mask post-processing step as shown in Fig. 7.
  • Ti W as adhesion promoter (20 nm) and platinum (200 nm) as the electrode material are sputtered onto the wafer and patterned using a lift-off process. A bi-layer lift-off resist was used.
  • a 1.6 ⁇ m-thick passivation layer stack consisting of alternating SiO 2 - and Si 3 N 4 -layers was deposited for corrosion protection (1 ⁇ m of Si 3 N 4 followed by twice 100 nm SiO 2 / 200 nm Si 3 N 4 ) using plasma-enhanced chemical vapor deposition (PECVD).
  • PECVD plasma-enhanced chemical vapor deposition
  • a mixed-frequency PECVD process was used to match the passivation stack stress with that of the underlying Si 3 N 4 deposited during the CMOS process.
  • the platinum electrode openings to the cells culture are shifted away from the original aluminum contacts, which ensures chip long-term biostability.
  • RIE Reactive ion etching
  • Fig. 10 shows the packaged device, which has been attached and wire-bonded onto a PCB. Afterwards, a glass ring has been mounted, and the bond wires have been encapsulated with epoxy resin (EPOTEK 302-3M).
  • epoxy resin EPOTEK 302-3M
  • Fig. 11 shows a SEM image of a chicken dorsal root ganglion neuron grown on the electrode array according to the invention.
  • the Pt electrodes can be covered with platinum black (Pt-black) as shown in Fig. 9.
  • Pt-black platinum black
  • the dendritic structure of the Pt-black increases the surface area, and the electrode impedance is decreased by about two orders of magnitude [13], which reduces the noise levels.
  • Pt-black can be electro- chemically deposited on the electrodes using 1.0 nA/m 2 current density in a solution containing 7 mM hexachloroplatinic acid, 0.3 mM lead acetate, and hydrochloric acid.
  • a platinum wire is generally used as the counter electrode, and the on-chip stimulation circuitry allows for applying a defined potential to the electrodes.
  • CMOS-based microelectrode array with 11 '016 metal electrodes and 126 on- chip channels, each of which includes recording and stimulation electronics for bidirectional communication with electrogenic cells (neurons or cardiomyocytes), has been described above.
  • the features of this chip include high spatial resolution with 3150 electrodes per mm 2 to attain cellular or subcellular resolution (electrode diameter 7 ⁇ m, pitch 18 ⁇ m, honeycomb pattern), great flexibility in routing the 126 channels to the 11 '016 recording sites, and low noise levels in the recordings (2.4 ⁇ V rms ) so that single action potentials from mammalian cells can be monitored.
  • the low noise levels also enable the recording of single-unit spike activity in acute slice preparations.
  • Fig. 12 shows recordings from rat cardiomyocytes cultured for 4 days in vitro.
  • the left panel shows a propagation pattern of an electrical wave; the position of the electrodes is marked by dots, the times on the contour lines are given in milliseconds.
  • the right upper panel shows the averaged signal shape from all electrodes (gray lines ⁇ ).
  • a 10 second trace of the channel marked with a diamond is shown.
  • a raster plot that shows the timestamps from all channels is displayed.
  • First biological tests and measurements have been performed with neurons and cardiomyocytes.
  • the electrodes were configured as an 11x11 grid spanning the whole array area, and the gain was set to 300, i.e., 40 ⁇ V LSB.
  • the cells formed a confluent layer that was beating/contracting at a frequency of 0.73 ⁇ 0.05 Hz.
  • the peak-to-peak amplitude was measured to be 2.5 ⁇ 1.1 mV and significantly varied across the chip as a consequence of the morphology of the cell layer.
  • the spike width (time between max-min) was 0.3 ms, and the wave propagation speed was 348 ⁇ 18 mm/s.
  • Fig. 13 shows a signal from acute parasagittal cerebellar slice from a Long-Evans rat.
  • the two selected channels are located at a distance of 38 ⁇ m from each other.
  • the array was configured to read out coherent blocks of electrodes at a gain of 5000 (LSB is 2.3 ⁇ V).
  • the two displayed traces originate from electrodes that are located 38 ⁇ m apart from each other.
  • the presented system enables high signal-to-noise and high-spatial-resolution recordings from a configurable subset of 126 electrodes out of a total of H '016 electrodes.
  • the fabrication and processing of the tightly spaced electrodes and the packaging of the chips with regard to the harsh operating conditions represent major challenges that have been faced and addressed.
  • Fig. 14 shows the noise level versus electrode density of the proposed system in comparison to other systems.
  • the noise values are estimates of the rms noise from 1 Hz to 10 kHz. Noise levels are difficult to compare, due to different measurement conditions (with/without cells, cell types, electrode material, electrode size), the actual values may therefore slightly vary. Also listed are two commercially available passive MEA systems (see [5], [6]).

Abstract

The invention relates to a device hosting a transducer array and to a method for configuring such a transducer array device. In particular, the invention relates to a transducer device with a high density transducer array and an embedded multiplexer for generating a reconfigurable routing from an almost arbitrary subset of transducers to a limited number of signal conditioning or actuation channels. The device comprises a transducer array with a plurality of transducers. It further comprises a plurality of channels, each channel having its own signal processing unit, or generation unit, or both located outside the transducer array itself. It further comprises routing means for routing signals from an arbitrary subset of transducers to the channels or vice versa. Instead of reading out from or actuating through all the transducers of a transducer array, a 'flexible' subset of transducer pixels in large pixel arrays is selected, and only the subset is read out or addressed. Every channel has, e.g., its own continuous-time filtering and amplification stage, or stimulation stage, or both, which are located outside the array itself. This allows for a high signal-to-noise ratio as well as high spatial resolution in recording and stimulation, as the transducers can be densely packed within the array.

Description

MULTITRANSDUCERARRAYAND METHOD FOR CONFIGURING SUCHADEVICE
FIELD OF THE INVENTION
The invention relates to a multitransducer array and to a method for configuring such a device. In particular, the invention relates to a device featuring a high density transducer array and an embedded multiplexer for generating a reconfϊgurable routing from an almost arbitrary subset of transducers to a limited number of channels.
BACKGROUND OF THE INVENTION
Especially in the fields of neuroscience and biosensing, but also in other technical areas, there is a demand for sensor/actuator devices that feature a high spatial resolution combined with low-noise characteristics. Passive wiring of the pixels (transducers) does not solve the problem due to interconnection limitations. In applications, where signals need to be recorded from transducers within a desired bandwidth at very low noise levels and using small pixel sizes, signal conditioning at each pixel may not be possible. This is due to the fact that the required signal processing units may occupy more space than the respective available pixel area, which obviates a dense packing of the transducers. Without signal conditioning at the pixels, the signals from every pixel experience a serious loss in signal quality upon multiplexing (scanning through all pixels),see refs [1], [2].
Microelectrode arrays (MEA) are becoming an important tool for non-invasive extracellular recording in the fields of neuroscience and biosensing [7, 8]. Conventional and commercially available MEAs are arrangements of usually approximately 60 electrodes with diameters ranging between 10 μm and 30 μm and densities of up to 100 electrodes per mm2. Considering the size of neurons, which range from below 10 μm in diameter for vertebrates up to 100 μm for invertebrates, it would be very interesting to conduct biological or electrophysiological experiments at cellular or subcellular resolution.
Three different approaches have been realized so far; (i) constraining the cells with regards to the electrode positions [9], (ii) adapting the electrode layout to the biological structure [10] or (iii) using high-density arrays that record from all electrodes simultaneously [1, 2]. The high-density arrays are usually CMOS-based devices that overcome the interconnect limitation by making use of on-chip signal multiplexing. The simultaneous recording of all electrodes requires the front-end amplifiers to be placed within each pixel (recording site), which, due to area constraints, entails rather high noise levels (e.g., 8 μm pitch, 250 μVπns noise [H]).
Approaches (i) and (ii) are applicable only for a limited number of biological objects or observation spots. Furthermore, for each structure, an own layout has to be manufactured. As mentioned above, either spatial resolution or signal quality is compromised by applying approach (iii). SUMMARY OF THE INVENTION
It is therefore an objective of the invention to provide a transducer array device featuring high spatial resolution and high signal quality, preferably used for, but not limited to biological applications.
This objective is achieved by a multi transducer array device according to claim 1 and by a method of configuring such a multitransducer array device according to claim 16. Preferred embodiments of the invention are described in the dependent claims, the description and the figures.
The device according to the invention comprises a transducer array with a plurality of transducers, e.g. sensors and/or actuators, a plurality of channels, each channel having its own channel unit for signal processing and/or actuation, said channel unit being located outside the transducer array, and routing means for routing signals from a subset of transducers to the channels and/or vice versa.
The inventive method for configuring such a device for, e.g., the detection of signals from a plurality of interesting spots, located in proximity to transducers of the array, comprises the steps of selecting a subset of transducers corresponding to the plurality of interesting spots and using a routing scheme that connects each of the transducers of the subset to a channel, and by configuring the routing means so that the signal of each transducer of interest is routed to one of the channels and/or vice versa.
The present invention is based on a different approach than transducer arrays presently known. Instead of addressing all transducers of a transducer array, a 'flexible' subset of pixels in large pixel arrays is selected, and only this subset is read out and/or used for actuation. Every channel has, e.g., its own continuous-time filtering and amplification stage, which is located outside the sensor array itself. This allows for a high signal-to-noise ratio as well as high spatial resolution, as the transducers can be densely packed within the array. As a consequence, it is not possible to, e.g., read out all channels simultaneously, as this would require realizing the complete channel electronics per transducer. However, this is no constraint for many applications, especially in biology, where only certain (but preferably arbitrary) subregions of a biological structure array are of interest at the same time. Moreover, the transducer selection can be changed so that a recording/actuation of all transducers is possible, however, at different points in time. To keep the device applicable to for as many experiments as possible, the mapping from the transducers to the channels, i.e., the selection of a subset of pixels used for recording and/or actuation, or both at the same time, is realized in an as flexible way as possible by the claimed architecture and method.
In a preferred embodiment of the invention, the routing means is represented by an array of analog switches defining the connections, and an array of memory units storing the respective configuration bits. Said array of switches is embedded within the transducer array itself, preferably underneath the transducers. Preferably, a 2D grid like analog bus is integrated in the array of switches. The switches that connect the transducers to the bus and the switches that determine how the signal is routed out of or into the array are driven by configuration bits that are preferably stored in
SRAM cells also integrated within the array. This results in a very high flexibility of selecting subsets of transducers and helps to overcome, e.g., the problems associated with the mere multiplexing of minute analog signals as described above. The array of switches in combination with the memory units will also be designated as switch matrix.
The advantage of such an architecture is that it allows for having, at the same time, ultra-high transducer density and very high signal quality, i.e., very high signal-to- noise ratio and high sampling rate, from a nearly arbitrary subset of electrodes. For the biological applications presented above, an example of which includes the natural growth of the neurons that cannot be predicted in its spatial distribution, it is important to be able to select subsets of transducers or electrodes as arbitrarily as possible. Furthermore, recording from only a set of interesting spots, however with a good resolution, is often the desired option.
In particular, the invention has the following advantages:
• Recording with high spatiotemporal resolution from a flexibly selectable subset of pixels of a small-pitch transducer array through the use of an analog switch matrix.
• Defined (but reconfigurable) mapping from pixels to channels including, e.g., readout filter/amplifiers, allowing for appropriate conditioning of the signals before sampling/multiplexing.
• Defined (but reconfigurable) mapping from stimulation or actuation circuitry units to the transducers of the array allowing for delivering, e.g., electrical signals or pulses in a locally defined way.
• Very flexible selection of subsets of pixels instead of block zoom functions typically found with imagers.
• Very high quality recordings from many pixels (>100) at positions that can be selected with a spatial resolution below 20 μm. • Very high quality actuation or stimulation on many pixels (>100) at positions that can be selected with a spatial resolution below 20 μm.
Possible applications include all transducer arrays where reading out an 'arbitrary' subset or addressing an arbitrary subset of the whole array is desired and some of the above-mentioned criteria apply. Possible applications also include differential or referencing methods, where it is interesting to read out differential signals between different ensembles or single measuring and reference transducers. The pixel transducer could detect electromagnetic radiation, light, particles etc. The transducers could also consist of noble metal electrodes for electro-chemical analysis, like voltammetry, conductometry etc.
A further application includes routing of signals to a flexible set of locations within the transducer array by using the channels defined above backwards, e.g., as actuation or stimulation channels. The transducers then deliver a signal to the exterior of the transducer array with high spatial precision. The transducer may, for example, be an electrode that stimulates a biological cell by an electrical signal. This enables investigation of the response of a single cell or interconnected cells to spatially well defined electrical stimuli.
In the context of the invention, a "transducer" includes both directions of signal transfer, i.e. from the recording site to the electronics, and/or vice versa (sensor and actuator). A "transducer" may just translate a signal or may transform it from one domain into another one, e.g., from the chemical, biological, or mechanical domain into the electrical domain.
The application described in more detail in the following is only one possible application: Signals of extracellular recordings from neuronal cells with 'small' metal electrodes have the following properties: their amplitude is around a few 10 μV, heavily depending on cell type, cell adhesion, cell/electrode alignment etc. The metal electrodes show significant 1/f noise at low frequencies (<10 Hz), and a thermal noise of around 10 nWsqrt(Hz). Additionally, background noise of cell membrane ion currents add to the noise level. The signals of interest are in the frequency band from 1 Hz - 5 kHz, depending on the type of cell/measurement. Efficient filtering is, therefore, needed to cull out the relevant signals at good signal-to-noise ratio.
The above-described signal properties require adequate amplification and band filtering units, which may take up more space or area than is available in each pixel.
Scanning or multiplexing requires the signals to be buffered at each transducer so that the front-end amplifier must be placed within the pixel, where a low-noise implementation may not be possible due to area constraints. Moreover, when scanning through several electrodes and multiplexing the signals, an anti-aliasing filter must be placed in front of the multiplexing switch, which again, requires considerable space.
An option that solves this dilemma is to statically connect readout channels to a subset of electrodes and provide filters for each channel outside the electrode array. With a correspondingly high density of electrodes, as required for many applications, the interconnection between the electrodes and the filters becomes a problem; it is not possible to connect each electrode individually so that metal wires between electrodes and filters must be shared. This can be done in a column and row type fashion, however, this limits the subset of selectable areas to rectangular blocks. As the selection depends on the application and varies from experiment to experiment, it is desirable to be able to select an arbitrary subset, depending on where the interesting spots are that need to be recorded from simultaneously. The claimed architecture comes close to the goal of arbitrarily selecting subsets of interesting spots randomly distributed over the transducer array.
The following applications in electrophysiology could massively benefit from the inventive system:
• Recordings and stimulation of dissociated cells, where the position of interesting spots and the connectivity is a priori not known.
• Recordings and stimulation from slices (brain, spinal cord, ...) where it is important to record from a large area to get an overview. However, it is also important to record from densely spaced electrodes in order to study details of connectivity and electrical signal propagation or to apply a current source density
(CSD) analysis.
• Recordings and stimulations from retinal cells or pieces of the retina, where the position of interesting spots and the connectivity is a priori not known.
• Recordings and stimulation from small animals, such as nematodes, where the spatial resolution of currently available MEAs is far too low to provide any useful data.
• Recordings and stimulation from a cluster of cells to investigate their communication under different environmental conditions (e.g. before/after exposure to a drug). • Longterm recordings with or without stimulation from an ensemble of cells to investigate the longterm effects of drugs or the effects of multiple exposures on the cells.
• Longterm recordings with or without stimulation from an ensemble of, e.g., neuronal cells to investigate effects of plasticity of their connections or learning effects.
• Transducer or electrode arrays on implantable devices, where the selection of the "best" transducer or electrode for recording or stimulation may drastically reduce power consumption for spike detection, stimulation and signal transmission and may also reduce the associated damage or stress to the surrounding biological material or tissue. Applications include e.g., deep-brain implantable electrodes.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 : Proposed architecture (simplified) for selective readout and stimulation
Figure 2: A general routing scheme for selective readout and stimulation
Figure 3 : Graph Representation of Transducer-Channel Mapping (simplified)
Figure 4: Layout view of the transducer-array device
Figure 5: System Block Diagram
Figure 6: Schematics of the 1st stage of the signal processing means
Figure 7: Chip Micrograph, illustrating the separation of the array and the channel electronics, which, in this case, consist of readout amplifiers Figure 8: Measurement setup
Figure 9: A detail of a CMOS wafer to illustrate fabrication of the array device
Figure 10: The packaged array device
Figure 11 : A SEM image of a neuron grown on an inventive array device
Figure 12 and 13: Some experimental results
Figure 14: Comparison with other Systems
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Fig. 1 shows the (simplified) architecture of an inventive sensor device 10 comprising an array 14 of exemplarily 6x6 transducers 12 for selective readout and stimulation from/at a subset of six transducers 1, 2, 3, 4, 5, 6. There are six filters 1', 2', 3', 4', 5', 6' acting as signal processing units 24' for six readout channels 24. They are located outside the area 14' occupied by the transducer array 14 itself. By a grid of horizontal and vertical wires 16, 18, each transducer 12 can be (theoretically) connected with each of the filters 1 ', 2', 3', 4', 5', 6' and thus with each of the readout channels 24/readout filters 24'. The routing scheme of the signals, i.e., which of the transducers 12 are read out and which way the signal takes, is determined by switches 20 that connect the transducers 12 to the wires 16 and by switches 22 that connect horizontal wires 16 to vertical wires 18. There could also be switches that interrupt a wire 16, 18 without connecting it to another one (see switches 21 in Fig. 2). The status of the switches 20, 22 is determined by memory units 25 (e.g. SRAM cells), as indicated in the right part of Fig. 1. For example, MEM=O means that the switch is open and thus no connection between the horizontal wire 16 and the vertical wire 18 is made. The switches 20, 22 and the memory units 25 are arranged in a switch matrix 34 acting as routing means.
Instead of scanning the entire transducer array, the approach presented here provides a reconfigurable routing for an almost arbitrary set of transducers to the readout channels. It enables, e.g., low-noise signal recording from ensembles of cells at cellular or subcellular resolution, since the front-end circuitry is placed outside the array. Fig. 1 exemplarily sketches the proposed wiring scheme for a 6x6 array with three horizontal wires 16 per row and one vertical wire 18 per two columns. For larger arrays and more flexible selection possibilities, the number of switches, horizontal and vertical wires is increased.
The number of switches, and how they are placed, heavily depends on the available space for realizing the routing means 34 and on the requirements of the routing. Field-programmable gate array (FPGA) devices feature very general and flexible routing schemes. Figure 2 (a) shows such a scheme applied to a transducer array 14. Each pixel consists of a transducer 12 that is connected to the routing matrix 34 through the two connection boxes (C-boxes) Ch and Cv. At the crossing of the routing wires, Wv 18 and Wh, 16 a switch-box (S-box) is placed. The switches 21, 22 in the S-box are symbolized by the dashed lines. A basic unit, comprising one transducer 12, two connection boxes Ch and Cv, and one S-box, is indicated by a square in dashed lines. The transducer array 14 with the routing means 34 is built up by a given number of such basic units.
There are different designs of S-boxes with different routing flexibility, see refs. [14, 15]. The transducer array 14 features somewhat relaxed routing constraints in comparison to an FPGA, as only transducer-channel nets are required, where usually any channel can be selected, and where it is often sufficient to connect one of a few neighbored transducers. The number of switches in the signal path may also be of importance as it increases the serial resistance between transducer and channel. In Figure 2 (b) an S-box with reduced flexibility in comparison to a general one is shown, however this S-box still offers a very high degree of freedom for routing. The switches 21, which are represented by circles, disconnect fractions of the horizontal and vertical routing wires 16, 18.
Figure 2 (c) shows a section of the array as it has been implemented and is shown in Figures 4, 7. The number of horizontal wires Wj1 16 is six and the number of vertical wires Wv 18 is one. The space available within each pixel limits the total number of switches per pixel for the two C-boxes and the S-box to one. Therefore, there is no Cy-box, and only one single switch in the Ch-box. The S-box with a single switch 12 is only implemented every 19th pixel, where the transducer 12 was omitted. The transducers 12 have then been shifted by a small margin to cover the corresponding 'holes' at positions, where the transducer has been omitted.
To be able to compute a bitstream that is used to configure the memory units 25 (SRAM), the switching architecture can be represented as a graph, as shown in Fig. 3. In such a graph, the arcs represent switches and the nodes wires. There are also source nodes, which represent interesting spots and sink nodes, representing the available readout filters. Graph algorithms, such as a "Max-Flow, Min-Cost" optimization can then be applied to obtain the settings for the switches that connect electrodes and filters. As the switches are either on or off, they are represented by binary integers, therefore, the "Max-Flow, Min-Cost"-like algorithms maybe replaced by a general integer linear program (ILP), and the solution may be obtained with an appropriate solver. The time required to reconfigure the transducer array 14 is on the order of milliseconds.
Arcs from spots of interest to a set of transducers are assigned a cost, such as the Euclidian distance to the center of the spots. Simulations for the task of routing 126 randomly distributed spots of interest to the 126 channels were carried out to assess the ability to select spots of interest. The average distance from any spot of interest to its closest transducer was 6.75 μm for the set used (n = 2000 sensors). The implemented routing scheme provides an average distance to the connected electrode of 7.1 μm, whereat 114.6 of the 126 spots can be read out via the closest transducer. 102 transducers in a 6x17 rectangular configuration constitute the largest obtainable coherent transducer block.
Fig. 4 shows a 3D view of the prototype layout, displaying the different chip layers and illustrating how subsets of transducers 12, here electrodes, can be selected, and how the actual multiplexer 34 with its configuration bits is embedded into the sensor array 14. The flexibility in the transducer selection is attained by the use of an analog switch matrix 34 integrated underneath the transducer array 14, as shown in Fig. 4. The switch matrix consists of 13k SRAM cells 24 and analog switches 20, 22 to define the routing from the electrode to the amplifiers as sketched in Fig. 1.
The sensor device 10 is manufactured in a CMOS process with here three metal layers, METl, MET2, MET3. The first layer, MET3, carries the vertical wires 18 and the contact area for the transducers, the second layer, MET2, carries the horizontal wires 16, and the switch matrix 34 with the switches 20, 22 and memory units 24 is implemented using the third metal layer, METl and the transistors underneath. The transducers 12 (electrodes) are located at the surface of the first layer. The fabrication will be described in detail in connection with Fig. 9.
In Fig. 5 the block diagram of the on-chip components of the system is shown. Fig. 6 shows schematically the 1st stage of the channel electronics, or in this case, the signal conditioning unit. Fig. 7 shows a micrograph of the chip, illustrating the spatial separation of the transducer array 14 and the channel electronics units 24', e.g., readout amplifiers/filters. Fig. 8 shows the measurement setup. Figs. 5-8 will be described in the following:
As shown in Fig. 5 and 7, the transducer array 14 and the switch matrix 34 embedded in the transducer array 14 are spatially separated from the channel electronics units 24 or, in this case, signal processing units 24'.
In this exemplary realization, the signals are amplified and filtered in the electronics channels using three stages, each built using a Miller-compensated amplifier. The first stage is shown in Fig. 6. The gain is programmable via the digital interface from 0 to 8OdB in 18 steps to account for the large variation in the signal amplitudes of different cell types. The maximum gain of the first stage is 29.5dB. This stage also provides a first-order HPF featuring a low cut-off frequency given by the capacitance Ci (15OfF) and the two diode-connected transistors Di and D2 used as resistors. The low cut-off frequency is needed to reject the large DC offsets and fluctuations of the electrode-solution interface. The first stage has a measured high-pass frequency of 0.3Hz. Its bandwidth is limited with the Miller capacitance to either 15 or 50kHz. The second stage further reduces the bandwidth to 4 or 14kHz. The signals are multiplexed after the second stage, sampled at 2OkHz and digitalized with 16 8b successive-approximation ADCs 27. The data can be oversampled at up to 16OkHz by skipping channels. The data are transferred off chip along with the chip-status and a cyclic redundancy check (CRC). The stimulation capability is provided through an 8b flash DAC and stimulation buffers. Additional channels are used to record the on- chip temperature and the electrode DC potential. To electrically characterize the chip, probe switches driven by a shift-register are integrated that allow for automated analog testing.
The digital core 26 of the chip is split into two parts 28, 30. The transmitter 28 controls the 16 successive-approximation ADCs 27, the corresponding multiplexers, and sends the data off chip together with the chip status and a CRC (cyclic redundancy check) for transmission error detection. The receiver 30 decodes commands sent to the chip used for array configuration, amplifier settings and stimulation.
Fig. 8 shows schematically the measurement setup. A custom-designed PCB provides sockets for five sensor devices (neurochips) that can be operated simultaneously. The multichip setup avoids mechanical perturbation by handling devices with plated cells prior to measurements. The data from the five devices are multiplexed to a single low-voltage differential signaling (LVDS) twisted pair and sent to an field-programmable gate array (FPGA) board at a rate of 16MB/s. The FPGA provides data processing features, such as CRC error detection, digital filtering, event detection and data reduction/compression. The preprocessed data are sent to a personal computer (PC) for further data processing, visualization and storage.
The sensor device 10 is not only able to read out electrical signals. Additionally or alternatively it may also be used for electrical stimulation via a stimulation path 32: Electrical stimulation signals are generated via an 8-bit digital-analog-converter DAC 27' and transmitted to buffers, which, in turn, can be connected to the electrodes 12 through the same routing scheme as is used for the readout.
The data acquisition system consists of a printed-circuit board PCB that provides power supply and voltage references and of a commercially available field- programmable gate array (FPGA). The FPGA provides data processing features, such as CRC error detection, digital filtering, event detection and data reduction/compression. The preprocessed data are sent to a PC for further data processing, visualization and storage. Fig. 9 shows a detail of the CMOS wafer to illustrate the fabrication of the sensor device. The chip has been fabricated in an industrial 0.6 μm CMOS-process that features three metal layers METl, MET2, MET3, two polysilicon layers and a high- resistance polysilicon layer. Dedicated post-processing and packaging steps are required, since the chip is operated inside an incubator (atmosphere of 95% humidity and 37°C) and directly exposed to the cell cultures in physiological solution. It is necessary to completely seal the aluminum (Al) of the CMOS process to avoid both, poisoning and undesirable electrochemistry that occur when the Al comes into contact with the neuron medium. Therefore, the electrodes are fabricated in a two-mask post-processing step as shown in Fig. 7. Ti: W as adhesion promoter (20 nm) and platinum (200 nm) as the electrode material are sputtered onto the wafer and patterned using a lift-off process. A bi-layer lift-off resist was used. Then, a 1.6 μm-thick passivation layer stack consisting of alternating SiO2- and Si3N4-layers was deposited for corrosion protection (1 μm of Si3N4 followed by twice 100 nm SiO2 / 200 nm Si3N4) using plasma-enhanced chemical vapor deposition (PECVD). A mixed-frequency PECVD process was used to match the passivation stack stress with that of the underlying Si3N4 deposited during the CMOS process. The platinum electrode openings to the cells culture are shifted away from the original aluminum contacts, which ensures chip long-term biostability. Reactive ion etching (RIE) has then been used to open the nitride stack and to define the final electrodes [12]. The electrode opening is 8.2x5.8 μm2 in size, and the total array area is 1.75x1.97 mm . Fig. 7 shows a micrograph of the processed chip.
Fig. 10 shows the packaged device, which has been attached and wire-bonded onto a PCB. Afterwards, a glass ring has been mounted, and the bond wires have been encapsulated with epoxy resin (EPOTEK 302-3M).
Fig. 11 shows a SEM image of a chicken dorsal root ganglion neuron grown on the electrode array according to the invention. The Pt electrodes can be covered with platinum black (Pt-black) as shown in Fig. 9. The dendritic structure of the Pt-black increases the surface area, and the electrode impedance is decreased by about two orders of magnitude [13], which reduces the noise levels. Pt-black can be electro- chemically deposited on the electrodes using 1.0 nA/m2 current density in a solution containing 7 mM hexachloroplatinic acid, 0.3 mM lead acetate, and hydrochloric acid. A platinum wire is generally used as the counter electrode, and the on-chip stimulation circuitry allows for applying a defined potential to the electrodes.
Experimental results will be described below with reference to Figs. 12 and 13:
The CMOS-based microelectrode array with 11 '016 metal electrodes and 126 on- chip channels, each of which includes recording and stimulation electronics for bidirectional communication with electrogenic cells (neurons or cardiomyocytes), has been described above. The features of this chip include high spatial resolution with 3150 electrodes per mm2 to attain cellular or subcellular resolution (electrode diameter 7 μm, pitch 18 μm, honeycomb pattern), great flexibility in routing the 126 channels to the 11 '016 recording sites, and low noise levels in the recordings (2.4 μVrms) so that single action potentials from mammalian cells can be monitored. The low noise levels also enable the recording of single-unit spike activity in acute slice preparations.
The chip has been electrically characterized with reference to Figs. 4-9. The equivalent input noise of the amplifiers only is 2.4 μVπns (1 Hz-100 kHz), 3.9 μ V1711S for blank Pt-electrodes in physiological solution and 3.0 μVms for dendritic Pt-black electrodes in physiological solution. Additionally, the AD converter contributes 0.5 LSB quantization noise. Fig. 12 shows recordings from rat cardiomyocytes cultured for 4 days in vitro. The left panel shows a propagation pattern of an electrical wave; the position of the electrodes is marked by dots, the times on the contour lines are given in milliseconds. The right upper panel shows the averaged signal shape from all electrodes (gray lines ±σ). In the middle a 10 second trace of the channel marked with a diamond is shown. Below, a raster plot that shows the timestamps from all channels is displayed. First biological tests and measurements have been performed with neurons and cardiomyocytes. The electrodes were configured as an 11x11 grid spanning the whole array area, and the gain was set to 300, i.e., 40 μV LSB. The cells formed a confluent layer that was beating/contracting at a frequency of 0.73±0.05 Hz. The peak-to-peak amplitude was measured to be 2.5±1.1 mV and significantly varied across the chip as a consequence of the morphology of the cell layer. The spike width (time between max-min) was 0.3 ms, and the wave propagation speed was 348±18 mm/s.
Fig. 13 shows a signal from acute parasagittal cerebellar slice from a Long-Evans rat. The two selected channels are located at a distance of 38 μm from each other. The array was configured to read out coherent blocks of electrodes at a gain of 5000 (LSB is 2.3 μV). The two displayed traces originate from electrodes that are located 38 μm apart from each other.
Conclusion:
The presented system enables high signal-to-noise and high-spatial-resolution recordings from a configurable subset of 126 electrodes out of a total of H '016 electrodes. For several biological applications, especially brain slices, it is advantageous to have low-noise recordings and to adapt the electrode layout to the morphology of the biological structure. The fabrication and processing of the tightly spaced electrodes and the packaging of the chips with regard to the harsh operating conditions represent major challenges that have been faced and addressed.
Recordings from cardiomyocytes and single-spike recordings from an acute brain slice preparation have been achieved.
Fig. 14 shows the noise level versus electrode density of the proposed system in comparison to other systems. The noise values are estimates of the rms noise from 1 Hz to 10 kHz. Noise levels are difficult to compare, due to different measurement conditions (with/without cells, cell types, electrode material, electrode size), the actual values may therefore slightly vary. Also listed are two commercially available passive MEA systems (see [5], [6]).
REFERENCES
A few references of other approaches to high-density electrode arrays (they do not use architectures similar to the one presented, just describe other solutions for the same problem):
[1] L. Berdondini, P. V. der WaI, O. Guenat, N. de Rooij, M. Koudelka-Hep, P. Seitz, R. Kaufmann, P. Metzler, N. Blanc, and S. Rohr, "High-density electrode array for imaging in vitro electrophysiological activity," Biosensors Bioelectronics, vol. 21, pp. 167 - 174, 2005.
[2] B. Eversmann, M. Jenkner, F. Hofmann, C. Paulus, R. Brederlow, B. Holzapfl, P. Fromherz, M. Merz, M. Brenner, M. Schreiter, R. Gabl, K. Plehnert, M. Steinhauser, G. Eckstein, D. Schmitt-Landsiedel, and R. Thewes, "A 128 x 128 CMOS biosensor array for extracellular recording of neural activity," vol. 38, pp. 2306 - 2317, 2003.
[3] F. Heer, S. Hafizovic, W. Franks, T. Ugniwenko, A. Blau, C. Ziegler, and A. Hierlemann, "CMOS microelectrode array for bidirectional interaction with neuronal networks," in Proc. Eur. Solid-State Circuits Conf, Grenoble, France, 2005, pp. 335 - 338.
[4] R. H. I. I. I. Olsson, D. L. Buhl, A. M. Sirota, G. Buszaki, and K. D. Wise, "Band-tunable and multiplexed integrated circuits for simultaneous recording and stimulation with microelectrode arrays," Biomedical Engineering, IEEE Transactions on, vol. 52, pp. 1303 - 1311, 2005.
Commercially available passive MEA systems:
[5] www.multichannel systems . com
[6] www.med64.com
[7] G. Gross et al., "The use of neuronal networks on multielectrode arrays as biosensors," Biosens. Bioelectron. , vol. 10, pp. 553-567, 1995.
[8] J. Pine, "Recording action potentials from cultured neurons with extracellular microcircuit electrodes," J Neurosci Methods, vol. 2, no. 1, pp. 19-31, 1980. [9] W. Rutten, "Selective electrical interfaces with the nervous system," Annual Review Of Biomedical Engineering, vol. 4, pp. 407-452, 2002.
[10] G. Gholmieh et al., "Custom-designed high-density conformal planar multielectrode arrays for brain slice electrophysiology," J Neurosci Methods, vol. 152, no. 1-2, pp. 116-29, 2006. (April 2006)
[11] M. Hutzler et al., "High-Resolution Multitransistor Array Recording of Electrical Field Potentials in Cultured Brain Slices," J Neurophysiol, vol. 96, no. 3, pp. 1638-1645, 2006. (September 2006)
[12] F. Heer et al., "CMOS microelectrode array for bidirectional interaction with neuronal networks," IEEE J. Solid-State Circuits, vol. 41, pp. 1620-1629, 2006. (July 2006)
[13] F. Heer et al., "Single-chip microelectronic system to interface with living cells," Biosens. Bioelectron., 2007, Vol. 22, pp 2546-2553. (May 2007).
[14] J. Rose and S. Brown, "Flexibility of interconnection structures for field- programmable gate arrays," IEEE Journal of Solid-State Circuits, vol. 26, pp. 277 - 282, 1991.
[15] Y.- W. Chang, D. F. Wong, and C. K. Wong, "Universal switch modules for FPGA design," ACM Trans. Des. Autom. Electron. Syst, vol. l,no. 1, pp. 80 - 101, 1996.

Claims

WHAT IS CLAIMED IS:
1. Device, comprising
- a transducer array featuring a plurality of transducers;
a plurality of channels, each channel having its own channel unit for signal processing and/or generation, said channel unit being located outside the transducer array itself;
- routing means for routing signals from a subset of transducers to the channel units and/or vice versa.
2. Device as claimed in claim 1, wherein the routing means comprise an array of switches and memory units for configuration of the switches embedded into the transducer array.
3. Device as claimed in claim 1 or 2, wherein the routing means comprise
a two- or higher-dimensional bus;
- a plurality of switches that connect the transducers to the bus and/or vice versa; a plurality of memory units that determine the status of the switches.
4. Device as claimed in claim 3, wherein the bus is an analog bus and the switches are analog switches.
5. Device as claimed in claim 3 or 4, wherein the memory units are SRAM or DRAM cells.
6. Device as claimed in one of the preceding claims, wherein the routing means comprise
a two or higher-dimensional analog bus integrated in or underneath the transducer array;
- an array of analog switches and memory units for configuration of the switches embedded within the transducer array,
- wherein the switches connect the transducers to the bus and/or vice versa and determine how the signal is routed out of and/or into the transducer array.
7. Device as claimed in one of the preceding claims, wherein the routing means comprise
- a plurality of wires arranged such that each transducer is connectable to more than one channel unit, thereby forming more than one theoretically possible readout and/or actuation route for each transducer, and a reconfigurable matrix of analog switches capable of affecting signal transfer through the wires in order to determine at the most one route from all theoretically possible routes for each transducer.
8. Device as claimed in one of the preceding claims, wherein the channel unit includes a signal conditioning unit, such as a continuous-time filtering and amplification stage.
9. Device as claimed in one of the preceding claims, wherein the channel unit inludes an actuation or stimulation stage.
10. Device as claimed in one of the preceding claims, wherein the channel unit inludes signal conditioning units and, at the same time, actuation or stimulation stages.
11. Device as claimed in one of the preceding claims, wherein the number of channel units is smaller than the number of transducers.
12. Device as claimed in one of the preceding claims, wherein the transducers are microelectrodes that are adapted to record electrical signals from the exterior, in particular electrical signals generated by electrogenic cells.
13. Device as claimed in claim 12, wherein the transducers or electrodes are capable of delivering an electrical signal to the exterior, in particular to stimulate electrogenic cells.
14. Device as claimed in one of the preceding claims, further comprising computing means for determining a configuration of the routing means such that predetermined subsets of transducers are routed to the respective channels.
15. Device as claimed in claim 14, further comprising configuration means adapted to configure the routing means in accordance with the configuration determined by the computing means.
16. Method for configuring a device as claimed in one of the preceding claims for detection of signals from a plurality of interesting spots located in proximity to the array transducers, comprising the following steps:
- Selecting a subset of transducers corresponding to the plurality of interesting spots and selecting a routing scheme that connects each of the transducers of the subset to a readout or actuation channel;
Configuring the routing means in accordance with said selected routing scheme.
17. Method according to claim 16, wherein the step of selecting a subset of transducers and a routing scheme comprises
i) selecting a subset of transducers,
ii) determining a routing scheme that connects each of the transducers to a channel, or, if no routing scheme is found, iii) repeating steps i) and ii) with a modified subset of transducers.
18. Method according to one of claims 16 to 17, wherein the step of selecting a subset of transducers and a routing scheme comprises applying a general integer linear program to determine the routing scheme.
19. Method according to one of claims 16 to 18, wherein the step of configuring the routing means comprises generating a bitstream and using it to configure a matrix of analog switches, said matrix being a part of the routing means.
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