WO2008020386A1 - Power amplifier - Google Patents
Power amplifier Download PDFInfo
- Publication number
- WO2008020386A1 WO2008020386A1 PCT/IB2007/053193 IB2007053193W WO2008020386A1 WO 2008020386 A1 WO2008020386 A1 WO 2008020386A1 IB 2007053193 W IB2007053193 W IB 2007053193W WO 2008020386 A1 WO2008020386 A1 WO 2008020386A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- voltage
- power amplifier
- coupled
- transistor
- current
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2171—Class D power amplifiers; Switching amplifiers with field-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
- H03F1/523—Circuit arrangements for protecting such amplifiers for amplifiers using field-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/471—Indexing scheme relating to amplifiers the voltage being sensed
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/78—A comparator being used in a controlling circuit of an amplifier
Definitions
- Fig. 1 depicts a typical audio class D amplifier.
- Class-D audio amplifiers are becoming popular in multi-channel DVD receiver systems and in TV applications. The most important feature is high efficiency. Typical efficiency is well above 90% and may be achieved at full power. As a result a smaller heat sink or higher output power, with the same heat sink, is obtainable.
- the power amplifier further comprises a comparator for receiving the first current and the second current and for generating a voltage for controlling a pre-diver circuit, the pre-driver circuit controlling the first driver and the second driver.
- the two output currents, of the V/I converters are compared to each other.
- the comparator includes a hysteresis function, trigger and release reference, in this embodiment determined by a change of a conversion factor of the second voltage to current converter.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention refers to a power amplifier comprising a first transistor (M1) having a first conducting channel and a second transistor (M2) having a second conducting channel, the first conducting channel being coupled in series with the second conducting channel and further coupled to an output node (2). The power amplifier further comprises a first driver circuit (10) coupled to a first control electrode of the first transistor (M1), a second driver circuit (20) coupled to a second control electrode of the second transistor (M2) and a bootstrap capacitor (Cboot) coupled between the output node (2) and a node (1) of the first driver circuit (10) and a first sensor circuit (40) coupled in parallel to the bootstrap capacitor (Cboot).
Description
POWER AMPLIFIER
FIELD OF THE INVENTION
The invention relates to a power amplifier.
BACKGROUND OF THE INVENTION Power amplifiers are very much used in different area of electronics as motor driving, audio, video etc.
A main feature of these amplifiers is their efficiency. According to an increase in their efficiency there are class A, B, C, D etc. amplifiers.
Fig. 1 depicts a typical audio class D amplifier. Class-D audio amplifiers are becoming popular in multi-channel DVD receiver systems and in TV applications. The most important feature is high efficiency. Typical efficiency is well above 90% and may be achieved at full power. As a result a smaller heat sink or higher output power, with the same heat sink, is obtainable.
Integrated class-D amplifiers have been reported, too. These amplifiers are implemented using bipolar, CMOS and high power DMOS transistors.
A typical class-D power stage is built using two NDMOS power transistors, for economical reasons, as shown in Fig. 1 transistors ML and MR. The low side power transistor uses an externally decoupled voltage Vreg for the low side driver D2 supply voltage. The high side power transistor uses a bootstrap capacitor CBOOT, which is connected between the output VOUT and VBOOT for the high side driver Dl supply voltage.
Each time that the output node is low, CBOOT is charged by VREG via a diode DBOOT-
Switch control module translates the input signal which is pulse wide modulated to appropriate signals for the high side driver and low side driver.
Power transistors are switched on and off according to the input signal. Finally, a second order filter connected at the output could reproduce the audio signal.
Large driver supply voltage differences, between the highside and lowside powers, result in timing errors. Timing errors could result in shoot-through current and finally in destruction of the powerstage.
The low side driver voltage is made by an internal buffer, which is also buffered by an external capacitor. The high side driver voltage, voltage across CBOOT, is discharged because of its load current. Hence, a high side driver voltage protection, which prevents timing errors, is necessary.
SUMMARY OF THE INVENTION Hence, there is a need for an improved power amplifier, which overcomes at least part of the above-mentioned setbacks. The invention is defined by the independent claims. Dependent claims define advantageous embodiments.
This object is achieved in a power amplifier comprising: a first transistor (Ml) having a first conducting channel; - a second transistor (M2) having a second conducting channel, the first conducting channel being coupled in series with the second conducting channel and further coupled to an output node (2); a first driver circuit (10) coupled to a first control electrode of the first transistor (Ml); - a second driver circuit (20) coupled to a second control electrode of the second transistor (M2); a bootstrap capacitor (Cboot) coupled between the output node (2) and a node (1) of the first driver circuit (10); and a first sensor circuit (40) coupled in parallel to the bootstrap capacitor (Cboot). A solution might be the use of a sensor circuit, which is placed in parallel to the bootstrap capacitor. If the capacitor voltage reaches a minimum level, an enable signal will be low. Otherwise it will be high.
However there are some disadvantages of this solution.
Sensor circuit requires a large quiescent current. Nominal: = 300 μA, which is a significant load for CBOOT • Trigger level and quiescent current depends on process spread and ambient temperature. Trigger level may be as high as 8 V (fixed). However, the trigger level should depend on actual VREG value. Difference between actual VREG and VBOOT should be monitored. Known solution does not work properly at supply voltages below or identical
to VREG because of its fixed trigger level. If the bootstrap voltage VBOOT is too low, amplifier will be switched floating.
Hence, in an embodiment of the invention the sensor comprises a voltage to current converter. The solution has the advantage that the sensor circuit requires a small quiescent current extracted from CBOOT, nominal: = 45 μA, i.e. a substantial lower current than in known solution. Furthermore, the circuit occupies a smaller area that in the known solution.
In an embodiment of the invention the voltage to current converter comprises at least one transistor circuit for receiving the output voltage on a control electrode and the bootstrap voltage on a source-like electrode and for generating the first current via a drain- like electrode. We have used the term source - like and drain - like electrode for indicating that a solution using bipolar transistors is also possible and the source corresponds to the emitter and the drain to the collector, respectively. It should also be mentioned here that n- channel and p-channel MOS transistors may be used as well as pnp, npn bipolar ones. In an embodiment of the invention the power amplifier comprises a further capacitor Creg having a first terminal coupled to a common supply terminal and a second terminal coupled to first terminal of a diode, the diode having a second terminal coupled to the node of the first driver, the power amplifier further comprising a second voltage to current converter in parallel to the further capacitor for generating a second current proportional to a voltage across the further capacitor. The solution has the advantage that its behavior over process spread and temperature is matched.
In a further embodiment of the invention the power amplifier further comprises a comparator for receiving the first current and the second current and for generating a voltage for controlling a pre-diver circuit, the pre-driver circuit controlling the first driver and the second driver. The two output currents, of the V/I converters are compared to each other. The comparator includes a hysteresis function, trigger and release reference, in this embodiment determined by a change of a conversion factor of the second voltage to current converter.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other advantages will be apparent from the exemplary description of the accompanying drawings in which:
Fig. 1 depicts a prior-art class D amplifier;
Fig. 2 depicts a power amplifier according to the invention;
Fig. 3 depicts a more detailed view of the power amplifier according to the invention;
Fig. 4 depicts a detailed view of the power amplifier according to the invention; and Fig. 5 depicts a more detailed view of the sensor circuit.
DETAILED DESCRIPTION OF EMBODIMENTS
Fig. 2 depicts a power amplifier according to the invention.
The power amplifier shown in Fig. 2 comprises a first transistor Ml having a first conducting channel and a second transistor M2 having a second conducting channel, the first conducting channel being coupled in series with the second conducting channel and further coupled to an output node 2. The circuit further comprises a first driver circuit 10 coupled to a first control electrode of the first transistor Ml and a second driver circuit 20 coupled to a second control electrode of the second transistor M2. A bootstrap capacitor Cboot is coupled between the output node 2 and a node 1 of the first driver circuit 10. A first sensor circuit 40 coupled in parallel to the bootstrap capacitor Cboot, the first sensor circuit 40 comprising a voltage to current converter 50, shown in Fig. 3, for generating a first current IBOOT proportional with a voltage across the bootstrap capacitor Cboot-
The power amplifier comprises a further capacitor Creg having a first terminal coupled to a common supply terminal Vss and a second terminal coupled to a first terminal of a diode D, the diode having a second terminal coupled to the node 1 of the first driver 10. The power amplifier further comprises a second voltage to current converter 60, shown in Fig. 3, in parallel to the further capacitor Creg for generating a second current X*IVREG proportional to a voltage across the further capacitor Creg. The power amplifier as claimed in claim 4 further comprises a comparator 70, as shown in Fig. 3, for receiving the first current IBOOT and the second current X*IVREG and generating a voltage VBOOTOK for controlling a pre-diver circuit 30, 90, the pre-driver circuit controlling the first driver 10 and the second driver 20. The two voltage to current converters are substantially identical so that their behavior over process spread and temperature is matched.
One is used to convert VREG into a constant X*IREG current. Preferably, the current may be modified via the conversion factor X.
The first converter is used for converting the measured voltage over CBOOT i.e. VBOOT - VOUT into a current IVBOOT- This voltage decreases in time because of the load connected.
The bootstrap capacitor CBOOT should be charged if the voltage over it decreases till a certain level. That level also determines a certain IVBOOT level.
The two output currents, of the V/I converters, are compared with each other. The comparator 70 includes a hysteresis function, having a trigger and release reference. In this case determined by, changing the value of, factor X.
In normal operating conditions, the bootstrap capacitor is fully charged, so VBOOTOK is high. If the voltage over the bootstrap capacitor CBOOT, which is converted into IVBOOT, decreases till its trigger current level [X*IREG], and VBOOTOK will become low. Under this condition, the bootstrap capacitor will be charged.
Charging of the boot capacitor continues till the current IVBOOT becomes equal or higher then it releases current level X*IREG- Then VBOOTOK will be high again. Some advantages of this solution are:
There is no high frequency coupling. The voltage across switched CBOOT is transferred to a stable supply current source.
Sense circuit requires a small quiescent current extracted from CBOOT •
Nominal: = 45 μA, while the prior art solution requires = 300 μA. - Small area.
Trigger level is almost constant and a fixed fraction below the reference voltage [VREG]. Thus, a lower supply voltage results in a lower VREG reference voltage and the trigger level is still a fixed fraction below that reference level.
Fig. 4 depicts a detailed view of the power amplifier according to the invention. If the sense circuit determines that the voltage VBOOT - VOUT is too low, the bootstrap capacitor should be charged. Status information of the CBOOT voltage is available in the VBOOTOK signal.
Charging the bootstrap capacitor CBOOT is implemented by forcing the output to ground or low voltage, function implemented in block 90 in Fig. 4. The amplifier will operate in its normal mode again if CBOOT is charged till the release level.
These sense and charge method can be used in applications using a switching output stage with power MOSFETS such as in class-D systems, motor drivers and in switched mode power systems and practically, in any system which requires a bootstrap capacitor.
Fig. 5 depicts a more detailed view of the sensor circuit. The first sensor circuit 40 comprises a voltage to current converter 50 for generating a first current IBOOT proportional with a voltage across the bootstrap capacitor
Cboot- The voltage to current converter comprises at least one transistor circuit 51 for receiving the output voltage on a control electrode and the bootstrap voltage on a source-like electrode and for generating the first current via a drain-like electrode. We have used the term source - like and drain - like electrode for indicating that a solution using bipolar transistors is also possible and the source corresponds to the emitter and the drain to the collector, respectively. It should also be mentioned here that n-channel and p-channel MOS transistors may be used as well as pnp, npn bipolar ones. Furthermore, a chain of transistors having their control electrodes connected together and their main current path connected in series i.e. drain-like terminal coupled to a next transistor source-like terminal may also be used.
It is remarked that the scope of protection of the invention is not restricted to the embodiments described herein. Neither is the scope of protection of the invention restricted by the reference numerals in the claims. The word "comprising" does not exclude other parts than those mentioned in the claims. The word "a(n)" preceding an element does not exclude a plurality of those elements. Means forming part of the invention may both be implemented in the form of dedicated hardware or in the form of a programmed purpose processor. The invention resides in each new feature or combination of features.
Claims
1. A power amplifier comprising: a first transistor (Ml) having a first conducting channel; a second transistor (M2) having a second conducting channel, the first conducting channel being coupled in series with the second conducting channel and further coupled to an output node (2); a first driver circuit (10) coupled to a first control electrode of the first transistor (Ml); a second driver circuit (20) coupled to a second control electrode of the second transistor (M2); - a bootstrap capacitor (Cboot) coupled between the output node (2) and a node
(1) of the first driver circuit (10); and a first sensor circuit (40) coupled in parallel to the bootstrap capacitor (Cboot).
2. A power amplifier as claimed in claim 1, wherein the first sensor circuit (40) comprises a voltage to current converter (50) for generating a first current (IBOOT) proportional with a voltage across the bootstrap capacitor (Cboot).
3. A power amplifier as claimed in claim 2, wherein the voltage to current converter comprises at least one transistor circuit (51) for receiving the output voltage on a control electrode and the bootstrap voltage on a source-like electrode and for generating the first current via a drain-like electrode.
4. A power amplifier as claimed in any of the preceding claims, comprising a further capacitor (Creg) having a first terminal coupled to a common supply terminal (Vss) and a second terminal coupled to first terminal of a diode (D), the diode having a second terminal coupled to the node (1) of the first driver, the power amplifier further comprising a second voltage to current converter (60) in parallel to the further capacitor (Creg) for generating a second current (X*IVREG) proportional to a voltage across the further capacitor
(Creg).
5. A power amplifier as claimed in claim 5, further comprising a comparator (70) for receiving the first current (IBOOT) and the second current (X*IVREG) and generating a voltage (VBOOTOK) for controlling a pre-diver circuit (30, 90), the pre-driver circuit controlling the first driver (10) and the second driver (20).
6. A power amplifier as claimed in any of the preceding claims wherein the first transistor and the second transistor a n-channel DMOS transistors.
7. A power amplifier as claimed in any of the preceding claims integrated on a single chip.
8. A class D power amplifier including a power amplifier as claimed in any of the preceding claims.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP06118977 | 2006-08-16 | ||
| EP06118977.5 | 2006-08-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2008020386A1 true WO2008020386A1 (en) | 2008-02-21 |
Family
ID=38776208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/IB2007/053193 WO2008020386A1 (en) | 2006-08-16 | 2007-08-10 | Power amplifier |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2008020386A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106549576A (en) * | 2017-01-12 | 2017-03-29 | 威海新北洋正棋机器人股份有限公司 | A kind of power circuit and control system |
| CN108880203A (en) * | 2018-07-31 | 2018-11-23 | 杭州国彪超声设备有限公司 | A kind of ultrasonic-frequency power supply driving circuit |
| GB2593279A (en) * | 2020-02-07 | 2021-09-22 | Cirrus Logic Int Semiconductor Ltd | Dual bootstrapping for an open-loop pulse width modulation driver |
| US11190168B2 (en) | 2018-02-19 | 2021-11-30 | Cirrus Logic, Inc. | Dual bootstrapping for an open-loop pulse width modulation driver |
| GB2585794B (en) * | 2018-02-19 | 2022-04-20 | Cirrus Logic Int Semiconductor Ltd | Dual bootstrapping for an open-loop pulse width modulation driver |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5365118A (en) * | 1992-06-04 | 1994-11-15 | Linear Technology Corp. | Circuit for driving two power mosfets in a half-bridge configuration |
| EP0753934A1 (en) * | 1995-07-13 | 1997-01-15 | STMicroelectronics S.r.l. | Single-output dual-supply class D amplifier |
| US5627460A (en) * | 1994-12-28 | 1997-05-06 | Unitrode Corporation | DC/DC converter having a bootstrapped high side driver |
| EP0945972A1 (en) * | 1996-08-08 | 1999-09-29 | Kabushiki Kaisha Yaskawa Denki | Inverter driving method |
-
2007
- 2007-08-10 WO PCT/IB2007/053193 patent/WO2008020386A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5365118A (en) * | 1992-06-04 | 1994-11-15 | Linear Technology Corp. | Circuit for driving two power mosfets in a half-bridge configuration |
| US5627460A (en) * | 1994-12-28 | 1997-05-06 | Unitrode Corporation | DC/DC converter having a bootstrapped high side driver |
| EP0753934A1 (en) * | 1995-07-13 | 1997-01-15 | STMicroelectronics S.r.l. | Single-output dual-supply class D amplifier |
| EP0945972A1 (en) * | 1996-08-08 | 1999-09-29 | Kabushiki Kaisha Yaskawa Denki | Inverter driving method |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106549576A (en) * | 2017-01-12 | 2017-03-29 | 威海新北洋正棋机器人股份有限公司 | A kind of power circuit and control system |
| CN106549576B (en) * | 2017-01-12 | 2019-02-15 | 威海新北洋正棋机器人股份有限公司 | A kind of power circuit and control system |
| US11190168B2 (en) | 2018-02-19 | 2021-11-30 | Cirrus Logic, Inc. | Dual bootstrapping for an open-loop pulse width modulation driver |
| GB2585794B (en) * | 2018-02-19 | 2022-04-20 | Cirrus Logic Int Semiconductor Ltd | Dual bootstrapping for an open-loop pulse width modulation driver |
| CN108880203A (en) * | 2018-07-31 | 2018-11-23 | 杭州国彪超声设备有限公司 | A kind of ultrasonic-frequency power supply driving circuit |
| GB2593279A (en) * | 2020-02-07 | 2021-09-22 | Cirrus Logic Int Semiconductor Ltd | Dual bootstrapping for an open-loop pulse width modulation driver |
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