WO2008099293A1

WO2008099293A1 - Digital control of an analog signal filter

Info

Publication number: WO2008099293A1
Application number: PCT/IB2008/050397
Authority: WO
Inventors: Axel Kattner; Michael Mietz
Original assignee: Nxp B.V.
Priority date: 2007-02-12
Filing date: 2008-02-04
Publication date: 2008-08-21

Abstract

Method and circuit for controlling and for adjusting a signal filter in an easy, cost effective and discrete way comprising: an analog signal filter unit (11) and a filter control unit (12) coupled to the analog signal filter unit (11), wherein the filter control unit (12) is adapted to measure a real RC-product of the circuit chip (10), the filter control unit (12) further comprising: a digital control unit (13) for determining the RC-product, an adjustable RC network (14), and a comparator (16) adapted to receive a voltage signal from the RC network (14) and a reference signal (V Ref ), wherein the comparator (16) outputs a stop signal (17) under predetermined conditions, the stop signal (17) being provided to the digital control unit (13) for controlling the adjustable RC network (14), wherein the digital control unit (13) evaluates the adjustment of the RC combination (14) based on a time duration needed for obtaining the stop signal (17), wherein the analog signal filter unit (11) is adjusted based on the measured RC-product.

Description

Digital control of an analog signal filter

FIELD OF THE INVENTION

The invention relates to a semiconductor circuit chip including an analog signal filter. Moreover, it relates to a method for controlling an analog signal filter of a semiconductor circuit chip. Further, it relates to a device having a receiving unit including a tuner using such semiconductor circuit chip.

BACKGROUND OF THE INVENTION Modern integrated semiconductors circuit chips are operated at low supply voltages. Common analog signal filters are used for receivers, tuners or IF-ICs in portable or mobile terminals or in the automotive area. Such mobile terminals should consume as little power as possible to increase the operation of the battery. Further, such receiving devices additionally have a standby mode to reduce the power consumption. A first possibility to reduce the power consumption is to reduce the operation voltage of the integrated circuit chips. Thus, the circuit chips used in such devices are produced with a low voltage process for being operated with low supply voltages.

However, due to process variations, temperature variations and aging of the chips it is difficult to provide integrated filters or selectivities having steep slopes and high accuracies. Therefore, is it necessary to provide tuning loops for controlling integrated filters in such low power circuit chips.

Conventionally MO S -transistors are used in common processes as controllable components for controlling analog signal filters. But, such MO S -transistors could not be used in low power processes due to their non-linear behavior in the low voltage process. Additionally, the driving range of these components is getting smaller due to the low supply voltage. Therefore, the signal to noise ratio is decreased. However, such filters require a high signal to noise ratio, which could be provided with high signal amplitudes. Additionally, in low power processes further circuits generate disturbances like spikes or ground bouncing due to their switching processes. Such circuit arrangement is described in EP 0 957 635A2.

OBJECT AND SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a semiconductor circuit chip produced with a low voltage process including an integrated analog signal filter having steep slopes and high requirements to accuracy. Further, it is an object of the present invention to provide a low voltage semiconductor circuit chip and a method for controlling a signal filter and for adjusting the signal filter in an easy, cost effective and discrete way.

The object is solved by the features of the independent claims. In particular, the present invention is based on the thought to divide an analog signal filter and a filter control unit including a reference circuit. The reference circuit and the analog signal filter are realized on the same circuit chip, so they are produced under the same process characteristics. The adjustments required to control the analog signal filter are determined in the filter control unit and then applied to the analog signal filter. By dividing the analog signal filter and the filter control unit including the reference circuit, the influence on the signal path during adjusting is kept very low.

The filter control unit according to the invention comprises an adjustable RC- combination. The adjustable RC-combination uses preferably passive components, which could be activated or connected to the RC-combination to be operative when determining the adjustments. By using such adjustable RC-combination with passive components, a high linearity is achieved in the signal filter. Thus, a high ldb-compression point and a high intermediate point could be achieved.

Due to the separation of the analog signal filter, which is controlled by the filter control unit, it is possible to repeat the adjustment of the analog signal filter during operation at any time. This facilitates to compensate process variations in the analog signal filter, wherein by repeating the adjustment during the operation a temperature drifting and aging effects could be compensated.

Therefore, the present invention proposes to have a filter control unit, which is coupled to the analog signal filter. The filter control unit is provided for measuring a real RC- product or a time constant tau of the circuit chip. Since the filter control unit is located on the same chip like the analog signal filter, the measured RC-product could be used for adjusting the analog signal filter.

The filter control unit comprises a digital control unit, an adjustable RC- combination and a comparator. The adjustable RC-combination comprises a plurality of components like switchable capacitors and/or switchable resistors. The adjustable RC- combination is coupled to the digital control unit, which is controlling the process of measuring the real RC-product. The real RC-product is measured by iteratively checking whether a certain switchable capacitor or switchable resistor of the adjustable RC- combination is required for tuning the real RC-product to a wanted optimum. By this iteratively checking process the real RC-product of the circuit chip is fine tuned in a stepwise manner. The adjustable RC-combination is composed of a parallel connection of switchable capacities and / or a series connection of switchable resistors and/or of a parallel connection of switchable resistors. By switching the certain capacities and / or resistors it is possible to change the time constant of the adjustable RC-combination and thereby the time needed for charging the respective capacity.

The digital control unit determines for all switchable components its necessity to reach a wanted optimum RC-product by the following procedure:

A first switch for a first component adjustment is set. Then the capacitors are discharged by use of a discharge switch. The filter control unit starts the charging process of the RC-combination by opening the discharge switch. The comparator of the filter control unit receives the charge voltage signal Vc of the RC-combination and a reference signal VR_ef. The comparator generates a stop signal, when the charge voltage Vc reaches the reference voltage VRef. The stop signal is provided to the digital control unit. Based on the duration time of the charging process the digital control unit evaluates whether the additional component is necessary to reach the optimum RC-product or not. Thereby the switch for the component is determined. The digital control unit repeats the procedure until the switches for all components are determined.

By determination of all switches the RC-product of the control circuit is successively approximated to the wanted RC-product. The information about the switch setting is used to adjust the analog signal filter unit in the same way. Thus, it is not necessary to provide a complex closed loop control together with the analog signal filter unit itself, which would additionally influence the signal path. Moreover, the effort for providing the adjustable RC combination and the digital control unit is very low in comparison with a closed loop control for the analog signal filter. By adjusting the analog signal filter based on the measured RC product it is possible to produce analog signal filters with low voltage processes, wherein the analog signal filter is able to provide a high signal to noise ratio despite the low amplitudes.

In a preferred embodiment, the adjustable RC-combination is realized as a passive RC-combination. The passive RC-combination includes at least one switchable resistor and/or at least one switchable capacitor. In particular, the digital control unit first discharges the RC-combination and then starts to set a first adjustable component of the RC- combination. After this first setting of an adjustable component of the RC-combination the RC-combination will be charged. During the charging process, the charge voltage signal Vc of the RC-combination is provided to the comparator, which is further receiving the predetermined reference signal VR_ef. The time for reaching the reference signal VR_ef is measured and used for evaluating whether the operative components of the RC-combination are required for measuring the real RC-product of the circuit chip.

To achieve a very fine graduation with a minimum of components, it is proposed to use a binary graduation of the switchable capacitors or resistors of the adjustable RC-combination. Thus, the accuracy of the adjustment is limited by the smallest value of the switchable components used in the adjustable RC-combination.

The analog signal filter is preferably realized as an active filter using active components as differential amplifiers and in most cases the analog signal filter is a filter of higher order. To apply the measured RC-product of the chip to the analog signal filter the number of switchable capacitors or resistors in the adjustable RC-combination of the filter control unit needs to be the same as the number of switchable capacitors of the adjustable capacity in the analog signal filter unit and/or needs to be the same as the number of switchable resistors of the adjustable resistor in the analog signal filter unit. After checking all switchable components of the RC-combination in the filter control unit, it is possible to apply the settings whether a certain component is required or not, directly to the switchable components of the analog signal filter unit, which corresponds in their number to the number of switchable components in the passive RC-combination.

As mentioned-above, a time value is used for determining whether a specific switchable capacitor or switchable resistor is required for determining the optimal RC- product.

In particular, if the time for reaching the reference voltage during charging the

RC-combination is below a predetermined time, this respective capacitor is required and necessary for adjusting the real RC-product to the optimal RC-product. If the time during charging the operative RC-combination is larger than a predetermined time, the operatively set RC-combination is not required for reaching the optimal RC-product.

After deciding whether a switchable component is required for a further alignment to the optimal RC-product, this decision is used in the next charging cycle. Thus, if it was decided to use a first capacity since the time for charging this capacity is below the predetermined time, a next switchable capacitor is activated together with the already decided capacitor. After charging both capacitors, it is decided whether the newly connected capacity should be used for a further alignment to the optimal RC-product.

Thus, after performing all cycles for the switchable capacitors or resistors the digital control unit knows which one of the switchable components are required to provide the optimal RC-product. These settings are applied to the analog signal filter unit. After a predetermined operation time of the circuit chip, this alignment process may be repeated. Since, such semiconductor circuit chips are often used in mobile phones or in an automotive area it is possible that these chips are operated over their whole lifetime in very different enviromental conditions without being switched off once. Thus, an alignment is required also after a certain operation time to adapt the analog signal filter unit to the environmental conditions. In particular, in the automotive area semiconductor circuit chips are exposed to high variations in temperature and humidity. These variations influence the performance of the chip very drastically. Thus, it is really necessary to perform periodically an alignment to adjust the filter to the optimal RC-product of the circuit chip. In a further preferred embodiment of the invention, the digital control unit is coupled to a counter, which is counting the clocks for deciding whether a switchable component is required for providing the optimal RC-product or not. The counter may be provided on the chip, but it is also possible to use an outside counter. The determination of the number of clocks used for the decision depends on the accuracy, which should be achieved by the analog signal filter. For example: The time constant of the RC product varies under process conditions by +-20%. Charging the nominal RC product up to the reference voltage would lead to a nominal time tnom. Charging the lowest RC product would lead to a minimum time tmin. Charging the highest RC product would lead to a maximum time tmax. The number of counter clocks within the time difference tdel between tmax and tmin determines the resolution of the adjustment. If the adjustment of the analog filter aims at 2% the number of clocks within the possible time difference is 40/2=20 steps.

In a further preferred embodiment, the number of clocks for deciding whether to use a switchable component or not are equal for each switchable capacitor or resistor.

In a further preferred embodiment, the clock frequency is generated by a crystal oscillator to have a high frequency accuracy.

The digital control unit in the filter control unit may be realized as a state machine. Thus, their function may be performed by a microcontroller, which is realized in a base band processor or in a digital signal processor.

In a further preferred embodiment, the RC-combination of the filter control unit has the same sheet resistance and the same specific capacitance as the analog signal filter unit.

The object is further solved by a method for adjusting a RC-product of a semiconductor circuit chip as claimed in claim 19.

Moreover, the semiconductor circuit chip including an analog signal filter unit and a filter control unit as mentioned above are used in a device having a receiving unit and a tuner, wherein the tuner uses such analog signal filter unit for filtering respective signals.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. The invention will now be described in greater detail hereinafter, by way of non-limiting examples, with reference to the embodiments shown in the drawings.

Fig. 1 is a view illustrating a first embodiment of the semiconductor circuit chip according to the present invention;

Fig. 2 is a view illustrating an alternative circuit arrangement of the adjustable RC-combination;

Fig. 3 is another embodiment for the adjustable RC-combination;

Fig. 4 illustrates an analog signal filter used in the present invention; Fig. 5 illustrates a charging procedure for different RC-products according to the present invention;

Fig. 6 illustrates a charging procedure together with the digital control signals;

Fig. 7 illustrates the charging procedure for a plurality of settings of the adjustable RC-combination according to the present invention;

Fig. 8 illustrates schematic illustration of a tuner including a circuit arrangement according to the present invention;

Fig. 9 illustrates a circuit arrangement according to the prior art.

DESCRIPTION OF EMBODIMENTS

Fig. 1 illustrates a circuit arrangement according to the present invention. The semiconductor circuit chip as shown in fig. 1 may include further components. However, to concentrate on the present invention only the relevant parts necessary for explaining the present invention are shown. The circuit chip 10 includes a filter control unit 12 and an analog signal filter

11. The analog signal filter 11 receives a signal to be filtered at the signal path input and outputs a filtered signal at the signal path output. The analog signal filter unit 11 and the filter control unit 12 are produced in the same process and under same process condition. They are arranged on the same circuit chip. Thus, they have the same sheet resistance and the same specific capacitances. The filter control unit 12 includes a digital control unit 13 and an adjustable RC-combination 14. Further, there is a comparator 16 receiving a charging voltage Vc of the operative RC-combination and a reference voltage VR_ef. The adjustable RC-combination 14 includes a plurality of capacitances Cl-Cn, which are switchable via the switches Sl-Sn. Further, there is a basic capacity Cmin, which could not be switched. Moreover, a discharge switch SO is arranged for discharging the activated capacitors during the iteratively checking procedure. The adjustable RC-combination 14 is supplied with a charging voltage source Vq via the resistor R. The charging voltage Vc depends on the source voltage Vq and the time constant τ of the RC-product of the adjustable RC-combination. This charging voltage Vc is supplied to the comparator 16 and is there compared with a reference voltage VR_ef. VR_ef should be about 50 % of the source voltage Vq. As soon as a charging voltage Vc reaches the reference voltage VR_ef, a stop signal 17 is generated and supplied to the stop compare input of the digital control unit 13. When applying the stop compare signal 17 to the digital control unit 13, the charging procedure is stopped. During the charging procedure, a counter 19 provides a clock signal to the digital control unit 13. The digital control unit 13 counts the clocks during the charging procedure. The counter 19 may be provided on the same circuit chip. However, it is also possible to supply the clocks for counting from outside the circuit chip 10. The number of clocks during a charging procedure until the charging voltage Vc reaches the reference voltage VR_ef is a measure for the RC-product. By evaluating the number of clocks necessary for reaching the reference voltage VR_ef the digital control unit 13 is able to determine whether a certain adjustment of the adjustable RC-combination is required for reaching the optimal RC-product or not. In case that the predetermined number of clocks is exceeded during the charging procedure, it is decided by the digital control unit 13 not to use the checked adjustment of the adjustable RC-combination 14. In case that the number of clocks is below the predetermined number of clocks, the activated capacitance will be used for reaching the optimal RC-product of the chip.

The inventive discrete control procedure is based on charging the adjustable RC-combination with changed resistance- or capacity values to approach to the optimal RC- product or the optimal time constant τ. In fig. 1, the capacitors Cl-Cn are connected in parallel. In a first step, the capacitance Cl is activated by closing the switch Sl. Thus, the basic capacity Cmin and the first capacity Cl are connected in parallel. Before starting the charging procedure, the capacities Cl and Cmin are discharged by closing the discharge switch SO by use of the discharge signal 18. After opening the discharge switch SO, the charging procedure and the counting of the clocks in the digital control unit 13 start. After the charging voltage Vc reaches the reference voltage VR_ef, the counting is stopped.

After deciding whether the capacitiy Cl is necessary for reaching the optimal RC -product, the capacity Cl is used in the next charging process, if it is was decided that it is necessary. In case that it was decided that Cl is not necessary, the switch Sl is left open during the next charging process. In the next charging process, it is checked whether the capacity C2 is required for reaching the optimal RC-product. Switch S2 is closed. Before starting the next charging process, the operative capacity (Cmin+Cl+C2 or Cmin+C2 without Cl) is discharged by closing the discharge switch SO. When switch SO is opened again the counting process starts. The number of clocks necessary to reach the reference voltage VR_ef is evaluated by the digital control unit 13. In case that the capacity C2 is necessary to reach the optimal RC-product, the switch S2 is kept closed by the signal Ccap_2. Thus, the capacity C2 is charged in all following charging processes. After finishing the charging processes for all possible capacities Cl-Cn, the digital control unit 13 has determined which of the switches Sl-Sn and the respective capacities Cl-Cn assigned to the switches need to be close to reach the optimal RC-product. This adjustment is then applied to the analogue signal filter 11. The number of required charging processes corresponds to the number of switchable capacitors and the adjustable RC-combination 14.

In fig. 2 an alternative adjustable RC-combination is shown. The RC-product of the adjustable RC-combination 14 may be also realized by a parallel connection of a plurality of resistors, which may be activated by closing the switches Sl-Sn. Also in this case, it is necessary to check each resistor Rl to Rn, successively. After each charging process, the capacity of the adjustable RC-combination is discharged, by closing the discharge switch SO.

Another embodiment for realizing an adjustable RC-combination is shown in fig. 3. In this figure, each resistor Rl- Rn is connected in parallel with its switch Sl- Sn. Thus, in case that a respective resistor Rl-Rn is required, the respective switch Sl-Sn is open. In case that the resistor is not required to reach the optimal RC-product, the switch is closed.

Fig. 4 illustrates an analog signal filter 11, which is realized as an active filter including two differential amplifiers 41 and 42. Further, there are in each stage of the filter 11 the same number of switchable capacities Cl- Cn as in the adjustable RC-combination 14. Thus, the measured RC-combination of the adjustable RC-combination 14 may be directly applied to the RC-combination of the analog signal filter 11.

In case that the adjustable RC-combination 14 is realized through switchable resistors Rl-Rn as shown in fig. 2 and 3, also the higher order analog signal filter 11 needs to be realized with the same number of switchable resistors Rl-Rn in correspondence to the adjustable RC-combinations 14 as shown in figs. 2 and 3.

Fig. 5 illustrates the effect of process variations upon the time constant τ. For nominal process conditions the RC combination is charged to VR_ef during the time tnom. Is the RC product low ohmic then a short time tmin is necessary to reach the reference voltage VRef. Whereas for high ohmic RC product a large time tmax is necessary to reach the reference voltage VR_ef. The tuning system must be capable to handle the whole process variation and has to adjust the switchable RC combination to the nominal time constant by setting the correct switches and thereby adding the correct elements.

Fig. 6 illustrates a single charging process by illustrating the signals inputted or outputted at the digital control unit 13 or the voltage signals applied to the comparator 16.

Before starting the charging process, the discharge signal is applied to the discharge switch SO. After opening the discharge switch SO, the charging procedure starts. The count enable signal (not illustrated in fig. 1) is only a signal, which is a logical combination of a "not stopcompare signal" and a "not discharge signal". The time, in which the count enable signal is on a logical higher level, illustrates the time, in which the clocks are counted in the digital control unit 13. At the moment when the charging voltage Vc reaches the reference voltage VR_ef, the comparator 16 outputs the stop signal 17, which is inputted in the stop compare input of the digital control unit 13. When receiving the stop compare signals 17, the count enable signal is switched to the logical lower level. Thus, the digital control unit 13 stops counting the clocks. Then, the digital control unit 13 may evaluate whether the respective capacity, which was checked during the respective charging process, is necessary for reaching the optimal RC-product or not. On the right hand of the illustration of fig. 6, it could be recognized that a high discharge signal is outputted by the digital control unit 13 for closing the discharge switch SO to discharge the operative capacities of the adjustable RC-combination 14. At this moment, the charging voltage Vc drops to a lower level, which results also in a resetting of a stop compare signal outputted by the comparator 16. Then, a next charging process with a changed adjustment of the adjustable RC-combination 14 may be performed.

In fig. 7 a plurality of charging processes is shown. It could be recognized that after each charging process, the discharging is performed. After the discharging, which ends with an opening of the discharge switch SO, the count-enable goes up and starts the charging and counting process in the digital control unit 13.

Fig. 8 illustrates an application of the circuit arrangement according to the present invention. The circuit arrangement including the filter control unit 12 and the analog filter 11 may be applied in a tuner 80, which may be used in a mobile phone.

The tuner 80 includes an input receiving stage 81 having an adjustable input amplifier and the mixing stages for mixing the in phase signal I and the quadrature signal Q. The resulting I and Q signals are inputted in the analog signal filter 11 , which is realized in this tuner 80 as an IF filter. The output of the IF-filter 11 is provided to adjustable output amplifiers 82 and 83. The analog signal filter 11 of the tuner 80 is coupled to a filter control unit 12 as shown in figs. 1, 2 or 3. By use of the adjustable RC-combination 14 in the filter control unit 12, it is possible to fine-tune the RC-product easily with the above-mentioned iterative checking process and then to apply the measured RC-product to the analog signal filter 11 in the tuner 80. Thus, the signal path is not disturbed during adjusting the analog signal filter 11.

Further, it is possible to repeat the adjustment of the analog signal filter 11 at predetermined events or time periods. An adjustment of the analog filter unit 11 may be performed during initializing the tuner 80 for eliminating process variations. However, during the operation of the tuner chip a repeated adjustment is possible for compensating temperature variations and aging effects. By applying a dithering during the adjustment of the filter control unit 12, the resulting frequencies of disturbances from the digital control of the adjustment are extended to a broad frequency spectrum for minimizing the disturbance of the analog circuits.

Fig. 9 illustrates a circuit according to the prior art. In the circuit according to the prior art the signal filter 91 also receives an input signal Sin and output signal Sout, wherein the signal filter 91 is controlled by a control voltage Vcon, which is outputted by a filter control unit 92. The filter control unit 92 includes a reference filter 93, which receives also an input signal Fref. The control is performed continuously by use of a control voltage Vcon, wherein the signal filter 91 is controlled by the same control voltage Vcon. The controlling element in the filter control unit is a MO S -transistor, which channel resistance is changed by changing the gate voltage of the MOS-transistor. The control of the filter control unit 92 is based by inputting the reference frequency into to the reference filter 93. The reference filter 93 shifts the phase of the reference signal Fref by 90°. A phase detector 94 receives the original reference signal Fref and the shifted signal and controls the voltage at the capacity 95 by its output current. The voltage over the capacity 95 controls the frequency of the reference filter 93 and thereby the shifting of the phase caused by the reference filter 93. The control voltage Vcon is changed as long until the reference filter 93 shifts the inputted reference frequency Fref by 90°. Controlling is done continuously for the reference filter 93. The signal filter 91 runs in parallel. Thus all effects in the control loop are influencing the signal path. Such continuous control is not possible with low power circuit chips, since the signal linearity is very low and the tuning range does not fit for low voltage processes.

By providing the inventive circuit arrangement having an analog signal filter unit 11 and a filter control unit 12, which is controlling the analog signal filter 11 in a discrete way, it is possible to provide a very cheap filter control unit 12, which is also able to perform an adjustment of the analog signal filter 11 during operating the signal filter without influencing the signal path.

Claims

CLAIMS:

1. Semiconductor circuit chip for controlling an integrated analog signal filter unit, comprising: an analog signal filter unit (11) and a filter control unit (12) coupled to the analog signal filter unit (11), wherein the filter control unit (12) is adapted to measure a real RC -product of the circuit chip (10), the filter control unit (12) comprises: a digital control unit (13) for determining the real RC-product, an adjustable RC-combination (14), and a comparator (16) adapted to receive a voltage signal of the RC combination (14) and a reference signal (VRef), wherein the comparator (16) outputs a stop signal (17) under predetermined conditions, the stop signal (17) is provided to the digital control unit (13) for controlling the adjustable RC combination (14), wherein the digital control unit (13) evaluates the adjustment of the RC combination (14) based on a time duration needed for outputting the stop signal (17), wherein the analog signal filter unit (11) is adjusted based on the measured RC-product.

2. Semiconductor circuit chip as claimed in claim 1, wherein the adjustable RC- combination (14) includes at least one switchable resistor (R) and/or at least one switchable capacitor (C).

3. Semiconductor circuit chip as claimed in claim 1 or 2, wherein the digital control unit (13) is adapted to sequential control - a setting of adjustable components of the RC combination (14),

- a discharging of the RC combination (14),

- a charging of the RC combination (14) set before, and

- an evaluation of a measured RC-product.

4. Semiconductor circuit chip as claimed in one of the claims 1-3, wherein the number of switchable capacitors (C_n) of the adjustable RC combination (14) is the same as the number of switchable capacitors (C_FΠ) of the adjustable capacity in the analog signal filter unit (11) or wherein the number of switchable resistors (R_n) of the adjustable RC combination (14) is the same as the number of resistors (R_FΠ) of the adjustable resistor in the analog signal filter unit (11).

5. Semiconductor circuit chip as claimed in one of the claims 1-4, wherein the digital control unit (13) is adapted to determine depending on a predetermined time for reaching the reference voltage (VR_ef) whether a capacitor/resistor (Ci-C_n, Ri-R_n) is necessary for providing the optimal RC-adjustment, wherein if the time duration needed for reaching the reference voltage (VR_ef) during charging the checked capacitor/resistor (Ci-C_n, Ri-R_n) is below a predetermined time value this capacitor/resistor (Ci-C_n, Ri-R_n) is required for providing the optimal RC-adjustment, wherein if the time duration needed for reaching the reference voltage (VR_ef) during charging the checked capacitor/resistor (Ci-C_n, Ri-R_n) is above a predetermined time value this capacitor/resistor (Ci-C_n, Ri-R_n) is not required for providing the optimal RC-adjustment.

6. Semiconductor circuit chip as claimed in claim 5, wherein during a next discharging/charging cycle the already determined and required capacitors/resistors are used together with a newly connected capacitor/resistor for checking a further alignment to the optimal RC -product.

7. Semiconductor circuit chip as claimed in one of the claims 1-6, wherein after checking all capacitors/resistors of the RC-combination (14) the optimal RC product including the determination which of the capacitors/resistors are required for the optimal RC product is provided to the analog signal filter unit (11) for being applied.

8. Semiconductor circuit chip as claimed in one of the claims 1 to 7, wherein the digital control unit (13) is coupled to a counter, wherein the measured RC-product determines the number of clocks necessary for reaching the reference signal (VR_ef) during charging an operative capacity (C) of the RC combination (14), wherein the number of clocks is a measure of the necessary adjustable value in the analog signal filter unit (11).

9. Semiconductor circuit chip as claimed in one of the claims 1-8, wherein the RC combination (14) of the filter control unit (12) has the same sheet resistance and the same specific capacitance as the analog signal filter unit (11).

10. Method for controlling an analog signal filter of a semiconductor circuit chip (10) by measuring a real RC product of a semiconductor circuit chip (10), the semiconductor circuit chip (10) comprises an analog signal filter unit (11) and a filter control unit (12), the fϊlter control unit (12) comprises an adjustable RC combination (14) and a digital filter control unit (13), comprising the steps of:

- setting a first switchable capacitor (Cl) or a first switchable resistor (Rl),

- discharging capacitors of the RC-combination (14) to have a determined starting condition,

- charging the operative capacity of the adjustable RC combination (14) to measure the real RC-product of the circuit chip (10) and starting a counter,

- comparing a voltage signal (Vc) of the RC combination (14) with a reference signal (V_Ref); - counting clocks until the voltage signal (Vc) reaches the reference signal

- outputting a stop signal (17) for stopping the counter;

- evaluating whether the operative capacitor is necessary for an optimal RC product, - repeating the discharging, charging and counting process for all switchable capacitors or switchable resistors until all capacitors (C 1...Cn) and/or resistors (Rl ... Rn) of the adjustable RC combination are checked;

- applying the measured optimal RC product to the adjustable RC combination of the analog signal filter unit (11).

11. Device having a receiving unit including a tuner using a semiconductor circuit chip (10) as claimed in one of the claims 1-9.