WO2008121664A3 - Video processing architecture - Google Patents

Video processing architecture Download PDF

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Publication number
WO2008121664A3
WO2008121664A3 PCT/US2008/058337 US2008058337W WO2008121664A3 WO 2008121664 A3 WO2008121664 A3 WO 2008121664A3 US 2008058337 W US2008058337 W US 2008058337W WO 2008121664 A3 WO2008121664 A3 WO 2008121664A3
Authority
WO
WIPO (PCT)
Prior art keywords
modules
video
traffic
architecture
module
Prior art date
Application number
PCT/US2008/058337
Other languages
French (fr)
Other versions
WO2008121664A2 (en
Inventor
Kenn Heinrich
James Au
Original Assignee
Scientific Atlanta
Kenn Heinrich
James Au
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Scientific Atlanta, Kenn Heinrich, James Au filed Critical Scientific Atlanta
Priority to CA2682590A priority Critical patent/CA2682590C/en
Priority to EP08744421A priority patent/EP2132934A2/en
Publication of WO2008121664A2 publication Critical patent/WO2008121664A2/en
Publication of WO2008121664A3 publication Critical patent/WO2008121664A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/103—Selection of coding mode or of prediction mode
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/136—Incoming video signal characteristics or properties
    • H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference

Abstract

A video-processing architecture. In a specific embodiment, the architecture includes a first set of modules that accommodate certain functional traffic flowing between each module thereof. A broadcast module broadcasts video traffic to one or more of the first set of modules. In a more specific embodiment, the first set of modules and the broadcast module are configured to facilitate isolation of video traffic from functional traffic. The first set of modules includes plural modules having similar module architecture. The similar module architecture includes a local memory in each of the plural modules, wherein the local memory stores video data associated with the video traffic. The local memory includes a first memory bank for storing input pixel data and a second memory bank for storing reconstructed pixel data.
PCT/US2008/058337 2007-03-29 2008-03-27 Video processing architecture WO2008121664A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CA2682590A CA2682590C (en) 2007-03-29 2008-03-27 Video processing architecture
EP08744421A EP2132934A2 (en) 2007-03-29 2008-03-27 Video processing architecture

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/693,526 2007-03-29
US11/693,526 US8837575B2 (en) 2007-03-29 2007-03-29 Video processing architecture

Publications (2)

Publication Number Publication Date
WO2008121664A2 WO2008121664A2 (en) 2008-10-09
WO2008121664A3 true WO2008121664A3 (en) 2008-11-20

Family

ID=39735434

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/058337 WO2008121664A2 (en) 2007-03-29 2008-03-27 Video processing architecture

Country Status (4)

Country Link
US (1) US8837575B2 (en)
EP (1) EP2132934A2 (en)
CA (1) CA2682590C (en)
WO (1) WO2008121664A2 (en)

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US8416857B2 (en) * 2007-03-29 2013-04-09 James Au Parallel or pipelined macroblock processing
US8422552B2 (en) * 2007-03-29 2013-04-16 James Au Entropy coding for video processing applications
JP2013034162A (en) * 2011-06-03 2013-02-14 Sony Corp Image processing device and image processing method
US9218639B2 (en) * 2013-09-27 2015-12-22 Apple Inc. Processing order in block processing pipelines

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EP1296520A2 (en) * 2001-09-14 2003-03-26 Polycom Israel Ltd. Method and system for multimedia video processing

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See also references of EP2132934A2 *

Also Published As

Publication number Publication date
WO2008121664A2 (en) 2008-10-09
EP2132934A2 (en) 2009-12-16
CA2682590A1 (en) 2008-10-09
US8837575B2 (en) 2014-09-16
US20080240228A1 (en) 2008-10-02
CA2682590C (en) 2014-05-27

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