WO2008124760A3 - Non-volatile memory and method for predictive programming - Google Patents
Non-volatile memory and method for predictive programming Download PDFInfo
- Publication number
- WO2008124760A3 WO2008124760A3 PCT/US2008/059740 US2008059740W WO2008124760A3 WO 2008124760 A3 WO2008124760 A3 WO 2008124760A3 US 2008059740 W US2008059740 W US 2008059740W WO 2008124760 A3 WO2008124760 A3 WO 2008124760A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- programming
- threshold voltage
- voltage level
- memory cell
- predetermined function
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2008800195746A CN101711414B (en) | 2007-04-10 | 2008-04-09 | Non-volatile memory and method for predictive programming |
EP08745369A EP2135252A2 (en) | 2007-04-10 | 2008-04-09 | Non-volatile memory and method for predictive programming |
JP2010503176A JP2010524147A (en) | 2007-04-10 | 2008-04-09 | Nonvolatile memory and predictive programming methods |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/733,706 US7551483B2 (en) | 2007-04-10 | 2007-04-10 | Non-volatile memory with predictive programming |
US11/733,706 | 2007-04-10 | ||
US11/733,694 | 2007-04-10 | ||
US11/733,694 US7643348B2 (en) | 2007-04-10 | 2007-04-10 | Predictive programming in non-volatile memory |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2008124760A2 WO2008124760A2 (en) | 2008-10-16 |
WO2008124760A3 true WO2008124760A3 (en) | 2008-11-27 |
Family
ID=39712596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2008/059740 WO2008124760A2 (en) | 2007-04-10 | 2008-04-09 | Non-volatile memory and method for predictive programming |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP2135252A2 (en) |
JP (1) | JP2010524147A (en) |
KR (1) | KR20100028019A (en) |
CN (1) | CN101711414B (en) |
TW (1) | TWI371041B (en) |
WO (1) | WO2008124760A2 (en) |
Families Citing this family (77)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101202537B1 (en) | 2006-05-12 | 2012-11-19 | 애플 인크. | Combined distortion estimation and error correction coding for memory devices |
US7697326B2 (en) | 2006-05-12 | 2010-04-13 | Anobit Technologies Ltd. | Reducing programming error in memory devices |
WO2007132456A2 (en) | 2006-05-12 | 2007-11-22 | Anobit Technologies Ltd. | Memory device with adaptive capacity |
CN103280239B (en) | 2006-05-12 | 2016-04-06 | 苹果公司 | Distortion estimation in memory device and elimination |
WO2008026203A2 (en) | 2006-08-27 | 2008-03-06 | Anobit Technologies | Estimation of non-linear distortion in memory devices |
CN101601094B (en) | 2006-10-30 | 2013-03-27 | 苹果公司 | Reading memory cells using multiple thresholds |
WO2008053472A2 (en) | 2006-10-30 | 2008-05-08 | Anobit Technologies Ltd. | Reading memory cells using multiple thresholds |
US7924648B2 (en) | 2006-11-28 | 2011-04-12 | Anobit Technologies Ltd. | Memory power and performance management |
US8151163B2 (en) | 2006-12-03 | 2012-04-03 | Anobit Technologies Ltd. | Automatic defect management in memory devices |
US7706182B2 (en) | 2006-12-03 | 2010-04-27 | Anobit Technologies Ltd. | Adaptive programming of analog memory cells using statistical characteristics |
US7900102B2 (en) | 2006-12-17 | 2011-03-01 | Anobit Technologies Ltd. | High-speed programming of memory devices |
US8151166B2 (en) | 2007-01-24 | 2012-04-03 | Anobit Technologies Ltd. | Reduction of back pattern dependency effects in memory devices |
US7751240B2 (en) | 2007-01-24 | 2010-07-06 | Anobit Technologies Ltd. | Memory device with negative thresholds |
CN101715595A (en) | 2007-03-12 | 2010-05-26 | 爱诺彼得技术有限责任公司 | Adaptive estimation of memory cell read thresholds |
US8001320B2 (en) | 2007-04-22 | 2011-08-16 | Anobit Technologies Ltd. | Command interface for memory devices |
WO2008139441A2 (en) | 2007-05-12 | 2008-11-20 | Anobit Technologies Ltd. | Memory device with internal signal processing unit |
US8234545B2 (en) | 2007-05-12 | 2012-07-31 | Apple Inc. | Data storage with incremental redundancy |
US7925936B1 (en) | 2007-07-13 | 2011-04-12 | Anobit Technologies Ltd. | Memory device with non-uniform programming levels |
US8259497B2 (en) | 2007-08-06 | 2012-09-04 | Apple Inc. | Programming schemes for multi-level analog memory cells |
US8174905B2 (en) | 2007-09-19 | 2012-05-08 | Anobit Technologies Ltd. | Programming orders for reducing distortion in arrays of multi-level analog memory cells |
US7773413B2 (en) | 2007-10-08 | 2010-08-10 | Anobit Technologies Ltd. | Reliable data storage in analog memory cells in the presence of temperature variations |
US8000141B1 (en) | 2007-10-19 | 2011-08-16 | Anobit Technologies Ltd. | Compensation for voltage drifts in analog memory cells |
WO2009050703A2 (en) | 2007-10-19 | 2009-04-23 | Anobit Technologies | Data storage in analog memory cell arrays having erase failures |
US8068360B2 (en) | 2007-10-19 | 2011-11-29 | Anobit Technologies Ltd. | Reading analog memory cells using built-in multi-threshold commands |
WO2009063450A2 (en) | 2007-11-13 | 2009-05-22 | Anobit Technologies | Optimized selection of memory units in multi-unit memory devices |
US8225181B2 (en) | 2007-11-30 | 2012-07-17 | Apple Inc. | Efficient re-read operations from memory devices |
US8209588B2 (en) | 2007-12-12 | 2012-06-26 | Anobit Technologies Ltd. | Efficient interference cancellation in analog memory cell arrays |
US8456905B2 (en) | 2007-12-16 | 2013-06-04 | Apple Inc. | Efficient data storage in multi-plane memory devices |
US8085586B2 (en) | 2007-12-27 | 2011-12-27 | Anobit Technologies Ltd. | Wear level estimation in analog memory cells |
US8156398B2 (en) | 2008-02-05 | 2012-04-10 | Anobit Technologies Ltd. | Parameter estimation based on error correction code parity check equations |
US7924587B2 (en) | 2008-02-21 | 2011-04-12 | Anobit Technologies Ltd. | Programming of analog memory cells using a single programming pulse per state transition |
US7864573B2 (en) | 2008-02-24 | 2011-01-04 | Anobit Technologies Ltd. | Programming analog memory cells for reduced variance after retention |
US8230300B2 (en) | 2008-03-07 | 2012-07-24 | Apple Inc. | Efficient readout from analog memory cells using data compression |
US8400858B2 (en) | 2008-03-18 | 2013-03-19 | Apple Inc. | Memory device with reduced sense time readout |
US8059457B2 (en) | 2008-03-18 | 2011-11-15 | Anobit Technologies Ltd. | Memory device with multiple-accuracy read commands |
WO2009151894A1 (en) * | 2008-06-12 | 2009-12-17 | Sandisk Corporation | Nonvolatile memory and method with index programming and reduced verify |
US7924613B1 (en) | 2008-08-05 | 2011-04-12 | Anobit Technologies Ltd. | Data storage in analog memory cells with protection against programming interruption |
US8498151B1 (en) | 2008-08-05 | 2013-07-30 | Apple Inc. | Data storage in analog memory cells using modified pass voltages |
US8949684B1 (en) | 2008-09-02 | 2015-02-03 | Apple Inc. | Segmented data storage |
US8169825B1 (en) | 2008-09-02 | 2012-05-01 | Anobit Technologies Ltd. | Reliable data storage in analog memory cells subjected to long retention periods |
US8000135B1 (en) | 2008-09-14 | 2011-08-16 | Anobit Technologies Ltd. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
US8482978B1 (en) | 2008-09-14 | 2013-07-09 | Apple Inc. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
US8239734B1 (en) | 2008-10-15 | 2012-08-07 | Apple Inc. | Efficient data storage in storage device arrays |
US8261159B1 (en) | 2008-10-30 | 2012-09-04 | Apple, Inc. | Data scrambling schemes for memory devices |
US8208304B2 (en) | 2008-11-16 | 2012-06-26 | Anobit Technologies Ltd. | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N |
US8397131B1 (en) | 2008-12-31 | 2013-03-12 | Apple Inc. | Efficient readout schemes for analog memory cell devices |
US8248831B2 (en) | 2008-12-31 | 2012-08-21 | Apple Inc. | Rejuvenation of analog memory cells |
US8924661B1 (en) | 2009-01-18 | 2014-12-30 | Apple Inc. | Memory system including a controller and processors associated with memory devices |
US8228701B2 (en) | 2009-03-01 | 2012-07-24 | Apple Inc. | Selective activation of programming schemes in analog memory cell arrays |
US8832354B2 (en) | 2009-03-25 | 2014-09-09 | Apple Inc. | Use of host system resources by memory controller |
US8259506B1 (en) | 2009-03-25 | 2012-09-04 | Apple Inc. | Database of memory read thresholds |
US8238157B1 (en) | 2009-04-12 | 2012-08-07 | Apple Inc. | Selective re-programming of analog memory cells |
US8479080B1 (en) | 2009-07-12 | 2013-07-02 | Apple Inc. | Adaptive over-provisioning in memory systems |
US8495465B1 (en) | 2009-10-15 | 2013-07-23 | Apple Inc. | Error correction coding over multiple memory pages |
US8223556B2 (en) * | 2009-11-25 | 2012-07-17 | Sandisk Technologies Inc. | Programming non-volatile memory with a reduced number of verify operations |
US8677054B1 (en) | 2009-12-16 | 2014-03-18 | Apple Inc. | Memory management schemes for non-volatile memory devices |
US8694814B1 (en) | 2010-01-10 | 2014-04-08 | Apple Inc. | Reuse of host hibernation storage space by memory controller |
US8677203B1 (en) | 2010-01-11 | 2014-03-18 | Apple Inc. | Redundant data storage schemes for multi-die memory systems |
US8694853B1 (en) | 2010-05-04 | 2014-04-08 | Apple Inc. | Read commands for reading interfering memory cells |
US8572423B1 (en) | 2010-06-22 | 2013-10-29 | Apple Inc. | Reducing peak current in memory systems |
US8595591B1 (en) | 2010-07-11 | 2013-11-26 | Apple Inc. | Interference-aware assignment of programming levels in analog memory cells |
US9104580B1 (en) | 2010-07-27 | 2015-08-11 | Apple Inc. | Cache memory for hybrid disk drives |
US8645794B1 (en) | 2010-07-31 | 2014-02-04 | Apple Inc. | Data storage in analog memory cells using a non-integer number of bits per cell |
US8856475B1 (en) | 2010-08-01 | 2014-10-07 | Apple Inc. | Efficient selection of memory blocks for compaction |
US8493781B1 (en) | 2010-08-12 | 2013-07-23 | Apple Inc. | Interference mitigation using individual word line erasure operations |
US8694854B1 (en) | 2010-08-17 | 2014-04-08 | Apple Inc. | Read threshold setting based on soft readout statistics |
US9021181B1 (en) | 2010-09-27 | 2015-04-28 | Apple Inc. | Memory management for unifying memory cell conditions by using maximum time intervals |
US8681562B2 (en) | 2011-01-10 | 2014-03-25 | Micron Technology, Inc. | Memories and methods of programming memories |
JP2014053060A (en) | 2012-09-07 | 2014-03-20 | Toshiba Corp | Semiconductor storage device and control method of the same |
KR102449196B1 (en) * | 2016-01-15 | 2022-09-29 | 삼성전자주식회사 | Nonvolatile memory device and program method of a nonvolatile memory device |
JP6539608B2 (en) * | 2016-03-15 | 2019-07-03 | 東芝メモリ株式会社 | Semiconductor memory device |
CN110556145A (en) * | 2018-06-01 | 2019-12-10 | 北京兆易创新科技股份有限公司 | Programming method and device of storage unit, electronic equipment and storage medium |
CN110556150A (en) * | 2018-06-01 | 2019-12-10 | 北京兆易创新科技股份有限公司 | programming method and device of storage unit, electronic equipment and storage medium |
CN110556146A (en) * | 2018-06-01 | 2019-12-10 | 北京兆易创新科技股份有限公司 | programming method and device of storage unit, electronic equipment and storage medium |
CN110610739B (en) * | 2019-09-17 | 2021-06-18 | 珠海创飞芯科技有限公司 | Threshold voltage adjusting method |
US11556416B2 (en) | 2021-05-05 | 2023-01-17 | Apple Inc. | Controlling memory readout reliability and throughput by adjusting distance between read thresholds |
US11847342B2 (en) | 2021-07-28 | 2023-12-19 | Apple Inc. | Efficient transfer of hard data and confidence levels in reading a nonvolatile memory |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5289401A (en) * | 1990-06-19 | 1994-02-22 | Kabushiki Kaisha Toshiba | Analog storage device for artificial neural network system |
EP0913832A1 (en) * | 1997-11-03 | 1999-05-06 | STMicroelectronics S.r.l. | Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory |
US6366496B1 (en) * | 1999-08-03 | 2002-04-02 | Stmicroelectronics S.R.L. | Method for programming multi-level non-volatile memories by controlling the gate voltage |
US20030002374A1 (en) * | 2001-06-22 | 2003-01-02 | Tedrow Kerry D. | Charging a capacitance of a memory cell and charger |
US7042766B1 (en) * | 2004-07-22 | 2006-05-09 | Spansion, Llc | Method of programming a flash memory device using multilevel charge storage |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5729489A (en) * | 1995-12-14 | 1998-03-17 | Intel Corporation | Programming flash memory using predictive learning methods |
-
2008
- 2008-04-09 WO PCT/US2008/059740 patent/WO2008124760A2/en active Application Filing
- 2008-04-09 CN CN2008800195746A patent/CN101711414B/en active Active
- 2008-04-09 JP JP2010503176A patent/JP2010524147A/en active Pending
- 2008-04-09 EP EP08745369A patent/EP2135252A2/en not_active Withdrawn
- 2008-04-09 KR KR1020097021264A patent/KR20100028019A/en not_active Application Discontinuation
- 2008-04-10 TW TW097113094A patent/TWI371041B/en not_active IP Right Cessation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5289401A (en) * | 1990-06-19 | 1994-02-22 | Kabushiki Kaisha Toshiba | Analog storage device for artificial neural network system |
EP0913832A1 (en) * | 1997-11-03 | 1999-05-06 | STMicroelectronics S.r.l. | Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory |
US6366496B1 (en) * | 1999-08-03 | 2002-04-02 | Stmicroelectronics S.R.L. | Method for programming multi-level non-volatile memories by controlling the gate voltage |
US20030002374A1 (en) * | 2001-06-22 | 2003-01-02 | Tedrow Kerry D. | Charging a capacitance of a memory cell and charger |
US7042766B1 (en) * | 2004-07-22 | 2006-05-09 | Spansion, Llc | Method of programming a flash memory device using multilevel charge storage |
Non-Patent Citations (1)
Title |
---|
See also references of EP2135252A2 * |
Also Published As
Publication number | Publication date |
---|---|
KR20100028019A (en) | 2010-03-11 |
JP2010524147A (en) | 2010-07-15 |
WO2008124760A2 (en) | 2008-10-16 |
CN101711414A (en) | 2010-05-19 |
CN101711414B (en) | 2013-06-26 |
TW200907975A (en) | 2009-02-16 |
EP2135252A2 (en) | 2009-12-23 |
TWI371041B (en) | 2012-08-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2008124760A3 (en) | Non-volatile memory and method for predictive programming | |
TW200641899A (en) | Program method of flash memory device | |
TW200616148A (en) | Method for programming charge store memory cell and integrated circuit | |
WO2007146010A3 (en) | Programming a non-volatile memory device | |
WO2013043602A3 (en) | High endurance non-volatile storage | |
JP2010524147A5 (en) | ||
WO2009139567A3 (en) | Memory device and memory programming method | |
TW200723282A (en) | System and method for programming cells in non-volatile integrated memory devices | |
WO2009038961A3 (en) | Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells | |
WO2006107796A3 (en) | Faster programming of higher level states in multi-level cell flash memory | |
WO2012024079A3 (en) | Variable resistance memory array architecture | |
JP2010535395A5 (en) | ||
WO2011146455A3 (en) | Multi-semiconductor material vertical memory strings, strings of memory cells having individual biasable channel regions, memory arrays incorporating such strings,and methods of accessing and forming the same | |
WO2014137928A3 (en) | Dynamic erase depth for improved endurance of non-volatile memory | |
EP3459080A4 (en) | Flash memory array with individual memory cell read, program and erase | |
WO2008005735A3 (en) | Partial page fail bit detection in flash memory devices | |
WO2010033975A3 (en) | Programming a memory device to increase data reliability | |
WO2007080586A3 (en) | Rd algorithm improvement for nrom technology | |
WO2009072104A3 (en) | Flash memory device with physical cell value deterioration accommodation and methods useful in conjunction therewith | |
WO2007076512A3 (en) | Methods and device for improved program-verify operations in non-volatile memories | |
WO2011066034A3 (en) | Resetting phase change memory bits | |
TW201129978A (en) | A method and apparatus for operation of a NAND-like dual charge retaining transistor NOR flash memory device | |
WO2008057822A3 (en) | Nonvolatile memory with variable read threshold | |
US20130033933A1 (en) | Adjusting operational parameters for memory cells | |
WO2007117598A3 (en) | Reduction of leakage current and program disturbs in flash memory devices |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200880019574.6 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 08745369 Country of ref document: EP Kind code of ref document: A2 |
|
ENP | Entry into the national phase |
Ref document number: 2010503176 Country of ref document: JP Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2008745369 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 20097021264 Country of ref document: KR Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |