WO2008152774A1 - メモリカードおよびその製造方法 - Google Patents
メモリカードおよびその製造方法 Download PDFInfo
- Publication number
- WO2008152774A1 WO2008152774A1 PCT/JP2008/001301 JP2008001301W WO2008152774A1 WO 2008152774 A1 WO2008152774 A1 WO 2008152774A1 JP 2008001301 W JP2008001301 W JP 2008001301W WO 2008152774 A1 WO2008152774 A1 WO 2008152774A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- semiconductor
- memory card
- wire
- electrode
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 abstract 8
- 239000011347 resin Substances 0.000 abstract 2
- 229920005989 resin Polymers 0.000 abstract 2
- 238000007789 sealing Methods 0.000 abstract 2
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009519147A JP5187305B2 (ja) | 2007-06-15 | 2008-05-26 | メモリカードおよびその製造方法 |
US12/664,475 US8223500B2 (en) | 2007-06-15 | 2008-05-26 | Memory card and method for manufacturing the same |
CN200880020434A CN101689252A (zh) | 2007-06-15 | 2008-05-26 | 存储卡及其制造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007158090 | 2007-06-15 | ||
JP2007-158090 | 2007-06-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008152774A1 true WO2008152774A1 (ja) | 2008-12-18 |
Family
ID=40129389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/001301 WO2008152774A1 (ja) | 2007-06-15 | 2008-05-26 | メモリカードおよびその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8223500B2 (ja) |
JP (1) | JP5187305B2 (ja) |
CN (1) | CN101689252A (ja) |
WO (1) | WO2008152774A1 (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20100030126A (ko) | 2008-09-09 | 2010-03-18 | 삼성전자주식회사 | 메모리 장치 및 그를 포함하는 전자 장치 |
USD794034S1 (en) * | 2009-01-07 | 2017-08-08 | Samsung Electronics Co., Ltd. | Memory device |
USD794641S1 (en) * | 2009-01-07 | 2017-08-15 | Samsung Electronics Co., Ltd. | Memory device |
USD795261S1 (en) * | 2009-01-07 | 2017-08-22 | Samsung Electronics Co., Ltd. | Memory device |
USD794642S1 (en) * | 2009-01-07 | 2017-08-15 | Samsung Electronics Co., Ltd. | Memory device |
USD794643S1 (en) * | 2009-01-07 | 2017-08-15 | Samsung Electronics Co., Ltd. | Memory device |
USD795262S1 (en) * | 2009-01-07 | 2017-08-22 | Samsung Electronics Co., Ltd. | Memory device |
USD794644S1 (en) * | 2009-01-07 | 2017-08-15 | Samsung Electronics Co., Ltd. | Memory device |
JP5163776B2 (ja) * | 2010-07-13 | 2013-03-13 | 株式会社デンソー | カードキー |
US8368192B1 (en) * | 2011-09-16 | 2013-02-05 | Powertech Technology, Inc. | Multi-chip memory package with a small substrate |
US20140233195A1 (en) * | 2013-02-21 | 2014-08-21 | Kabushiki Kaisha Toshiba | Semiconductor device |
EP3232751B1 (de) * | 2016-04-12 | 2018-07-18 | MD Elektronik GmbH | Elektrische steckkupplungsvorrichtung |
CN209298115U (zh) * | 2018-12-14 | 2019-08-23 | 深圳市江波龙电子股份有限公司 | 一种存储装置 |
US11742302B2 (en) * | 2020-10-23 | 2023-08-29 | Wolfspeed, Inc. | Electronic device packages with internal moisture barriers |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001344587A (ja) * | 2000-03-30 | 2001-12-14 | Matsushita Electric Ind Co Ltd | プリント配線基板およびそれを用いたicカード用モジュールならびにその製造方法 |
JP2004013738A (ja) * | 2002-06-10 | 2004-01-15 | Renesas Technology Corp | メモリカードおよびその製造方法 |
JP2006119983A (ja) * | 2004-10-22 | 2006-05-11 | Renesas Technology Corp | Icカードおよびその製造方法 |
JP2007027287A (ja) * | 2005-07-14 | 2007-02-01 | Renesas Technology Corp | 半導体装置およびその製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3822768B2 (ja) * | 1999-12-03 | 2006-09-20 | 株式会社ルネサステクノロジ | Icカードの製造方法 |
JP3815936B2 (ja) * | 2000-01-25 | 2006-08-30 | 株式会社ルネサステクノロジ | Icカード |
JP3768761B2 (ja) * | 2000-01-31 | 2006-04-19 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
TWI244708B (en) * | 2000-03-30 | 2005-12-01 | Matsushita Electric Ind Co Ltd | Printed wiring board, IC card module using the same, and method for producing IC card module |
US7086600B2 (en) * | 2001-02-02 | 2006-08-08 | Renesas Technology Corporation | Electronic device and method of manufacturing the same |
US20030042615A1 (en) * | 2001-08-30 | 2003-03-06 | Tongbi Jiang | Stacked microelectronic devices and methods of fabricating same |
JP3866178B2 (ja) * | 2002-10-08 | 2007-01-10 | 株式会社ルネサステクノロジ | Icカード |
US6998721B2 (en) * | 2002-11-08 | 2006-02-14 | Stmicroelectronics, Inc. | Stacking and encapsulation of multiple interconnected integrated circuits |
JP2005166891A (ja) | 2003-12-02 | 2005-06-23 | Kingpak Technology Inc | 小型メモリカード |
US7112875B1 (en) * | 2005-02-17 | 2006-09-26 | Amkor Technology, Inc. | Secure digital memory card using land grid array structure |
US7326592B2 (en) * | 2005-04-04 | 2008-02-05 | Infineon Technologies Ag | Stacked die package |
JP4766053B2 (ja) * | 2006-02-02 | 2011-09-07 | パナソニック株式会社 | Sdメモリカードおよびsdメモリカードの製造方法 |
JP2007205908A (ja) * | 2006-02-02 | 2007-08-16 | Matsushita Electric Ind Co Ltd | 重量センサ |
-
2008
- 2008-05-26 JP JP2009519147A patent/JP5187305B2/ja not_active Expired - Fee Related
- 2008-05-26 CN CN200880020434A patent/CN101689252A/zh active Pending
- 2008-05-26 US US12/664,475 patent/US8223500B2/en not_active Expired - Fee Related
- 2008-05-26 WO PCT/JP2008/001301 patent/WO2008152774A1/ja active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001344587A (ja) * | 2000-03-30 | 2001-12-14 | Matsushita Electric Ind Co Ltd | プリント配線基板およびそれを用いたicカード用モジュールならびにその製造方法 |
JP2004013738A (ja) * | 2002-06-10 | 2004-01-15 | Renesas Technology Corp | メモリカードおよびその製造方法 |
JP2006119983A (ja) * | 2004-10-22 | 2006-05-11 | Renesas Technology Corp | Icカードおよびその製造方法 |
JP2007027287A (ja) * | 2005-07-14 | 2007-02-01 | Renesas Technology Corp | 半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20100165587A1 (en) | 2010-07-01 |
JPWO2008152774A1 (ja) | 2010-08-26 |
US8223500B2 (en) | 2012-07-17 |
CN101689252A (zh) | 2010-03-31 |
JP5187305B2 (ja) | 2013-04-24 |
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