WO2009046300A3 - Mesosynchronous data bus apparatus and method of data transmission - Google Patents

Mesosynchronous data bus apparatus and method of data transmission Download PDF

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Publication number
WO2009046300A3
WO2009046300A3 PCT/US2008/078752 US2008078752W WO2009046300A3 WO 2009046300 A3 WO2009046300 A3 WO 2009046300A3 US 2008078752 W US2008078752 W US 2008078752W WO 2009046300 A3 WO2009046300 A3 WO 2009046300A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
time delay
module
mesosynchronous
memory system
Prior art date
Application number
PCT/US2008/078752
Other languages
French (fr)
Other versions
WO2009046300A2 (en
Inventor
James H Jones
Kevin D Drucker
Jon C R Bennett
Original Assignee
Violin Memory Inc
James H Jones
Kevin D Drucker
Jon C R Bennett
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Violin Memory Inc, James H Jones, Kevin D Drucker, Jon C R Bennett filed Critical Violin Memory Inc
Priority to KR1020107009902A priority Critical patent/KR101132321B1/en
Priority to CN2008801113298A priority patent/CN101836193B/en
Priority to EP08836238A priority patent/EP2201463A4/en
Priority to JP2010528163A priority patent/JP2011502293A/en
Publication of WO2009046300A2 publication Critical patent/WO2009046300A2/en
Publication of WO2009046300A3 publication Critical patent/WO2009046300A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

A memory system is described, where the transmission time of data between memory modules is managed so that the overall time delay between specified points in the memory system is maintained a constant. Each lane of a multilane bus may be separately managed, and a data frame evaluated at the destination module, without a need for deskewing at intermediate modules. The time delay in propagation of the data through a module, which may have a switch to route the data, is reduced by operating the data path through the module at one or more submultiples of the bus serial data rate, and selecting the sampling point of the received data so that variations in time delay due to temperature changes or ageing are accommodated.
PCT/US2008/078752 2007-10-05 2008-10-03 Mesosynchronous data bus apparatus and method of data transmission WO2009046300A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020107009902A KR101132321B1 (en) 2007-10-05 2008-10-03 Mesosynchronous data bus apparatus and method of data transmission
CN2008801113298A CN101836193B (en) 2007-10-05 2008-10-03 Mesosynchronous data bus apparatus and method of data transmission
EP08836238A EP2201463A4 (en) 2007-10-05 2008-10-03 Mesosynchronous data bus apparatus and method of data transmission
JP2010528163A JP2011502293A (en) 2007-10-05 2008-10-03 Meso-synchronous data bus device and data transmission method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US99789907P 2007-10-05 2007-10-05
US60/997,899 2007-10-05

Publications (2)

Publication Number Publication Date
WO2009046300A2 WO2009046300A2 (en) 2009-04-09
WO2009046300A3 true WO2009046300A3 (en) 2009-05-22

Family

ID=40526961

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/078752 WO2009046300A2 (en) 2007-10-05 2008-10-03 Mesosynchronous data bus apparatus and method of data transmission

Country Status (5)

Country Link
EP (1) EP2201463A4 (en)
JP (1) JP2011502293A (en)
KR (1) KR101132321B1 (en)
CN (1) CN101836193B (en)
WO (1) WO2009046300A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101990089B (en) * 2009-08-07 2013-01-02 宏碁股份有限公司 Streaming audiovisual data transmission control method and equipment thereof
CN103051441B (en) * 2013-01-23 2015-03-18 和记奥普泰通信技术有限公司 FPGA (field programmable gata array)-based clock data recovery processing method
KR101579054B1 (en) 2014-03-26 2015-12-21 한국원자력의학원 Radiosensitizer containing podophyllotoxin acetate as the active ingredient
CN106033231B (en) * 2015-03-16 2020-03-24 联想(北京)有限公司 Information processing method, clock frequency division device and information processing system
CN108259134B (en) * 2018-01-10 2021-04-13 上海灵动微电子股份有限公司 Data transmission method based on AFP protocol
KR102090554B1 (en) 2018-04-13 2020-03-18 한국원자력의학원 Radiosensitizer containing β-Apopicropodophyllin as an active ingredient
WO2021031153A1 (en) * 2019-08-21 2021-02-25 华为技术有限公司 Data processing device and system
CN112463671A (en) * 2020-12-04 2021-03-09 上海君协光电科技发展有限公司 Data delay system, method and device, computer equipment and storage medium
CN113360130B (en) * 2021-08-11 2021-10-29 新华三技术有限公司 Data transmission method, device and system
CN114495998B (en) * 2021-12-15 2023-11-10 西安紫光国芯半导体有限公司 Data memory and electronic device
CN117574819A (en) * 2023-11-14 2024-02-20 上海奎芯集成电路设计有限公司 Received data deviation adjusting circuit and received data deviation adjusting method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970798A (en) * 1974-04-26 1976-07-20 International Business Machines Corporation Time division multiplex data transmission system
US4558455A (en) * 1982-09-28 1985-12-10 International Business Machines Corporation Data transmission system
US4845709A (en) * 1986-05-14 1989-07-04 Mitsubishi Denki K.K. Data transfer control system
US6445719B1 (en) * 1998-08-28 2002-09-03 Adtran Inc. Method, system and apparatus for reducing synchronization and resynchronization times for systems with pulse stuffing

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266943A (en) * 1986-05-14 1987-11-19 Mitsubishi Electric Corp Data transfer control system
US5872959A (en) * 1996-09-10 1999-02-16 Lsi Logic Corporation Method and apparatus for parallel high speed data transfer
US6356610B1 (en) * 1998-06-23 2002-03-12 Vlsi Technology, Inc. System to avoid unstable data transfer between digital systems
US6889336B2 (en) * 2001-01-05 2005-05-03 Micron Technology, Inc. Apparatus for improving output skew for synchronous integrate circuits has delay circuit for generating unique clock signal by applying programmable delay to delayed clock signal
CN1161901C (en) * 2001-05-14 2004-08-11 华为技术有限公司 Up high-speed data synchronous receiving method and circuit in optical communication system
US7065101B2 (en) * 2001-11-15 2006-06-20 International Business Machines Corporation Modification of bus protocol packet for serial data synchronization
DE112004000821B4 (en) * 2003-05-13 2016-12-01 Advanced Micro Devices, Inc. System with a host connected to multiple storage modules via a serial storage connection
US7143207B2 (en) * 2003-11-14 2006-11-28 Intel Corporation Data accumulation between data path having redrive circuit and memory device
US20050259692A1 (en) * 2004-05-19 2005-11-24 Zerbe Jared L Crosstalk minimization in serial link systems
JP2006065697A (en) * 2004-08-27 2006-03-09 Hitachi Ltd Storage device control apparatus
JP2006072968A (en) * 2004-08-31 2006-03-16 Samsung Electronics Co Ltd Memory module, memory unit, and hub with non-periodic clock, and method using the same
US7400862B2 (en) * 2004-10-25 2008-07-15 Skyworks Solutions, Inc. Transmit-receive switch architecture providing pre-transmit isolation
US7434192B2 (en) * 2004-12-13 2008-10-07 Altera Corporation Techniques for optimizing design of a hard intellectual property block for data transmission
CA2597692A1 (en) * 2005-04-21 2006-11-02 Violin Memory, Inc. Interconnection system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970798A (en) * 1974-04-26 1976-07-20 International Business Machines Corporation Time division multiplex data transmission system
US4558455A (en) * 1982-09-28 1985-12-10 International Business Machines Corporation Data transmission system
US4845709A (en) * 1986-05-14 1989-07-04 Mitsubishi Denki K.K. Data transfer control system
US6445719B1 (en) * 1998-08-28 2002-09-03 Adtran Inc. Method, system and apparatus for reducing synchronization and resynchronization times for systems with pulse stuffing

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2201463A4 *

Also Published As

Publication number Publication date
JP2011502293A (en) 2011-01-20
CN101836193A (en) 2010-09-15
KR20100098596A (en) 2010-09-08
KR101132321B1 (en) 2012-04-05
WO2009046300A2 (en) 2009-04-09
CN101836193B (en) 2012-10-03
EP2201463A4 (en) 2010-10-13
EP2201463A2 (en) 2010-06-30

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