WO2009101057A4 - Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system - Google Patents

Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system Download PDF

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Publication number
WO2009101057A4
WO2009101057A4 PCT/EP2009/051462 EP2009051462W WO2009101057A4 WO 2009101057 A4 WO2009101057 A4 WO 2009101057A4 EP 2009051462 W EP2009051462 W EP 2009051462W WO 2009101057 A4 WO2009101057 A4 WO 2009101057A4
Authority
WO
WIPO (PCT)
Prior art keywords
computer system
host computer
control block
flag
location
Prior art date
Application number
PCT/EP2009/051462
Other languages
French (fr)
Other versions
WO2009101057A1 (en
Inventor
Daniel Casper
John Flanagan
Catherine Huang
Matthew Kalos
Ugochukwu Njoku
Dale Riedy
Gustav Sittmann Iii
Original Assignee
International Business Machines Corporation
Ibm United Kingdom Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corporation, Ibm United Kingdom Limited filed Critical International Business Machines Corporation
Priority to KR1020107016955A priority Critical patent/KR101242896B1/en
Priority to JP2010546304A priority patent/JP5159901B2/en
Priority to CN2009801048611A priority patent/CN101946246B/en
Priority to PL09710800T priority patent/PL2245545T3/en
Priority to DK09710800.5T priority patent/DK2245545T3/en
Priority to SI200930237T priority patent/SI2245545T1/en
Priority to ES09710800T priority patent/ES2381324T3/en
Priority to EP09710800A priority patent/EP2245545B1/en
Priority to AT09710800T priority patent/ATE551655T1/en
Publication of WO2009101057A1 publication Critical patent/WO2009101057A1/en
Publication of WO2009101057A4 publication Critical patent/WO2009101057A4/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance

Abstract

An computer program product, apparatus, and method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation. The TCW specifies a location of one or more I/O commands and a flag. The flag is set to indicate that the location is an indirect address. The host computer system extracts the location of the one or more I/O commands and the flag from the TCW. The host computer system gathers the one or more I/O commands responsive to the location specified by the TCW and the flag, and then forwards the one or more I/O commands to the control unit for execution.

Claims

AMENDED CLAIMS received by the International Bureau on 27 August 2009 (27.08.2009)CLAIMS
1. A method of facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit, the method comprising:
the host computer system opening an exchange with the control unit;
the host computer system obtaining (1202) a transport command word (TCW) for an I/O operation, the TCW having an address in an address field (922) specifying a location of a control block (1000) including the one or more I/O commands and a flag in a flag field (906) of the TCW, wherein the flag is set to a first value to indicate a direct address where the location is the location of the control block and the flag is set to a second value to indicate an indirect address where the location is the location of a list of addresses that point to a plurality of storage locations that collectively make up the control block;
the host computer system extracting (1204) the address and the flag from the TCW;
if the flag is set to the first value, the host computer system gathering (1208) the entire control block from the location specified in the TCW and if the flag is set to the second value, the host computer system gathering (1210) the control block from the plurality of storage locations that collectively make up the control block;
the host system forwarding (1212) the control block including the one or more I/O commands to the control unit for execution, wherein the forwarding is carried out as part of a single I/O operation as a single entity for execution by the control unit; and
the control unit closing the exchange with the host computer system;
wherein there is only one exchange open and closed between the control unit and the host computer system for the transfer of the one or more I/O commands of the control block from the host computer system to the control unit.
2. The method of claim 1 wherein the control block further includes a header specifying a format of the one or more I/O commands.
3. The method of claim 1 wherein the control block further includes a trailer for providing a check word and specifying the amount of data to transfer.
4. A system comprising means adapted for carrying out all the steps of the method according to any preceding method claim.
5. A computer program comprising instructions for carrying out all the steps of the method according to any preceding method claim, when said computer program is executed on a computer system.
PCT/EP2009/051462 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system WO2009101057A1 (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
KR1020107016955A KR101242896B1 (en) 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system
JP2010546304A JP5159901B2 (en) 2008-02-14 2009-02-09 Method for facilitating I / O processing for input / output (I / O) operations in a host computer system configured to communicate with a controller
CN2009801048611A CN101946246B (en) 2008-02-14 2009-02-09 I/O processing method and system for prompting I/O operation at host computer system
PL09710800T PL2245545T3 (en) 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system
DK09710800.5T DK2245545T3 (en) 2008-02-14 2009-02-09 PROVISION OF INDIRECT DATA ADDRESSING TO A CONTROL BLOCK IN A CHANNEL SUBSYSTEM IN AN I / O TREATMENT SYSTEM
SI200930237T SI2245545T1 (en) 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system
ES09710800T ES2381324T3 (en) 2008-02-14 2009-02-09 Provide indirect addressing to the data for a control block in a channel subsystem of an I / O processing system
EP09710800A EP2245545B1 (en) 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system
AT09710800T ATE551655T1 (en) 2008-02-14 2009-02-09 PROVIDING INDIRECT DATA ADDRESSING FOR A CONTROL BLOCK IN A CHANNEL SUBSYSTEM OF AN I/O PROCESSING SYSTEM

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/031,201 2008-02-14
US12/031,201 US8117347B2 (en) 2008-02-14 2008-02-14 Providing indirect data addressing for a control block at a channel subsystem of an I/O processing system

Publications (2)

Publication Number Publication Date
WO2009101057A1 WO2009101057A1 (en) 2009-08-20
WO2009101057A4 true WO2009101057A4 (en) 2009-10-29

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PCT/EP2009/051462 WO2009101057A1 (en) 2008-02-14 2009-02-09 Providing indirect data addressing for a control block at a channel subsystem of an i/o processing system

Country Status (13)

Country Link
US (4) US8117347B2 (en)
EP (1) EP2245545B1 (en)
JP (1) JP5159901B2 (en)
KR (1) KR101242896B1 (en)
CN (1) CN101946246B (en)
AT (1) ATE551655T1 (en)
CY (1) CY1112690T1 (en)
DK (1) DK2245545T3 (en)
ES (1) ES2381324T3 (en)
PL (1) PL2245545T3 (en)
PT (1) PT2245545E (en)
SI (1) SI2245545T1 (en)
WO (1) WO2009101057A1 (en)

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