WO2009113571A1 - Information processing device and method capable of operating a plurality of basic software programs - Google Patents

Information processing device and method capable of operating a plurality of basic software programs Download PDF

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Publication number
WO2009113571A1
WO2009113571A1 PCT/JP2009/054643 JP2009054643W WO2009113571A1 WO 2009113571 A1 WO2009113571 A1 WO 2009113571A1 JP 2009054643 W JP2009054643 W JP 2009054643W WO 2009113571 A1 WO2009113571 A1 WO 2009113571A1
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execution environment
semiconductor integrated
division control
integrated circuit
environment division
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PCT/JP2009/054643
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French (fr)
Japanese (ja)
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淳嗣 酒井
正人 枝廣
浩明 井上
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日本電気株式会社
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Priority to JP2010502849A priority Critical patent/JPWO2009113571A1/en
Publication of WO2009113571A1 publication Critical patent/WO2009113571A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/53Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine

Definitions

  • the present invention relates to a semiconductor integrated circuit having a plurality of CPUs connected by an interconnection network, and more particularly, to an information processing apparatus and method capable of safely operating infrastructure software in consideration of reliability and versatility.
  • the reliability of the system operation depends on the reliability of the base software.
  • FIG. 15 is a diagram schematically illustrating an example of a typical configuration of an information processing apparatus in which the base software is executed.
  • the base software 70P1 manages the arithmetic circuits 10P1-1 to 10P1-m, and executes application groups 50P1-1 to 50P1-j and OSs 60P1-1 to 60P1-j on the base software 70P1.
  • a plurality of pieces of base software can be operated independently in the plurality of arithmetic circuits 10P1-1 to 10P1-m.
  • the information processing apparatus shown in FIG. 15 can easily destroy other execution environments when there is a bug in the base software, or when the base software itself is attacked and taken by malicious software. There was a problem such as.
  • FIG. 16 is a diagram schematically illustrating an example of the configuration of an information communication terminal device that executes a downloaded additional process (see Patent Document 2).
  • a plurality of CPUs 10010AP1 and 10010BP1 are divided into a plurality of domains 10020AP1 and 10020BP1 according to the reliability of the program (process) to be executed.
  • the CPU 10010BP1 that includes a plurality of CPUs and belongs to a domain that executes low-security processing such as additional processing accesses the memory 31 and the input / output device (I / O) 41 of the domain that executes high-security processing
  • the access request is configured such that access permission / non-permission is determined by the access control unit 10030P1, and only permitted access is performed. With this configuration, it is possible to construct a highly reliable security system based on hardware control.
  • JP-T-2004-5000666 International Publication Number WO2006 / 022161 A1
  • the area used by the OS can be fixed in advance.
  • FIG. 16 In an information processing apparatus that assumes various execution environments such as a data center, a resource area to be used cannot be determined in advance. Therefore, the configuration of FIG. 16 has room for improvement in terms of versatility when applied to a data center or the like.
  • an object of the present invention is to prevent an information processing apparatus having a plurality of execution environments from propagating the influence due to the operation to other effective environments even if there is a malfunction in the operation of certain basic software.
  • An object of the present invention is to provide an apparatus and a method that enable a highly reliable information processing apparatus to be realized.
  • Another object of the present invention is to provide an apparatus and method that can realize a highly reliable information processing apparatus at low cost.
  • Still another object of the present invention is to provide an apparatus and method that enable dynamic resource allocation with high reliability between unreliable infrastructure software.
  • a plurality of arithmetic circuits, a plurality of base software executed by the plurality of arithmetic circuits, and access from the arithmetic circuits are restricted, and separation control between the arithmetic circuits is performed.
  • An interconnection network having filter means for performing, an arithmetic circuit different from the arithmetic circuit for executing each of the plurality of infrastructure software, and an execution environment division control means executed by the different arithmetic circuit,
  • One environment division control means is provided for a plurality of the base software, and a semiconductor integrated circuit or an information processing apparatus is provided for changing the access restriction setting of the filter means of the interconnection network.
  • the plurality of base software have the same or equivalent reliability.
  • a plurality of arithmetic circuits, a plurality of basic software programs respectively executed by the plurality of arithmetic circuits, and access from the arithmetic circuits are restricted, and separation control between the arithmetic circuits is performed.
  • An information processing apparatus control method comprising an interconnection network having filter means for performing execution environment division control means in an arithmetic circuit different from the arithmetic circuit for executing each of the plurality of infrastructure software, One execution environment division control unit is provided for a plurality of the base software, and a method for changing the access restriction setting of the filter unit of the interconnection network is provided.
  • FIG. 1 is a diagram showing an overall configuration of a semiconductor integrated circuit according to an embodiment of the present invention. It is a figure which shows the division
  • an arithmetic circuit 10P1-Pn such as a CPU
  • a memory control circuit 30 connected to an external memory 31
  • the I / O control circuit 40 connected to the I / O 41 and the arithmetic circuits 10P1-Pn, the memory control circuit 30, and the I / O control circuit 40 are interconnected, and the arithmetic circuits 10P1-Pn are connected to each other while maintaining consistency.
  • description will be made in accordance with examples.
  • FIG. 1 is a diagram showing an overall configuration of an information processing apparatus according to an embodiment of the present invention.
  • a semiconductor integrated circuit 100 in addition to an arithmetic circuit 10P1-Pn such as a CPU, a memory control circuit 30 connected to an external memory 31, and an I / O control circuit 40 connected to an external I / O 41.
  • an interconnection network 1000 including a filter device 1010 capable of interconnecting them and performing control of separation between arithmetic circuits while maintaining consistency is provided.
  • the arithmetic circuit 10, the memory control circuit 30, the memory 31, the I / O control circuit 40, the I / O 41, and the interconnection network 1000 each have not only a separate package configuration but also a SoC (System-on-Chip).
  • SoC System-on-Chip
  • An internal circuit configuration, a SiP (System-in-Package) configuration with another chip, a three-dimensional LSI configuration, or a combination thereof may be used.
  • the arithmetic circuits 10P1-Pn may be any arithmetic device capable of performing a program operation, such as a signal processing processor, a VLIW (Very Long Instruction Word) processor, or a configurable processor.
  • a signal processing processor such as a signal processing processor, a VLIW (Very Long Instruction Word) processor, or a configurable processor.
  • VLIW Very Long Instruction Word
  • the filter device 1010 is a filter device disclosed in Patent Document 2 (International Publication No. WO2006 / 022161, A1) and the like that can perform separation control between arithmetic circuits while maintaining consistency. Anything is fine.
  • FIG. 2 is a diagram showing an overall configuration of the semiconductor integrated circuit 100 according to an embodiment of the present invention.
  • the plurality of arithmetic circuit groups 11, the execution environment division control means 200 executed on the plurality of arithmetic circuit groups 11, and the base software 70P1 are executed on the arithmetic circuits 10P1-1 to 10P1-m.
  • a plurality of execution environments 90P1 to 90Pk are provided on which the application groups 50P1-1 to 50P1-j and the OS 60P1-60P1-j are respectively executed.
  • an interconnection network 1000 including a filter device 1010 capable of interconnecting arithmetic circuits and performing separation control between arithmetic circuits while maintaining consistency is provided.
  • the base software 70P1 to 70Pk in the plurality of execution environments 90P1 to 90Pk have the same or equivalent reliability.
  • a plurality of execution environments 90P1 to 90Pk may be represented by the execution environment 90.
  • the basic software means basic software that supports execution of the OS, such as virtualization software and firmware. Of course, if the OS is allowed to be modified, the OS itself may include the base software.
  • the setting of the filter device 1010 can be changed only by the execution environment division control unit 200. All requests from the execution environment division control unit 200 and the arithmetic circuit group 11 may be permitted, or the filter device 1010 may set its own access range.
  • the execution environment 90 is a hardware / software environment for executing an application assigned to each user of the data center. That is, one execution environment includes a plurality of domains shown in FIG.
  • the execution environment division control means 200 is executed by the arithmetic circuit group 11 independent of the arithmetic circuits that execute the execution environments 90P1 to 90Pk.
  • the minimum arithmetic circuit group 11 (one CPU or a plurality of CPUs) is newly added to the information processing apparatus, and the functions of the division of the execution environment and the resource arbitration between the execution environments are shared from the execution environment. It can be said that it is cut out as a term and separately cut out as execution environment division control means 200 that can be shared between execution environments. This is because it is difficult to cut out the basic process in the execution environment, and by setting the reliability of the basic process low, the entire execution environment can be regarded as a process with low reliability. As a result, instead of performing filter control within each execution environment, it is possible to extract the execution environment dividing means 200 that performs filter control shared by the entire apparatus. Thereby, extremely low-cost filter control is possible.
  • An information processing apparatus provider such as a data center cannot know in advance (before the apparatus is shipped) what kind of software the user can operate in the execution environment. Since the provider cannot guarantee that the entire execution environment is 100% bug-free and completely prevents malicious viruses, the reliability of the entire execution environment is determined for the information processing apparatus. Can be considered low.
  • the information processing apparatus provider can guarantee the operations of the arithmetic circuit group 11 and the execution environment division control means 200 in advance (before the apparatus is shipped). In this respect, it can be said that the execution environment division control unit 200 is more reliable for the information processing apparatus than the entire execution environment.
  • the arithmetic circuit group 11 does not execute the basic functions of the information processing apparatus.
  • Basic functions indispensable for each user are included in each execution environment.
  • the highly reliable execution environment division control means 200 and the calculation are executed in a situation where an execution environment that is not reliable for each user is operating on the semiconductor integrated circuit 100 shared by a plurality of users.
  • the mutual interference between the unreliable execution environments is performed at low cost via the filter device 1010 in terms of hardware.
  • the configuration is one of the features.
  • the execution environment division control means 200 can cooperate with the basic software group 70 to perform resource arbitration between execution environments safely and at low cost.
  • the reason why this is possible is that, in the present embodiment, although the basic software group is not reliable, it is through a forced setting change of the filter device 1010 or a circuit-based forced control such as a reset. This is because the execution environment belonging to the user can avoid monopolizing the CPU resources and the like in terms of hardware.
  • FIG. 3 is a diagram showing the division information 201 set in the filter device 1010 according to an embodiment of the present invention.
  • the arithmetic circuit # 1-10 is permitted to read (R) the area from 0x00000000 to 0x10000000 and read / write (R, W) to the area from 0x1000000 to 0x20000000. Are all rejected.
  • the arithmetic circuit # 11-50 is permitted to read (R) the area from 0x20000000 to 0x30000000 and read / write (R, W) from the area from 0x3000000 to 0x40000000, and to read / write to the other areas (R, W) Are all rejected.
  • access control to the memory or I / O area can be performed for each arithmetic circuit managed by each base software, so that the reliability between the base software can be improved.
  • FIG. 4 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • a method for determining the memory / I / O area that can be executed by each of the arithmetic circuits 10P1-1 to 10P1-m to 10Pk-1 to 10Pk-n will be described.
  • FIG. 5 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • a method of starting the base software 70P1 to 70Pk for the arithmetic circuits 10P1-1 to 10P1-m to 10Pk-1 to 10Pk-n will be described.
  • Step 3 (S3) The execution environment division control unit 200 provides information about the allocated area to the base software 70P1 to 70Pk.
  • FIG. 6 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • a sign consisting of S and a number beside the arrow represents a step number.
  • a description will be given of a method in which the base software 70P1 to 70Pk starts the OSs of the respective execution environments 90P1 to 90Pk.
  • resource virtualization includes, for example, memory virtualization such as where to set an address assigned to address 0, and virtualization for I / O and interrupt processing.
  • FIG. 7 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • a case where an access permitted by the filter device 1010 is issued from the execution environment 90P1 will be described.
  • FIG. 8 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • the filter device 1010 is issued from the execution environment 90P1 .
  • FIG. 9 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • the execution environment division control unit 200 dynamically adjusts resources in a specific execution environment based on information given from the system.
  • the information given from the system means that, for example, an arithmetic circuit or a memory is newly added to the system, or the use of the arithmetic circuit or memory in a specific virtual environment is stopped for maintenance. Means that.
  • the base software 70P1 waits for a response from the execution environment division control means 200. Of course, when waiting for a response, the base software 70P1 may proceed with processing not related to the given information.
  • the base software 70P1 of the execution environment 90P1 starts operation based on the new information.
  • the base software may be notified to the system side or reset.
  • the setting may be forcibly changed. This makes it possible to control the base software with high reliability.
  • FIG. 10 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • a description will be given of a method in which the execution environment division control unit 200 dynamically adjusts resources between execution environments based on information given from a system or infrastructure software.
  • the information given from the system means, for example, distribution according to the load state of the arithmetic circuit or the memory.
  • Step 1 (S1) The execution environment division control means 200 receives information from the base software 70P1 of the system or the execution environment 90P1.
  • the base software 70P1 of the execution environment 90P1 may start the operation based on the new information, and may notify the system side when there is no response from the base software, or reset the system. May be.
  • the setting may be forcibly changed. This makes it possible to control the base software with high reliability.
  • FIG. 11 is a diagram showing an overall configuration of an information processing apparatus according to another embodiment of the present invention. Referring to FIG. 11, there is shown a configuration in which a memory 31 and an I / O 41 are shared among a plurality of semiconductor integrated circuits 100C1 to Ct.
  • the semiconductor integrated circuit 100C1 includes an execution environment division control unit 200C1 and an interconnection network 1000C1 including a filter device 1010C1.
  • the semiconductor integrated circuit 100Ct includes an execution environment division control unit 200Ct and an interconnection network 1000Ct including a filter device 1010Ct. That is, an information processing apparatus including a plurality of semiconductor integrated circuits provided with a shared memory / I / O is assumed.
  • FIG. 12 is a diagram for explaining an example of the operation of the information processing apparatus of FIG.
  • the sign consisting of S and a number beside the arrow represents a step number.
  • a description will be given of a method in which a plurality of execution environment division control means dynamically adjust resources between execution environments based on information given from a system or infrastructure software.
  • Step 1 (S1) The execution environment division control means 200C1 receives information from the system or the base software.
  • the system side may be notified, or the entire semiconductor integrated circuit may be reset.
  • the setting may be forcibly changed. This makes it possible to control the base software with high reliability.
  • FIG. 13 is a diagram showing an overall configuration of an information processing apparatus according to still another embodiment of the present invention.
  • the semiconductor integrated circuit 100C1 includes an execution environment division control unit 200C1 and an interconnection network 1000C1 including a filter device 1010C1.
  • the semiconductor integrated circuit 100Ct includes an execution environment division control unit 200Ct and an interconnection network 1000Ct including a filter device 1010Ct. That is, an information processing apparatus including a plurality of semiconductor integrated circuits provided with a distributed memory / I / O is assumed.
  • FIG. 14 is a diagram for explaining an example of the operation of the information processing apparatus of FIG.
  • a symbol consisting of S and a number beside the arrow represents a step number.
  • a description will be given of a method in which a plurality of execution environment division control means dynamically exchanges an OS between execution environments based on information given from a system or base software.
  • Step 1 (S1) The execution environment division control means 200C1 receives information from the system or the base software.
  • Step 7 (S7) The execution environment division control means 200Ct requests the execution environment to execute the OS.
  • Step 8 (S8) The execution environment division control means 200Ct obtains an OS execution response from the execution environment.
  • the copy of the memory it is possible to make it appear that the movement is completed instantaneously from the application by repeating the incremental copy.
  • the information processing apparatus and method capable of operating a plurality of pieces of base software have been described as examples.
  • the present embodiment is not limited to such an information processing apparatus and method, and any information Applicable to processing apparatus and method.

Abstract

Provided are a device and a method capable of inexpensively realizing a highly reliable information processor in an information processing device having a plurality of execution environments. The device comprises a plurality of arithmetic circuits (10P1-1, 10P1-m), a plurality of basic software programs (70P1 to 70Pk) executed in the plurality of arithmetic circuits and having the same reliability, a mutual coupling network (1000) having a filter means (1010) for limiting accesses from the plurality of arithmetic circuits, an arithmetic device (11) independent from the arithmetic circuits which respectively execute the plurality of softwareprograms, and an execution environment division control means (200) executed by the arithmetic circuit (11). The execution environment division control means is shared among the plurality of basic software programs, is more reliable than the programs, and changes the setting for limiting the accesses of the filter means of the mutual coupling network in cooperation with the software programs.

Description

複数の基盤ソフトウェアを動作可能な情報処理装置および方法Information processing apparatus and method capable of operating a plurality of platform software
 (関連出願についての記載)
 本願は、先の日本特許出願2008-061588号(2008年3月11日出願)の優先権を主張するものであり、前記先の出願の全記載内容は、本書に引用をもって繰込み記載されているものとみなされる。
 本発明は、相互結合網で接続された複数のCPUを有する半導体集積回路に関し、特に、信頼性と汎用性を考慮して、基盤ソフトウェアを安全に動作可能とする情報処理装置及び方法に関する。
(Description of related applications)
This application claims the priority of the previous Japanese Patent Application No. 2008-061588 (filed on Mar. 11, 2008), and the entire description of the previous application is incorporated herein by reference. Is considered to be.
The present invention relates to a semiconductor integrated circuit having a plurality of CPUs connected by an interconnection network, and more particularly, to an information processing apparatus and method capable of safely operating infrastructure software in consideration of reliability and versatility.
 データセンター等の情報処理装置において、今後は複数の基盤ソフトウェアを動作させることが予想される。しかしながら、基盤ソフトウェアの信頼性によって、システム動作の信頼性が左右されることになる。 In the information processing equipment such as a data center, it is expected that multiple infrastructure software will be operated in the future. However, the reliability of the system operation depends on the reliability of the base software.
 図15は、基盤ソフトウェアが実行される情報処理装置の典型的な構成の一例を模式的に示す図である。図15において、基盤ソフトウェア70P1は、演算回路10P1-1~10P1-mを管理し、基盤ソフトウェア70P1の上でアプリケーション群50P1-1~50P1-j、及びOS60P1-1~60P1-jを実行する。これにより、複数の演算回路10P1-1~10P1-mにおいて、複数の基盤ソフトウェアを独立に動作させることが可能となる。 FIG. 15 is a diagram schematically illustrating an example of a typical configuration of an information processing apparatus in which the base software is executed. In FIG. 15, the base software 70P1 manages the arithmetic circuits 10P1-1 to 10P1-m, and executes application groups 50P1-1 to 50P1-j and OSs 60P1-1 to 60P1-j on the base software 70P1. As a result, a plurality of pieces of base software can be operated independently in the plurality of arithmetic circuits 10P1-1 to 10P1-m.
 図15に示した情報処理装置は、基盤ソフトウェアにバグがあった場合、あるいは、基盤ソフトウェア自体が攻撃されて悪意のあるソフトウェアに奪取された場合、容易に他の実行環境を破壊することができる、といった問題があった。 The information processing apparatus shown in FIG. 15 can easily destroy other execution environments when there is a bug in the base software, or when the base software itself is attacked and taken by malicious software. There was a problem such as.
 図15の情報処理装置の問題に対応する技術として、特許文献1に開示された情報処理装置がある。図16は、ダウンロードされた追加処理を実行する情報通信端末装置の構成の一例を模式的に示す図である(特許文献2参照)。 As a technique for dealing with the problem of the information processing apparatus in FIG. FIG. 16 is a diagram schematically illustrating an example of the configuration of an information communication terminal device that executes a downloaded additional process (see Patent Document 2).
 図16において、各々の実行環境10000P1~Pkにて、複数のCPU10010AP1及び10010BP1を、実行するプログラム(処理)の信頼度に応じて、複数のドメイン10020AP1及び10020BP1に分け、各ドメインは、1つ又は複数のCPUを含み、追加処理等の低セキュリティの処理を実行するドメインに属するCPU10010BP1が、高セキュリティの処理を実行するドメインのメモリ31及び入出力装置(I/O)41に対してアクセスする場合には、該アクセス要求は、アクセス制御手段10030P1によって、アクセスの許可/非許可が判別され、許可されたアクセスのみが行われる構成とされる。この構成により、ハードウェア制御を基にした、非常に高信頼なセキュリティシステムの構築が可能となる。 In FIG. 16, in each execution environment 10000P1 to Pk, a plurality of CPUs 10010AP1 and 10010BP1 are divided into a plurality of domains 10020AP1 and 10020BP1 according to the reliability of the program (process) to be executed. When the CPU 10010BP1 that includes a plurality of CPUs and belongs to a domain that executes low-security processing such as additional processing accesses the memory 31 and the input / output device (I / O) 41 of the domain that executes high-security processing The access request is configured such that access permission / non-permission is determined by the access control unit 10030P1, and only permitted access is performed. With this configuration, it is possible to construct a highly reliable security system based on hardware control.
特表2004-500666号公報JP-T-2004-5000666 国際公開番号WO2006/022161 A1International Publication Number WO2006 / 022161 A1
 以下に本発明による関連技術の分析を与える。 The following is an analysis of related technology according to the present invention.
 図16に示した方式には、各々の実行環境において、基本処理を行うドメインを特定する必要がある。 In the method shown in FIG. 16, it is necessary to specify a domain for performing basic processing in each execution environment.
 しかしながら、データセンターのように、複数の使用者が存在し、かつ、特定の機能を実行することを目的としていない応用領域においては、各実行環境において、どのようなソフトウェアが実行されるかがわからない。このため、そのような基本処理を事前に特定することは困難であった。 However, in an application area such as a data center where there are multiple users and the purpose is not to execute a specific function, it is not known what software is executed in each execution environment. . For this reason, it is difficult to specify such basic processing in advance.
 さらに、図16の構成の場合、事前にOSが利用する領域を固定することが可能であった。 Furthermore, in the case of the configuration shown in FIG. 16, the area used by the OS can be fixed in advance.
 データセンターのように、様々な実行環境が想定される情報処理装置では、利用する資源領域をあらかじめ確定させることができない。このため、図16の構成は、データセンター等への適用等において、汎用性の面で改善の余地がある。 In an information processing apparatus that assumes various execution environments such as a data center, a resource area to be used cannot be determined in advance. Therefore, the configuration of FIG. 16 has room for improvement in terms of versatility when applied to a data center or the like.
 相互結合網で接続された複数のCPUを有する半導体集積回路に関して、情報処理装置全体の信頼性を保証するためには、複数の信頼できない(untrusted)基盤ソフトウェアを相互に高信頼に協調させる必要がある。しかしながら、上記した関連技術では、これを達成することは困難である。 With respect to a semiconductor integrated circuit having a plurality of CPUs connected by an interconnection network, in order to guarantee the reliability of the entire information processing apparatus, it is necessary to coordinate a plurality of untrusted infrastructure software with each other with high reliability. is there. However, it is difficult to achieve this with the related art described above.
 したがって、本発明の目的は、複数の実行環境を有する情報処理装置において、たとえ、ある基盤ソフトウェアの動作に不具合があったとしても、それによる影響を、他の実効環境に伝播させることが回避され、高信頼な情報処理装置が実現可能とする装置、方法を提供することにある。 Therefore, an object of the present invention is to prevent an information processing apparatus having a plurality of execution environments from propagating the influence due to the operation to other effective environments even if there is a malfunction in the operation of certain basic software. An object of the present invention is to provide an apparatus and a method that enable a highly reliable information processing apparatus to be realized.
 本発明の他の目的は、高信頼な情報処理装置を低コストで実現可能とする装置、方法を提供することにある。 Another object of the present invention is to provide an apparatus and method that can realize a highly reliable information processing apparatus at low cost.
 本発明のさらに他の目的は、信頼ができない基盤ソフトウェア間で、高信頼に動的な資源配分を行うことを可能とする装置、方法を提供することにある。 Still another object of the present invention is to provide an apparatus and method that enable dynamic resource allocation with high reliability between unreliable infrastructure software.
 前記目的を達成する本発明は、その概略を述べれば以下の通りである。 The present invention that achieves the above-described object will be summarized as follows.
 本発明の1つの側面によれば、複数の演算回路と、前記複数の演算回路でそれぞれ実行される複数の基盤ソフトウェアと、前記演算回路からのアクセスを制限し、前記演算回路同士の分離制御を行うフィルタ手段を有する相互結合網と、前記複数の基盤ソフトウェアをそれぞれ実行する演算回路とは別の演算回路と、前記別の演算回路で実行される実行環境分割制御手段と、を備え、前記実行環境分割制御手段は、複数の前記基盤ソフトウェアに対して1つ配設され、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する半導体集積回路あるいは情報処理装置が提供される。本発明において、前記複数の基盤ソフトウェアは互いに同一又は同等の信頼度を有する。 According to one aspect of the present invention, a plurality of arithmetic circuits, a plurality of base software executed by the plurality of arithmetic circuits, and access from the arithmetic circuits are restricted, and separation control between the arithmetic circuits is performed. An interconnection network having filter means for performing, an arithmetic circuit different from the arithmetic circuit for executing each of the plurality of infrastructure software, and an execution environment division control means executed by the different arithmetic circuit, One environment division control means is provided for a plurality of the base software, and a semiconductor integrated circuit or an information processing apparatus is provided for changing the access restriction setting of the filter means of the interconnection network. In the present invention, the plurality of base software have the same or equivalent reliability.
 本発明の他の側面によれば、複数の演算回路と、前記複数の演算回路でそれぞれ実行される複数の基盤ソフトウェアと、前記演算回路からのアクセスを制限し、前記演算回路同士の分離制御を行うフィルタ手段を有する相互結合網と、を備えた情報処理装置の制御方法であって、前記複数の基盤ソフトウェアをそれぞれ実行する演算回路とは別の演算回路で実行環境分割制御手段を実行し、前記実行環境分割制御手段は、複数の前記基盤ソフトウェアに対して1つ配設され、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する方法が提供される。 According to another aspect of the present invention, a plurality of arithmetic circuits, a plurality of basic software programs respectively executed by the plurality of arithmetic circuits, and access from the arithmetic circuits are restricted, and separation control between the arithmetic circuits is performed. An information processing apparatus control method comprising an interconnection network having filter means for performing execution environment division control means in an arithmetic circuit different from the arithmetic circuit for executing each of the plurality of infrastructure software, One execution environment division control unit is provided for a plurality of the base software, and a method for changing the access restriction setting of the filter unit of the interconnection network is provided.
 本発明によれば、複数の実行環境を有する情報処理装置において、たとえ、ある基盤ソフトウェアの動作に不具合があったとしても、それによる影響を、他の実効環境に伝播させることが回避され、高信頼な情報処理装置が実現可能である。 According to the present invention, in an information processing apparatus having a plurality of execution environments, even if there is a malfunction in the operation of a certain basic software, it is possible to avoid propagation of the influences to other effective environments. A reliable information processing apparatus can be realized.
 また、本発明によれば、高信頼な上記情報処理装置を、従来方式よりも、非常に低コストで実現することが可能である。 Further, according to the present invention, it is possible to realize the highly reliable information processing apparatus at a much lower cost than the conventional method.
 さらに、本発明によれば、信頼ができない基盤ソフトウェア間で、高信頼に動的な資源配分を行うことを可能としたことにより、より柔軟なシステム構成を使用者に提供することが可能である。 Furthermore, according to the present invention, it is possible to provide a more flexible system configuration to the user by enabling dynamic resource allocation with high reliability between unreliable infrastructure software. .
本発明の一実施例の情報処理装置の全体構成を示す図である。It is a figure which shows the whole structure of the information processing apparatus of one Example of this invention. 本発明の一実施例の半導体集積回路の全体構成を示す図である。1 is a diagram showing an overall configuration of a semiconductor integrated circuit according to an embodiment of the present invention. 本発明の一実施例のフィルタ装置に設定される分割情報を示す図である。It is a figure which shows the division | segmentation information set to the filter apparatus of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の一実施例の半導体集積回路の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the semiconductor integrated circuit of one Example of this invention. 本発明の別の実施例の情報処理装置の全体構成を示す図である。It is a figure which shows the whole structure of the information processing apparatus of another Example of this invention. 本発明の別の実施例の情報処理装置の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the information processing apparatus of another Example of this invention. 本発明のさらに別の実施例の情報処理装置の全体構成を示す図である。It is a figure which shows the whole structure of the information processing apparatus of another Example of this invention. 本発明のさらに別の実施例の情報処理装置の動作の一例を説明するための図である。It is a figure for demonstrating an example of operation | movement of the information processing apparatus of another Example of this invention. 関連技術を示す図である。It is a figure which shows a related technique. 別の関連技術を示す図である。It is a figure which shows another related technique.
符号の説明Explanation of symbols
10、10P1、10P2、10Pn、10P1-1、10P1-m
10Pk-1、10Pk-n 演算回路
11 実行環境分割制御手段用演算回路群
30 メモリ制御回路
31、31C1、31Ct メモリ
40 I/O制御回路
41、41C1、41Ct I/O
50、50P1-1、50P1-j アプリケーション群
60、60P1-1、60P1-j OS
70、70P1、70Pk 基盤ソフトウェア
90、90P1、90Pk 実行環境
100、100C1、100Ct 半導体集積回路
200、200C1、200Ct 実行環境分割制御手段
201 分割情報
1000、1000C1、1000Ct 相互結合網
1010、1010C1、1010Ct フィルタ装置
10000P1…Pk 実行環境
10010AP1、10010BP1 CPU
10020AP1、10020BP1 実行環境
10021AP1、10021BP1 OS
10022P1 基本処理
10023P1 追加処理
10030P1 アクセス制御手段
10, 10P1, 10P2, 10Pn, 10P1-1, 10P1-m
10Pk-1, 10Pk-n arithmetic circuit 11 arithmetic environment group 30 for execution environment division control means memory control circuit 31, 31C1, 31Ct memory 40 I / O control circuit 41, 41C1, 41Ct I / O
50, 50P1-1, 50P1-j Application group 60, 60P1-1, 60P1-j OS
70, 70P1, 70Pk Base software 90, 90P1, 90Pk Execution environment 100, 100C1, 100Ct Semiconductor integrated circuit 200, 200C1, 200Ct Execution environment division control means 201 Division information 1000, 1000C1, 1000Ct Interconnection network 1010, 1010C1, 1010Ct Filter device 10000P1 ... Pk execution environment 10010AP1, 10010BP1 CPU
10020AP1, 10020BP1 Execution environment 10021AP1, 10021BP1 OS
10022P1 Basic processing 10023P1 Additional processing 10030P1 Access control means
 本発明の実施形態について説明する。本発明は、その好ましい一実施の形態によれば、図1を参照すると、半導体集積回路100において、CPU等の演算回路10P1-Pnと、外部メモリ31と接続されるメモリ制御回路30と、外部I/O41と接続されるI/O制御回路40と、演算回路10P1-Pn、メモリ制御回路30、I/O制御回路40を相互接続し、一貫性を保持しながら、演算回路10P1-Pn同士の分離制御を行うことが可能なフィルタ装置1010を備える相互結合網1000と、を有する。以下、実施例に即して説明する。 Embodiments of the present invention will be described. According to a preferred embodiment of the present invention, referring to FIG. 1, in a semiconductor integrated circuit 100, an arithmetic circuit 10P1-Pn such as a CPU, a memory control circuit 30 connected to an external memory 31, an external circuit The I / O control circuit 40 connected to the I / O 41 and the arithmetic circuits 10P1-Pn, the memory control circuit 30, and the I / O control circuit 40 are interconnected, and the arithmetic circuits 10P1-Pn are connected to each other while maintaining consistency. And an interconnection network 1000 including a filter device 1010 capable of performing the separation control. In the following, description will be made in accordance with examples.
 図1は、本発明の一実施例の情報処理装置の全体構成を示す図である。図1を参照すると、半導体集積回路100において、CPU等の演算回路10P1-Pn、外部メモリ31と接続されるメモリ制御回路30、外部I/O41と接続されるI/O制御回路40に加えて、さらに、それらを相互接続し、かつ、一貫性を保持しながら演算回路同士の分離制御を行うことが可能なフィルタ装置1010を備える相互結合網1000を有する。 FIG. 1 is a diagram showing an overall configuration of an information processing apparatus according to an embodiment of the present invention. Referring to FIG. 1, in a semiconductor integrated circuit 100, in addition to an arithmetic circuit 10P1-Pn such as a CPU, a memory control circuit 30 connected to an external memory 31, and an I / O control circuit 40 connected to an external I / O 41. Furthermore, an interconnection network 1000 including a filter device 1010 capable of interconnecting them and performing control of separation between arithmetic circuits while maintaining consistency is provided.
 本実施例において、演算回路10、メモリ制御回路30、メモリ31、I/O制御回路40、I/O41、相互結合網1000は、それぞれ、別パッケージ構成だけでなく、SoC(System-on-Chip)内部の回路構成あるいは別チップによるSiP(System-in-Package)構成、3次元LSI構成、さらにその組み合わせからなる構成をとってもよい。 In this embodiment, the arithmetic circuit 10, the memory control circuit 30, the memory 31, the I / O control circuit 40, the I / O 41, and the interconnection network 1000 each have not only a separate package configuration but also a SoC (System-on-Chip). ) An internal circuit configuration, a SiP (System-in-Package) configuration with another chip, a three-dimensional LSI configuration, or a combination thereof may be used.
 本実施例によれば、演算回路10P1-Pnは、信号処理プロセッサ、または、VLIW(Very Long Instruction Word)プロセッサ、構成可能プロセッサ等の、プログラム動作が可能な演算装置であれば何でもよい。 According to the present embodiment, the arithmetic circuits 10P1-Pn may be any arithmetic device capable of performing a program operation, such as a signal processing processor, a VLIW (Very Long Instruction Word) processor, or a configurable processor.
 また、かかる構成において、フィルタ装置1010は、特許文献2(国際公開番号WO2006/022161 A1)などに開示された、一貫性を保持しながら演算回路同士の分離制御を行うことが可能なフィルタ装置であれば何でもよい。 In this configuration, the filter device 1010 is a filter device disclosed in Patent Document 2 (International Publication No. WO2006 / 022161, A1) and the like that can perform separation control between arithmetic circuits while maintaining consistency. Anything is fine.
 図2は、本発明の一実施例の半導体集積回路100の全体構成を示す図である。図2を参照すると、複数の演算回路群11と、複数の演算回路群11の上で実行される実行環境分割制御手段200と、演算回路10P1-1~10P1-m上で基盤ソフトウェア70P1が実行され、かつ、その上で、アプリケーション群50P1-1~50P1-j、及び、OS60P1-60P1-jがそれぞれ実行される、複数の実行環境90P1~90Pkを備えている。さらに、演算回路を相互接続し、かつ、一貫性を保持しながら演算回路同士の分離制御を行うことが可能なフィルタ装置1010を備える相互結合網1000を有する。複数の実行環境90P1~90Pkにおける基盤ソフトウェア70P1~70Pkはそれぞれ同一又は同等の信頼度を有する。なお、以下では、複数の実行環境90P1~90Pkを実行環境90で表す場合もある。 FIG. 2 is a diagram showing an overall configuration of the semiconductor integrated circuit 100 according to an embodiment of the present invention. Referring to FIG. 2, the plurality of arithmetic circuit groups 11, the execution environment division control means 200 executed on the plurality of arithmetic circuit groups 11, and the base software 70P1 are executed on the arithmetic circuits 10P1-1 to 10P1-m. In addition, a plurality of execution environments 90P1 to 90Pk are provided on which the application groups 50P1-1 to 50P1-j and the OS 60P1-60P1-j are respectively executed. In addition, an interconnection network 1000 including a filter device 1010 capable of interconnecting arithmetic circuits and performing separation control between arithmetic circuits while maintaining consistency is provided. The base software 70P1 to 70Pk in the plurality of execution environments 90P1 to 90Pk have the same or equivalent reliability. In the following, a plurality of execution environments 90P1 to 90Pk may be represented by the execution environment 90.
 なお、基盤ソフトウェアとは、仮想化(virtualization)ソフトウェアやファームウェアなど、OSの実行を支える基盤ソフトウェアを意味する。OSの改造が許されるシステムであれば、OSそのものに基盤ソフトウェアが含まれていてもよいことは勿論である。 The basic software means basic software that supports execution of the OS, such as virtualization software and firmware. Of course, if the OS is allowed to be modified, the OS itself may include the base software.
 かかる構成において、フィルタ装置1010は、実行環境分割制御手段200によってのみ、その設定が変更可能である。実行環境分割制御手段200及び演算回路群11からの要求は全て許可してもよいし、フィルタ装置1010にて自身のアクセス範囲を設定してもよい。 In such a configuration, the setting of the filter device 1010 can be changed only by the execution environment division control unit 200. All requests from the execution environment division control unit 200 and the arithmetic circuit group 11 may be permitted, or the filter device 1010 may set its own access range.
 実行環境90は、データセンターの各使用者に割り当てられるアプリケーションの実行ためのハードウェア・ソフトウェア環境である。すなわち、1つの実行環境は、図16に示される複数のドメインを含む。 The execution environment 90 is a hardware / software environment for executing an application assigned to each user of the data center. That is, one execution environment includes a plurality of domains shown in FIG.
 本実施例において、実行環境分割制御手段200は、実行環境90P1~90Pkを実行する演算回路とは独立な演算回路群11で実行される。 In the present embodiment, the execution environment division control means 200 is executed by the arithmetic circuit group 11 independent of the arithmetic circuits that execute the execution environments 90P1 to 90Pk.
 すなわち、最小の演算回路群11(1つのCPUないし複数のCPU)を新規に情報処理装置に追加し、さらに、実行環境の分割と、実行環境間の資源調停との機能を、実行環境から共通項として切り出して、それを実行環境間で共有可能な実行環境分割制御手段200として別途切り出した構成といえる。これは、実行環境内で基本処理の切り出しが困難であることに着目し、基本処理の信頼度を逆に低く設定してしまうことで、実行環境全体を低信頼度の処理とみなすことが可能となり、その結果、各実行環境内でフィルタ制御を行うのではなく、装置全体で共有化したフィルタ制御を行う実行環境分割手段200を切り出すことが可能となったものである。これにより、極めて低コストなフィルタ制御が可能となる。 That is, the minimum arithmetic circuit group 11 (one CPU or a plurality of CPUs) is newly added to the information processing apparatus, and the functions of the division of the execution environment and the resource arbitration between the execution environments are shared from the execution environment. It can be said that it is cut out as a term and separately cut out as execution environment division control means 200 that can be shared between execution environments. This is because it is difficult to cut out the basic process in the execution environment, and by setting the reliability of the basic process low, the entire execution environment can be regarded as a process with low reliability. As a result, instead of performing filter control within each execution environment, it is possible to extract the execution environment dividing means 200 that performs filter control shared by the entire apparatus. Thereby, extremely low-cost filter control is possible.
 データセンター等の情報処理装置提供者は、その使用者がその実行環境の中でどのようなソフトウェアを動作させうるのかを事前に(装置出荷前に)知ることができない。その提供者は、その実行環境全体が100%バグフリーであり、かつ、悪意のあるウィルスを完全に防いでいることを保証することができないため、実行環境全体の信頼度を、情報処理装置にとって低いとみなすことができる。 An information processing apparatus provider such as a data center cannot know in advance (before the apparatus is shipped) what kind of software the user can operate in the execution environment. Since the provider cannot guarantee that the entire execution environment is 100% bug-free and completely prevents malicious viruses, the reliability of the entire execution environment is determined for the information processing apparatus. Can be considered low.
 一方、情報処理装置提供者は、演算回路群11及び実行環境分割制御手段200の動作を事前に(装置出荷前に)保証することが可能である。この点において、全実行環境と比べて、実行環境分割制御手段200は、情報処理装置にとって高信頼であるといえる。 On the other hand, the information processing apparatus provider can guarantee the operations of the arithmetic circuit group 11 and the execution environment division control means 200 in advance (before the apparatus is shipped). In this respect, it can be said that the execution environment division control unit 200 is more reliable for the information processing apparatus than the entire execution environment.
 関連技術とは異なり、演算回路群11にて、情報処理装置の基本機能が実行されるわけではない。使用者毎に不可欠な基本機能は、それぞれの実行環境の中に含まれる。 Unlike the related technology, the arithmetic circuit group 11 does not execute the basic functions of the information processing apparatus. Basic functions indispensable for each user are included in each execution environment.
 本実施例においては、複数の使用者によって共有された半導体集積回路100の上で、使用者毎に互いに信頼できない実行環境が動作している状況で、高信頼な実行環境分割制御手段200及び演算回路群11を新規に追加し、かつ、それを実行環境間で共有することで、フィルタ装置1010を経由して、ハードウェア的に、信頼できない実行環境同士の相互干渉の防止を低コストに行う、構成を特徴の1つとしている。 In the present embodiment, the highly reliable execution environment division control means 200 and the calculation are executed in a situation where an execution environment that is not reliable for each user is operating on the semiconductor integrated circuit 100 shared by a plurality of users. By newly adding the circuit group 11 and sharing it between the execution environments, the mutual interference between the unreliable execution environments is performed at low cost via the filter device 1010 in terms of hardware. The configuration is one of the features.
 さらに、本実施例において、実行環境分割制御手段200は、基盤ソフトウェア群70と協調することで、実行環境間での資源調停を安全に、かつ、低コストに行うことが可能となる。これが可能である理由は、本実施例においては、基盤ソフトウェア群も信頼可能ではないものの、フィルタ装置1010の強制的な設定変更や、リセットなどの回路的な強制制御を経由することで、ある使用者に属する実行環境がCPU資源等を独占することをハードウェア的に回避できるためである。 Furthermore, in this embodiment, the execution environment division control means 200 can cooperate with the basic software group 70 to perform resource arbitration between execution environments safely and at low cost. The reason why this is possible is that, in the present embodiment, although the basic software group is not reliable, it is through a forced setting change of the filter device 1010 or a circuit-based forced control such as a reset. This is because the execution environment belonging to the user can avoid monopolizing the CPU resources and the like in terms of hardware.
 図3は、本発明の一実施例のフィルタ装置1010に設定される分割情報201を示す図である。図3において、演算回路#1-10は、0x00000000から0x10000000までの領域の読み出し(R)と、0x1000000から0x20000000までの領域の読み書き(R,W)とが許可され、それ以外の領域への読み書きは全て拒否される。 FIG. 3 is a diagram showing the division information 201 set in the filter device 1010 according to an embodiment of the present invention. In FIG. 3, the arithmetic circuit # 1-10 is permitted to read (R) the area from 0x00000000 to 0x10000000 and read / write (R, W) to the area from 0x1000000 to 0x20000000. Are all rejected.
 演算回路#11-50は、0x20000000から0x30000000までの領域の読み出し(R)と0x3000000から0x40000000までの領域の読み書き(R,W)とが許可され、それ以外の領域への読み書き(R,W)は全て拒否される。 The arithmetic circuit # 11-50 is permitted to read (R) the area from 0x20000000 to 0x30000000 and read / write (R, W) from the area from 0x3000000 to 0x40000000, and to read / write to the other areas (R, W) Are all rejected.
 これにより、それぞれの基盤ソフトウェアが管理する演算回路ごとに、メモリないしI/O領域へのアクセス制御を行うことができるので、基盤ソフトウェア間の信頼性を高めることが可能である。 Thus, access control to the memory or I / O area can be performed for each arithmetic circuit managed by each base software, so that the reliability between the base software can be improved.
 図4は、図2の半導体集積回路100の動作の一例を説明するための図である。図4において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、演算回路10P1-1~10P1-mから10Pk-1~10Pk-nまでがそれぞれ実行可能なメモリ・I/O領域を定める方法について説明する。 FIG. 4 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 4, the sign consisting of S and a number beside the arrow represents a step number. In this example, a method for determining the memory / I / O area that can be executed by each of the arithmetic circuits 10P1-1 to 10P1-m to 10Pk-1 to 10Pk-n will be described.
 ステップ1(S1):実行環境分割制御手段200は、あらかじめ定められた分割情報201に基づき、フィルタ装置1010の設定を行う。 Step 1 (S1): The execution environment division control means 200 sets the filter device 1010 based on the predetermined division information 201.
 図5は、図2の半導体集積回路100の動作の一例を説明するための図である。図5において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、演算回路10P1-1~10P1-mから10Pk-1~10Pk-nまでに対して基盤ソフトウェア70P1~70Pkを起動する方法について説明する。 FIG. 5 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 5, the sign consisting of S and a number beside the arrow represents a step number. In this example, a method of starting the base software 70P1 to 70Pk for the arithmetic circuits 10P1-1 to 10P1-m to 10Pk-1 to 10Pk-n will be described.
 ステップ1(S1):実行環境分割制御手段200は、演算回路10P1-1~10P1-mから10Pk-1~10Pk-nまでの起動を行う。 Step 1 (S1): The execution environment division control means 200 starts up the arithmetic circuits 10P1-1 to 10P1-m to 10Pk-1 to 10Pk-n.
 ステップ2(S2):演算回路10P1-1~10P1-mは、基盤ソフトウェア70P1を起動し、また、演算回路10Pk-1~10Pk-nは基盤ソフトウェア70Pkを起動する。 Step 2 (S2): The arithmetic circuits 10P1-1 to 10P1-m start the base software 70P1, and the arithmetic circuits 10Pk-1 to 10Pk-n start the base software 70Pk.
 ステップ3(S3):実行環境分割制御手段200は、基盤ソフトウェア70P1~70Pkに対して、割り当てた領域についての情報を提供する。 Step 3 (S3): The execution environment division control unit 200 provides information about the allocated area to the base software 70P1 to 70Pk.
 ここで、基盤ソフトウェアに、仮に不具合があったとしても、フィルタ装置1010が設定されているので、基盤ソフトウェアに割り当てられた領域以外へは干渉できないため、極めて高信頼な基盤ソフトウェアの起動が実現できている。 Here, even if there is a problem in the base software, since the filter device 1010 is set, it is not possible to interfere with the area other than the area assigned to the base software. ing.
 図6は、図2の半導体集積回路100の動作の一例を説明するための図である。図6において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、基盤ソフトウェア70P1~70Pkがそれぞれの実行環境90P1~90PkのOSを起動する方法について説明する。 FIG. 6 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 6, a sign consisting of S and a number beside the arrow represents a step number. In this example, a description will be given of a method in which the base software 70P1 to 70Pk starts the OSs of the respective execution environments 90P1 to 90Pk.
 ステップ1(S1):基盤ソフトウェア70P1~70Pkは、図5で与えられた情報を元に、実行するOSに対する資源の仮想化を行い、そして、OSを起動する。 Step 1 (S1): The base software 70P1 to 70Pk virtualizes resources for the OS to be executed based on the information given in FIG. 5, and starts the OS.
 ここで、資源の仮想化とは、例えば、0番地に割り当てるアドレスをどこに設定するかといったメモリ仮想化や、I/Oや割込み処理に対する仮想化を含む。 Here, resource virtualization includes, for example, memory virtualization such as where to set an address assigned to address 0, and virtualization for I / O and interrupt processing.
 図7は、図2の半導体集積回路100の動作の一例を説明するための図である。図7において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、実行環境90P1から、フィルタ装置1010で許可されたアクセスが発行された場合について説明する。 FIG. 7 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 7, the sign consisting of S and a number beside the arrow represents a step number. In this example, a case where an access permitted by the filter device 1010 is issued from the execution environment 90P1 will be described.
 ステップ1(S1):仮想化環境90P1から、フィルタ装置1010へアクセスが発行される。 Step 1 (S1): Access is issued from the virtualization environment 90P1 to the filter device 1010.
 ステップ2(S2):フィルタ装置1010は、当該アクセスが許可されることを判断し、その結果、相互結合網1000経由で、そのアクセスを発行する。 Step 2 (S2): The filter device 1010 determines that the access is permitted, and as a result, issues the access via the interconnection network 1000.
 図8は、図2の半導体集積回路100の動作の一例を説明するための図である。図8において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、実行環境90P1から、フィルタ装置1010で許可されないアクセスが発行された場合について説明する。 FIG. 8 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 8, the sign consisting of S and a number beside the arrow represents a step number. In this example, a case where an access that is not permitted by the filter device 1010 is issued from the execution environment 90P1 will be described.
 ステップ1(S1):仮想化環境90P1から、フィルタ装置1010へアクセスが発行される。 Step 1 (S1): Access is issued from the virtualization environment 90P1 to the filter device 1010.
 ステップ2(S2):フィルタ装置1010は、当該アクセスが許可されないことを判断し、その結果、相互結合網1000経由で、アクセスエラーを発行元の演算回路へと通知する。 Step 2 (S2): The filter device 1010 determines that the access is not permitted and, as a result, notifies the access error to the issuing arithmetic circuit via the interconnection network 1000.
 図9は、図2の半導体集積回路100の動作の一例を説明するための図である。図9において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、実行環境分割制御手段200が、システムから与えられた情報に基づいて、特定の実行環境において、動的に資源を調整する方法について説明する。ここで、システムから与えられた情報とは、例えば、演算回路ないしメモリが新規にシステムに追加された、あるいは、保守のために、特定の仮想化環境の演算回路やメモリの使用を停止するといったことを意味する。 FIG. 9 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 9, the sign consisting of S and a number beside the arrow represents a step number. In this example, a method will be described in which the execution environment division control unit 200 dynamically adjusts resources in a specific execution environment based on information given from the system. Here, the information given from the system means that, for example, an arithmetic circuit or a memory is newly added to the system, or the use of the arithmetic circuit or memory in a specific virtual environment is stopped for maintenance. Means that.
 ステップ1(S1):実行環境分割制御手段200は、システムから与えられた情報に基づいて、実行環境(仮想化環境)90P1の基盤ソフトウェア70P1に通知を行う。 Step 1 (S1): The execution environment division control means 200 notifies the base software 70P1 of the execution environment (virtualization environment) 90P1 based on information given from the system.
 ステップ2(S2):実行環境90P1の基盤ソフトウェア70P1は、その通知に基づいて、自身の情報を更新し、その結果を、実行環境分割制御手段200へと返答する。 Step 2 (S2): The base software 70P1 of the execution environment 90P1 updates its information based on the notification and returns the result to the execution environment division control means 200.
 返答後、基盤ソフトウェア70P1は、実行環境分割制御手段200からの応答待ちになる。応答待ち時に、基盤ソフトウェア70P1は与えられた情報に関係ない処理は進めてもよいことは勿論である。 After the response, the base software 70P1 waits for a response from the execution environment division control means 200. Of course, when waiting for a response, the base software 70P1 may proceed with processing not related to the given information.
 ステップ3(S3):実行環境分割制御手段200は、今回与えられた情報に基づき、フィルタ装置1010の設定を行う。 Step 3 (S3): The execution environment division control means 200 sets the filter device 1010 based on the information given this time.
 ステップ4(S4):実行環境分割制御手段200は、実行環境90P1の基盤ソフトウェア70P1にフィルタ設定が完了したことを通知する。 Step 4 (S4): The execution environment division control means 200 notifies the base software 70P1 of the execution environment 90P1 that the filter setting has been completed.
 これにより、実行環境90P1の基盤ソフトウェア70P1は、新しい情報に基づいて動作を開始する。 Thereby, the base software 70P1 of the execution environment 90P1 starts operation based on the new information.
 ここで、基盤ソフトウェアから応答が無かった場合には、システム側に通知してもよいし、あるいは、リセットを行っても良い。あるいは、強制的に設定を変更してもよい。これにより、高信頼に基盤ソフトウェアを制御することが可能である。 Here, if there is no response from the base software, it may be notified to the system side or reset. Alternatively, the setting may be forcibly changed. This makes it possible to control the base software with high reliability.
 図10は、図2の半導体集積回路100の動作の一例を説明するための図である。図10において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、実行環境分割制御手段200が、システムないし基盤ソフトウェアから与えられた情報に基づいて、実行環境間において、動的に資源を調整する方法について説明する。なお、システムから与えられた情報とは、例えば、演算回路ないしメモリの負荷状況に応じた配分といったことを意味する。 FIG. 10 is a diagram for explaining an example of the operation of the semiconductor integrated circuit 100 of FIG. In FIG. 10, the sign consisting of S and a number beside the arrow represents a step number. In this example, a description will be given of a method in which the execution environment division control unit 200 dynamically adjusts resources between execution environments based on information given from a system or infrastructure software. The information given from the system means, for example, distribution according to the load state of the arithmetic circuit or the memory.
 ステップ1(S1):実行環境分割制御手段200は、システムないし実行環境90P1の基盤ソフトウェア70P1からの情報を受理する。 Step 1 (S1): The execution environment division control means 200 receives information from the base software 70P1 of the system or the execution environment 90P1.
 ステップ2(S2):実行環境分割制御手段200は、その情報に基づいて、実行環境90Pkの基盤ソフトウェアに当該資源を調整するように依頼する。 Step 2 (S2): The execution environment division control means 200 requests the base software of the execution environment 90Pk to adjust the resource based on the information.
 ステップ3(S3):実行環境90Pkの基盤ソフトウェア70Pkは、その通知に基づいて、自身の資源を調整し、その結果を、実行環境分割制御手段200へと返答する。 Step 3 (S3): The base software 70Pk of the execution environment 90Pk adjusts its own resources based on the notification, and returns the result to the execution environment division control means 200.
 ステップ4(S4):実行環境分割制御手段200は、今回の情報に基づき、フィルタ装置1010の設定を行う。 Step 4 (S4): The execution environment division control unit 200 sets the filter device 1010 based on the current information.
 ステップ5(S5):実行環境分割制御手段200は、実行環境90P1の基盤ソフトウェア70P1にフィルタ設定が完了したことを通知する。 Step 5 (S5): The execution environment division control means 200 notifies the base software 70P1 of the execution environment 90P1 that the filter setting has been completed.
 これにより、実行環境90P1の基盤ソフトウェア70P1は、新しい情報に基づいて動作を開始することで、基盤ソフトウェアから応答が無かった場合には、システム側に通知してもよいし、あるいは、リセットを行っても良い。また、強制的に設定を変更してもよい。これにより、高信頼に基盤ソフトウェアを制御することが可能である。 Thereby, the base software 70P1 of the execution environment 90P1 may start the operation based on the new information, and may notify the system side when there is no response from the base software, or reset the system. May be. The setting may be forcibly changed. This makes it possible to control the base software with high reliability.
 図11は、本発明の別の実施例の情報処理装置の全体構成を示す図である。図11を参照すると、複数の半導体集積回路100C1~Ctにおいて、メモリ31とI/O41が共有されている構成を示している。 FIG. 11 is a diagram showing an overall configuration of an information processing apparatus according to another embodiment of the present invention. Referring to FIG. 11, there is shown a configuration in which a memory 31 and an I / O 41 are shared among a plurality of semiconductor integrated circuits 100C1 to Ct.
 ここで、メモリとI/Oは物理的に分散していたとしても、論理的に共有されていればよい。 Here, even if the memory and I / O are physically distributed, they need only be logically shared.
 半導体集積回路100C1には、実行環境分割制御手段200C1と、フィルタ装置1010C1を含む相互結合網1000C1が含まれる。 The semiconductor integrated circuit 100C1 includes an execution environment division control unit 200C1 and an interconnection network 1000C1 including a filter device 1010C1.
 また、半導体集積回路100Ctには、実行環境分割制御手段200Ctと、フィルタ装置1010Ctを含む相互結合網1000Ctが含まれるものとする。すなわち、共有メモリ・I/Oを備えた、複数の半導体集積回路からなる情報処理装置を想定している。 Also, it is assumed that the semiconductor integrated circuit 100Ct includes an execution environment division control unit 200Ct and an interconnection network 1000Ct including a filter device 1010Ct. That is, an information processing apparatus including a plurality of semiconductor integrated circuits provided with a shared memory / I / O is assumed.
 図12は、図11の情報処理装置の動作の一例を説明するための図である。図12において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、複数の実行環境分割制御手段が、システムないし基盤ソフトウェアから与えられた情報に基づいて、実行環境間において、動的に資源を調整する方法について説明する。 FIG. 12 is a diagram for explaining an example of the operation of the information processing apparatus of FIG. In FIG. 12, the sign consisting of S and a number beside the arrow represents a step number. In this example, a description will be given of a method in which a plurality of execution environment division control means dynamically adjust resources between execution environments based on information given from a system or infrastructure software.
 ステップ1(S1):実行環境分割制御手段200C1は、システムないし基盤ソフトウェアからの情報を受理する。 Step 1 (S1): The execution environment division control means 200C1 receives information from the system or the base software.
 ステップ2(S2):実行環境分割制御手段200C1は、その情報に基づいて、半導体集積回路100Ctに備わる実行環境分割制御手段200Ctに当該資源を調整するように依頼する。 Step 2 (S2): The execution environment division control unit 200C1 requests the execution environment division control unit 200Ct included in the semiconductor integrated circuit 100Ct to adjust the resource based on the information.
 ステップ3(S3):実行環境分割制御手段200Ctは、その通知に基づいて、自身の集積回路内の実行環境へ資源調整を依頼する。 Step 3 (S3): The execution environment division control means 200Ct requests resource adjustment to the execution environment in its integrated circuit based on the notification.
 ステップ4(S4):実行環境分割制御手段200Ctは、資源調整を依頼した実行環境から応答を受理する。 Step 4 (S4): The execution environment division control means 200Ct receives a response from the execution environment that requested the resource adjustment.
 ステップ5(S5):実行環境分割制御手段200Ctは、その情報に基づき、フィルタ装置1010Ctの設定を変更する。 Step 5 (S5): The execution environment division control unit 200Ct changes the setting of the filter device 1010Ct based on the information.
 ステップ6(S6):実行環境分割制御手段200Ctは、資源調整の完了について、実行環境分割制御手段200C1へ返答する。 Step 6 (S6): The execution environment division control unit 200Ct returns a response to the execution environment division control unit 200C1 regarding the completion of the resource adjustment.
 ステップ7(S7):実行環境分割制御手段200Ctからの応答を受けると、実行環境分割制御手段200C1は、今回の情報に基づき、フィルタ装置1010C1の設定を行う。 Step 7 (S7): Upon receiving a response from the execution environment division control unit 200Ct, the execution environment division control unit 200C1 sets the filter device 1010C1 based on the current information.
 ステップ8(S8):実行環境分割制御手段200C1は、システムないし基盤ソフトウェアへ資源調整が完了したことを通知する。ここで、基盤ソフトウェアから応答が無かった場合には、システム側に通知してもよいし、あるいは、半導体集積回路ごとリセットを行っても良い。また、強制的に設定を変更してもよい。これにより、高信頼に基盤ソフトウェアを制御することが可能である。 Step 8 (S8): The execution environment division control means 200C1 notifies the system or the base software that the resource adjustment is completed. Here, when there is no response from the base software, the system side may be notified, or the entire semiconductor integrated circuit may be reset. The setting may be forcibly changed. This makes it possible to control the base software with high reliability.
 図13は、本発明のさらに別の実施例の情報処理装置の全体構成を示す図である。図13を参照すると、複数の半導体集積回路100C1~Ctにおいて、分散メモリ31C1~CtとI/O41C1~Ctの構成を示している。半導体集積回路100C1には、実行環境分割制御手段200C1と、フィルタ装置1010C1を含む相互結合網1000C1が含まれる。また、半導体集積回路100Ctには、実行環境分割制御手段200Ctと、フィルタ装置1010Ctを含む相互結合網1000Ctが含まれるものとしている。すなわち、分散メモリ・I/Oを備えた、複数の半導体集積回路からなる情報処理装置を想定している。 FIG. 13 is a diagram showing an overall configuration of an information processing apparatus according to still another embodiment of the present invention. Referring to FIG. 13, a configuration of distributed memories 31C1 to Ct and I / O 41C1 to Ct in a plurality of semiconductor integrated circuits 100C1 to Ct is shown. The semiconductor integrated circuit 100C1 includes an execution environment division control unit 200C1 and an interconnection network 1000C1 including a filter device 1010C1. Further, the semiconductor integrated circuit 100Ct includes an execution environment division control unit 200Ct and an interconnection network 1000Ct including a filter device 1010Ct. That is, an information processing apparatus including a plurality of semiconductor integrated circuits provided with a distributed memory / I / O is assumed.
 図14は、図13の情報処理装置の動作の一例を説明するための図である。図14において、矢印脇のSと数字からなる符合は、ステップ番号を表している。この例では、複数の実行環境分割制御手段が、システムないし基盤ソフトウェアから与えられた情報に基づいて、実行環境間において、動的にOSをやり取りする方法について説明する。 FIG. 14 is a diagram for explaining an example of the operation of the information processing apparatus of FIG. In FIG. 14, a symbol consisting of S and a number beside the arrow represents a step number. In this example, a description will be given of a method in which a plurality of execution environment division control means dynamically exchanges an OS between execution environments based on information given from a system or base software.
 ステップ1(S1):実行環境分割制御手段200C1は、システムないし基盤ソフトウェアからの情報を受理する。 Step 1 (S1): The execution environment division control means 200C1 receives information from the system or the base software.
 ステップ2(S2):実行環境分割制御手段200C1は、その情報に基づいて、半導体集積回路100Ctに備わる実行環境分割制御手段200Ctに当該OSの実行に必要な情報を通知する。 Step 2 (S2): The execution environment division control unit 200C1 notifies the execution environment division control unit 200Ct included in the semiconductor integrated circuit 100Ct of information necessary for executing the OS based on the information.
 ステップ3(S3):実行環境分割制御手段200Ctは、その通知に基づいて、メモリ31Ctの空き領域について、実行環境分割制御手段200C1からの書き込みが可能となるように、フィルタ装置1010Ctの設定を変更する。実行環境分割制御手段200C1は、それ以外の領域の書き込みは許可されない。 Step 3 (S3): Based on the notification, the execution environment division control unit 200Ct changes the setting of the filter device 1010Ct so that the free space in the memory 31Ct can be written from the execution environment division control unit 200C1. To do. The execution environment division control unit 200C1 is not permitted to write to other areas.
 ステップ4(S4):実行環境分割制御手段200Ctは、メモリ31Ctの空き領域について、実行環境分割制御手段200C1に返答する。 Step 4 (S4): The execution environment division control unit 200Ct returns a response to the execution environment division control unit 200C1 regarding the free area of the memory 31Ct.
 ステップ5(S5):実行環境分割制御手段200C1は、OS実行に必要な情報を、
メモリ31C1からメモリ31Ctの指定された領域へコピーを行う。
Step 5 (S5): The execution environment division control unit 200C1 obtains information necessary for OS execution.
Copy from the memory 31C1 to the designated area of the memory 31Ct.
 ステップ6(S6):実行環境分割制御手段200C1は、半導体集積回路100Ctに備わる実行環境分割制御手段200Ctに当該OSの実行に必要な情報の転送完了を通知する。 Step 6 (S6): The execution environment division control unit 200C1 notifies the execution environment division control unit 200Ct included in the semiconductor integrated circuit 100Ct that transfer of information necessary for execution of the OS is completed.
 ステップ7(S7):実行環境分割制御手段200Ctは、実行環境へOSの実行を依頼する。 Step 7 (S7): The execution environment division control means 200Ct requests the execution environment to execute the OS.
 ステップ8(S8):実行環境分割制御手段200Ctは、実行環境からOS実行の応答を得る。 Step 8 (S8): The execution environment division control means 200Ct obtains an OS execution response from the execution environment.
 ステップ9(S9):実行環境分割制御手段200Ctは、その情報に基づき、フィルタ装置1010Ctの設定を変更する。 Step 9 (S9): The execution environment division control unit 200Ct changes the setting of the filter device 1010Ct based on the information.
 ステップ10(S10):実行環境分割制御手段200Ctは、OS実行の完了について、実行環境分割制御手段200C1に返答する。 Step 10 (S10): The execution environment division control unit 200Ct returns a response to the execution environment division control unit 200C1 regarding the completion of OS execution.
 ステップ11(S11):実行環境分割制御手段200C1は、今回の情報に基づき、フィルタ装置1010C1の設定を行う。 Step 11 (S11): The execution environment division control unit 200C1 sets the filter device 1010C1 based on the current information.
 ステップ12(S12):実行環境分割制御手段200C1は、システムないし基盤ソフトウェアへOSのやりとりが完了したことを通知する。ここで、メモリのコピーに関して、インクリメンタルなコピーを繰り返すことで、アプリケーションからすると、瞬間的に移動が完了したように見せるといったことも可能である。 Step 12 (S12): The execution environment division control unit 200C1 notifies the system or the base software that the exchange of the OS is completed. Here, regarding the copy of the memory, it is possible to make it appear that the movement is completed instantaneously from the application by repeating the incremental copy.
 なお、前記各実施例では、複数の基盤ソフトウェアを動作可能な情報処理装置および方法を例に説明したが、本実施例は、かかる情報処理装置および方法に限定されるものではなく、任意の情報処理装置および方法に適用可能である。 In each of the above-described embodiments, the information processing apparatus and method capable of operating a plurality of pieces of base software have been described as examples. However, the present embodiment is not limited to such an information processing apparatus and method, and any information Applicable to processing apparatus and method.
 以上、本発明を上記実施例に即して説明したが、本発明は、上記実施例の構成や動作にのみ限定されるものではなく、本発明の範囲内で当業者であればなしうることが可能な各種変形、修正を含むことはもちろんである。
 なお、上記特許文献1、2の各開示を、本書に引用をもって繰り込むものとする。本発明の全開示(請求の範囲を含む)の枠内において、さらにその基本的技術思想に基づいて、実施形態ないし実施例の変更・調整が可能である。また、本発明の請求の範囲の枠内において種々の開示要素の多様な組み合わせないし選択が可能である。すなわち、本発明は、請求の範囲を含む全開示、技術的思想にしたがって当業者であればなし得るであろう各種変形、修正を含むことは勿論である。
Although the present invention has been described with reference to the above embodiments, the present invention is not limited to the configurations and operations of the above embodiments, and can be made by those skilled in the art within the scope of the present invention. Of course, it includes various possible variations and modifications.
The disclosures of Patent Documents 1 and 2 are incorporated herein by reference. Within the scope of the entire disclosure (including claims) of the present invention, the embodiments and examples can be changed and adjusted based on the basic technical concept. Various combinations and selections of various disclosed elements are possible within the scope of the claims of the present invention. That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

Claims (29)

  1.  複数の演算回路と、
     前記複数の演算回路でそれぞれ実行される複数の基盤ソフトウェアと、
     前記演算回路からのアクセスを制限し、前記演算回路同士の分離制御を行うフィルタ手段を有する相互結合網と、
     前記複数の基盤ソフトウェアをそれぞれ実行する演算回路とは別の演算回路と、
     前記別の演算回路で実行される実行環境分割制御手段と、
     を備え、
     前記実行環境分割制御手段は、複数の前記基盤ソフトウェアに対して1つ配設され、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する、こと特徴とする半導体集積回路。
    A plurality of arithmetic circuits;
    A plurality of platform software respectively executed by the plurality of arithmetic circuits;
    An interconnection network having filter means for restricting access from the arithmetic circuit and performing separation control between the arithmetic circuits;
    An arithmetic circuit different from the arithmetic circuit that respectively executes the plurality of base software;
    Execution environment division control means executed by the another arithmetic circuit;
    With
    One execution environment division control means is provided for a plurality of the base software, and changes the access restriction setting of the filter means of the interconnection network.
  2.  前記実行環境分割制御手段は、前記基盤ソフトウェアの信頼度よりも高い信頼度を有し、前記基盤ソフトウェアと協調して前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する、ことを特徴とする請求項1に記載の半導体集積回路。 The execution environment division control means has a higher reliability than the reliability of the base software, and changes the setting of access restriction of the filter means of the interconnection network in cooperation with the base software. The semiconductor integrated circuit according to claim 1.
  3.  前記複数の基盤ソフトウェアは互いに同一又は同等の信頼度を有する、ことを特徴とする請求項1又は2に記載の半導体集積回路。 3. The semiconductor integrated circuit according to claim 1, wherein the plurality of base software have the same or equivalent reliability.
  4.  前記実行環境分割制御手段は、前記複数の基盤ソフトウェアの起動時に、前記基盤ソフトウェアが利用可能な資源の情報を渡す、ことを特徴とする請求項1乃至3のいずれか1項に記載の半導体集積回路。 4. The semiconductor integrated device according to claim 1, wherein the execution environment division control unit delivers information on a resource that can be used by the base software when the plurality of base software is started. 5. circuit.
  5.  前記フィルタ手段は、前記基盤ソフトウェアに割り当てられた領域以外へのアクセスを制限する、ことを特徴とする請求項1乃至4のいずれか1項に記載の半導体集積回路。 5. The semiconductor integrated circuit according to claim 1, wherein the filter unit restricts access to an area other than an area allocated to the base software.
  6.  前記実行環境分割制御手段は、前記複数の演算回路の起動を行い、
     前記複数の演算回路はそれぞれ対応する基盤ソフトウェアを起動し、
     前記実行環境分割制御手段は、前記基盤ソフトウェアに対して、割り当てた領域についての情報を提供する、ことを特徴とする請求項1乃至5のいずれか1項に記載の半導体集積回路。
    The execution environment division control means activates the plurality of arithmetic circuits,
    Each of the plurality of arithmetic circuits starts corresponding base software,
    The semiconductor integrated circuit according to claim 1, wherein the execution environment division control unit provides information about the allocated area to the base software.
  7.  前記基盤ソフトウェアは、前記実行環境分割制御手段からの情報を元に実行するOS(オペレーティングシステム)に対する資源の仮想化を行いOSを起動する、ことを特徴とする請求項6に記載の半導体集積回路。 7. The semiconductor integrated circuit according to claim 6, wherein the base software virtualizes resources for an OS (operating system) to be executed based on information from the execution environment division control unit and starts the OS. .
  8.  前記演算回路、前記基盤ソフトウェア、OS、アプリケーションを含む仮想化環境から前記フィルタ手段へアクセスが発行されると、前記フィルタ手段は、前記アクセスが許可されるか否かを判断し、
     前記アクセスが許可される場合、前記相互結合網経由でアクセスを発行し、
     前記アクセスが許可されない場合、前記相互結合網経由でアクセスエラーを発行元の演算回路へと通知する、ことを特徴とする請求項7に記載の半導体集積回路。
    When access to the filter unit is issued from a virtual environment including the arithmetic circuit, the base software, the OS, and an application, the filter unit determines whether the access is permitted,
    If the access is permitted, issue access via the interconnection network;
    8. The semiconductor integrated circuit according to claim 7, wherein when the access is not permitted, an access error is notified to the issuing arithmetic circuit via the interconnection network.
  9.  前記実行環境分割制御手段は、システムの所定の情報に基づいて、前記基盤ソフトウェアに通知を行い、
     前記基盤ソフトウェアは前記通知に基づいて前記基盤ソフトウェアで保持する情報を更新し、更新結果を、前記実行環境分割制御手段へと返答し、
     前記実行環境分割制御手段は、前記フィルタ手段の設定を行い、
     前記実行環境分割制御手段は、前記基盤ソフトウェアに対して、前記フィルタ手段の設定が完了したことを通知する、ことを特徴とする請求項7に記載の半導体集積回路。
    The execution environment division control means notifies the base software based on predetermined information of the system,
    The base software updates information held in the base software based on the notification, and returns an update result to the execution environment division control unit,
    The execution environment division control unit sets the filter unit,
    8. The semiconductor integrated circuit according to claim 7, wherein the execution environment division control unit notifies the base software that the setting of the filter unit is completed.
  10.  前記実行環境分割制御手段は、一の基盤ソフトウェアから所定の情報を受理した場合、前記情報に基づいて他の基盤ソフトウェアに資源を調整するように依頼し、
     前記他の基盤ソフトウェアは、前記依頼に基づいて資源を調整しその結果を前記実行環境分割制御手段へと返答し、
     前記実行環境分割制御手段は、受け取った情報に基づき、前記フィルタ手段の設定を行い、前記一の基盤ソフトウェアに前記フィルタ手段の設定が完了したことを通知する、ことを特徴とする請求項7に記載の半導体集積回路。
    The execution environment division control means, when receiving predetermined information from one base software, requests other base software to adjust resources based on the information,
    The other infrastructure software adjusts resources based on the request and returns the result to the execution environment partitioning control unit,
    8. The execution environment division control unit sets the filter unit based on the received information, and notifies the one base software that the setting of the filter unit is completed. The semiconductor integrated circuit as described.
  11.  請求項1乃至10のいずれか一に記載の複数の半導体集積回路を備え、前記複数の半導体集積回路は、メモリと入出力装置を共用している、ことを特徴とする情報処理装置。 An information processing apparatus comprising the plurality of semiconductor integrated circuits according to any one of claims 1 to 10, wherein the plurality of semiconductor integrated circuits share a memory and an input / output device.
  12.  一の前記半導体集積回路の前記実行環境分割制御手段は、システムないし基盤ソフトウェアからの情報を受理した場合、前記実行環境分割制御手段は前記情報に基づいて、他の半導体集積回路の実行環境分割制御手段に資源を調整するように依頼し、
     他の前記半導体集積回路の前記実行環境分割制御手段は、前記依頼に基づいて、半導体集積回路内の実行環境へ資源調整を依頼し、
     資源調整を依頼した実行環境から応答を受理すると、他の前記半導体集積回路の前記実行環境分割制御手段は、前記情報に基づき、前記フィルタ手段の設定を変更し、他の前記半導体集積回路の前記実行環境分割制御手段は、資源調整の完了について、前記一の半導体集積回路の前記実行環境分割制御手段へ返答し、
     前記応答を受けると、前記一の半導体集積回路の前記実行環境分割制御手段は、前記情報に基づき、前記一の半導体集積回路のフィルタ手段の設定を行い、システムないし基盤ソフトウェアへ資源調整が完了したことを通知する、ことを特徴とする請求項11に記載の情報処理装置。
    When the execution environment division control unit of one of the semiconductor integrated circuits receives information from a system or base software, the execution environment division control unit executes the execution environment division control of another semiconductor integrated circuit based on the information. Ask the means to adjust the resources,
    The execution environment division control means of the other semiconductor integrated circuit requests resource adjustment to the execution environment in the semiconductor integrated circuit based on the request,
    Upon receiving a response from the execution environment that requested the resource adjustment, the execution environment division control unit of the other semiconductor integrated circuit changes the setting of the filter unit based on the information, and the other of the semiconductor integrated circuits The execution environment division control means responds to the execution environment division control means of the one semiconductor integrated circuit with respect to completion of resource adjustment,
    Upon receiving the response, the execution environment division control unit of the one semiconductor integrated circuit sets the filter unit of the one semiconductor integrated circuit based on the information, and the resource adjustment to the system or the base software is completed. The information processing apparatus according to claim 11, wherein the information processing apparatus is notified.
  13.  請求項1乃至10のいずれか一に記載の複数の半導体集積回路を備え、前記半導体集積回路はメモリと入出力装置をそれぞれ備える、ことを特徴とする情報処理装置。 An information processing apparatus comprising the plurality of semiconductor integrated circuits according to claim 1, wherein each of the semiconductor integrated circuits includes a memory and an input / output device.
  14.  一の前記半導体集積回路の実行環境分割制御手段は、システムないし基盤ソフトウェアからの情報を受理すると、前記情報に基づいて、他の半導体集積回路の実行環境分割制御手段にOS(オペレーティングシステム)の実行に必要な情報を通知し、
     前記他の半導体集積回路の実行環境分割制御手段は、前記通知に基づいて、前記他の半導体集積回路のメモリの空き領域について、前記一の半導体集積回路の実行環境分割制御手段からの書き込みが可能となるように、前記他の半導体集積回路のフィルタ手段の設定を変更し、
     前記他の半導体集積回路の実行環境分割制御手段は、前記他の半導体集積回路のメモリの空き領域について、前記一の半導体集積回路の実行環境分割制御手段に返答し、
     前記一の半導体集積回路の実行環境分割制御手段は、OSの実行に必要な情報を、前記一の半導体集積回路のメモリから、前記他の半導体集積回路のメモリの指定された領域へコピーを行い、
     前記一の半導体集積回路の実行環境分割制御手段は、前記他の半導体集積回路の実行環境分割制御手段にOSの実行に必要な情報の転送完了を通知し、前記他の半導体集積回路の実行環境分割制御手段は、実行環境へOSの実行を依頼し、
     実行環境からOSの実行の応答を得ると、前記他の半導体集積回路の実行環境分割制御手段は、前記情報に基づき、前記他の半導体集積回路のフィルタ装置の設定を変更し、前記他の半導体集積回路のOSの実行の完了について、前記一の半導体集積回路の実行環境分割制御手段に返答し、
     前記一の半導体集積回路の実行環境分割制御手段は、前記一の半導体集積回路のフィルタ手段の設定を行い、システムないし基盤ソフトウェアへOSのやりとりが完了したことを通知する、ことを特徴とする請求項13に記載の情報処理装置。
    When the execution environment division control unit of one of the semiconductor integrated circuits receives information from the system or the base software, the execution environment division control unit of another semiconductor integrated circuit executes an OS (operating system) based on the information. To inform you of the necessary information,
    Based on the notification, the execution environment division control unit of the other semiconductor integrated circuit can write from the execution environment division control unit of the one semiconductor integrated circuit with respect to an empty area of the memory of the other semiconductor integrated circuit. So that the setting of the filter means of the other semiconductor integrated circuit is changed,
    The execution environment division control unit of the other semiconductor integrated circuit responds to the execution environment division control unit of the one semiconductor integrated circuit with respect to an empty area of the memory of the other semiconductor integrated circuit,
    The execution environment division control unit of the one semiconductor integrated circuit copies information necessary for execution of the OS from the memory of the one semiconductor integrated circuit to a specified area of the memory of the other semiconductor integrated circuit. ,
    The execution environment division control unit of the one semiconductor integrated circuit notifies the execution environment division control unit of the other semiconductor integrated circuit of completion of transfer of information necessary for execution of the OS, and the execution environment of the other semiconductor integrated circuit The division control means requests the execution environment to execute the OS,
    When an OS execution response is obtained from the execution environment, the execution environment division control unit of the other semiconductor integrated circuit changes the setting of the filter device of the other semiconductor integrated circuit based on the information, and the other semiconductor integrated circuit Replying to the execution environment division control means of the one semiconductor integrated circuit about completion of execution of the OS of the integrated circuit;
    The execution environment division control unit of the one semiconductor integrated circuit sets the filter unit of the one semiconductor integrated circuit, and notifies the system or the base software that the exchange of the OS is completed. Item 14. The information processing apparatus according to Item 13.
  15.  複数の演算回路と、
     前記複数の演算回路でそれぞれ実行される複数の基盤ソフトウェアと、
     前記演算回路からのアクセスを制限し、前記演算回路同士の分離制御を行うフィルタ手段を有する相互結合網と、
     を備えた情報処理装置の制御方法であって、
     前記複数の基盤ソフトウェアをそれぞれ実行する演算回路とは別の演算回路で実行環境分割制御手段を実行し、
     前記実行環境分割制御手段は、
     複数の前記基盤ソフトウェアに対して1つ配設され、
     前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する、ことを特徴とする情報処理装置の制御方法。
    A plurality of arithmetic circuits;
    A plurality of platform software respectively executed by the plurality of arithmetic circuits;
    An interconnection network having filter means for restricting access from the arithmetic circuit and performing separation control between the arithmetic circuits;
    A method for controlling an information processing apparatus comprising:
    The execution environment division control means is executed by an arithmetic circuit different from the arithmetic circuit for executing the plurality of basic software,
    The execution environment division control means includes:
    One is arranged for a plurality of the above-mentioned base software,
    A method for controlling an information processing apparatus, comprising: changing an access restriction setting of the filter unit of the interconnection network.
  16.  前記実行環境分割制御手段は、前記基盤ソフトウェアの信頼度よりも高い信頼度を有し、前記基盤ソフトウェアと協調して、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する、ことを特徴とする請求項15に記載の情報処理装置の制御方法。 The execution environment division control means has a higher reliability than the reliability of the base software, and changes the access restriction setting of the filter means of the interconnection network in cooperation with the base software. The method for controlling an information processing apparatus according to claim 15, wherein:
  17.  前記複数の基盤ソフトウェアは互いに同一又は同等の信頼度を有する、ことを特徴とする請求項15又は16に記載の情報処理装置の制御方法。 17. The information processing apparatus control method according to claim 15 or 16, wherein the plurality of infrastructure software have the same or equivalent reliability.
  18.  前記実行環境分割制御手段は、前記複数の基盤ソフトウェアの起動時に、前記基盤ソフトウェアが利用可能な資源の情報を渡す、ことを特徴とする請求項15乃至17のいずれか1項に記載の情報処理装置の制御方法。 The information processing apparatus according to any one of claims 15 to 17, wherein the execution environment partitioning control unit passes information on resources that can be used by the base software when the plurality of base software is started. Control method of the device.
  19.  前記フィルタ手段は、前記基盤ソフトウェアに割り当てられた領域以外へのアクセスを制限する、ことを特徴とする請求項15乃至18のいずれか1項に記載の情報処理装置の制御方法。 The information processing apparatus control method according to any one of claims 15 to 18, wherein the filter unit restricts access to an area other than an area allocated to the base software.
  20.  前記実行環境分割制御手段は、複数の演算回路の起動を行い、
     前記複数の演算回路はそれぞれ対応する基盤ソフトウェアを起動し、
     前記実行環境分割制御手段は、前記基盤ソフトウェアに対して、割り当てた領域についての情報を提供する、ことを特徴とする請求項15乃至19のいずれか1項に記載の情報処理装置の制御方法。
    The execution environment division control means activates a plurality of arithmetic circuits,
    Each of the plurality of arithmetic circuits starts corresponding base software,
    The information processing apparatus control method according to any one of claims 15 to 19, wherein the execution environment division control unit provides information about the allocated area to the base software.
  21.  前記基盤ソフトウェアは、前記実行環境分割制御手段からの情報を元に、実行するOS(オペレーティングシステム)に対する資源の仮想化を行い、OSを起動する、ことを特徴とする請求項20に記載の情報処理装置の制御方法。 21. The information according to claim 20, wherein the base software virtualizes resources for an OS (operating system) to be executed based on information from the execution environment division control unit, and starts the OS. A method for controlling a processing apparatus.
  22.  前記演算回路、前記基盤ソフトウェア、前記OS,アプリケーションを含む仮想化環境からフィルタ手段へアクセスが発行されると、前記フィルタ手段は、前記アクセスが許可されるか否かを判断し、
     前記アクセスが許可される場合、前記相互結合網経由でアクセスを発行し、
     前記アクセスが許可されない場合、前記相互結合網経由で、アクセスエラーを発行元の演算回路へと通知する、ことを特徴とする請求項21に記載の情報処理装置の制御方法。
    When access is issued from the virtual environment including the arithmetic circuit, the base software, the OS, and the application to the filter unit, the filter unit determines whether the access is permitted,
    If the access is permitted, issue access via the interconnection network;
    The method according to claim 21, wherein when the access is not permitted, an access error is notified to the issuing arithmetic circuit via the interconnection network.
  23.  前記実行環境分割制御手段は、システムの所定の情報に基づいて、前記基盤ソフトウェアに通知を行い、前記基盤ソフトウェアは、前記通知に基づいて前記基盤ソフトウェアで保持する情報を更新し、結果を、前記実行環境分割制御手段へと返答し、
     前記実行環境分割制御手段は、前記フィルタ手段の設定を行い、
     前記実行環境分割制御手段は、前記基盤ソフトウェアに前記フィルタ手段の設定が完了したことを通知する、ことを特徴とする請求項21に記載の情報処理装置の制御方法。
    The execution environment division control unit notifies the base software based on predetermined information of the system, the base software updates information held in the base software based on the notification, Reply to the execution environment division control means,
    The execution environment division control unit sets the filter unit,
    The method according to claim 21, wherein the execution environment division control unit notifies the base software that the setting of the filter unit is completed.
  24.  前記実行環境分割制御手段は、一の基盤ソフトウェアから所定の情報を受理した場合、前記情報に基づいて他の基盤ソフトウェアに資源を調整するように依頼し、
     前記他の基盤ソフトウェアは、前記依頼に基づいて資源を調整し、結果を、前記実行環境分割制御手段へと返答し、
     前記実行環境分割制御手段は、受け取った情報に基づき、前記フィルタ手段の設定を行い、前記一の基盤ソフトウェアに前記フィルタ手段の設定が完了したことを通知する、ことを特徴とする請求項21に記載の情報処理装置の制御方法。
    The execution environment division control means, when receiving predetermined information from one base software, requests other base software to adjust resources based on the information,
    The other infrastructure software adjusts resources based on the request, and returns the result to the execution environment partitioning control unit.
    The execution environment division control unit sets the filter unit based on the received information, and notifies the one base software that the setting of the filter unit is completed. A control method of the information processing apparatus described.
  25.  一の前記半導体集積回路の前記実行環境分割制御手段は、システムないし基盤ソフトウェアからの情報を受理した場合、前記実行環境分割制御手段は前記情報に基づいて、他の半導体集積回路の実行環境分割制御手段に資源を調整するように依頼し、
     他の前記半導体集積回路の前記実行環境分割制御手段は、前記依頼に基づいて、半導体集積回路内の実行環境へ資源調整を依頼し、
     資源調整を依頼した実行環境から応答を受理すると、他の前記半導体集積回路の前記実行環境分割制御手段は、前記情報に基づき、前記フィルタ手段の設定を変更し、他の前記半導体集積回路の前記実行環境分割制御手段は、資源調整の完了について、前記一の半導体集積回路の前記実行環境分割制御手段へ返答し、
     前記応答を受けると、前記一の半導体集積回路の前記実行環境分割制御手段は、前記情報に基づき、前記一の半導体集積回路のフィルタ手段の設定を行い、システムないし基盤ソフトウェアへ資源調整が完了したことを通知する、ことを特徴とする請求項15乃至24のいずれか1項に記載の情報処理装置の制御方法。
    When the execution environment division control unit of one of the semiconductor integrated circuits receives information from a system or base software, the execution environment division control unit executes the execution environment division control of another semiconductor integrated circuit based on the information. Ask the means to adjust the resources,
    The execution environment division control unit of the other semiconductor integrated circuit requests resource adjustment to the execution environment in the semiconductor integrated circuit based on the request,
    When the response is received from the execution environment that requested the resource adjustment, the execution environment division control unit of the other semiconductor integrated circuit changes the setting of the filter unit based on the information, and the other of the semiconductor integrated circuits The execution environment division control means responds to completion of resource adjustment to the execution environment division control means of the one semiconductor integrated circuit,
    Upon receiving the response, the execution environment division control unit of the one semiconductor integrated circuit sets the filter unit of the one semiconductor integrated circuit based on the information, and the resource adjustment to the system or the base software is completed. The information processing apparatus control method according to any one of claims 15 to 24, wherein the information is notified.
  26.  一の前記半導体集積回路の実行環境分割制御手段は、システムないし基盤ソフトウェアからの情報を受理すると、前記情報に基づいて、他の半導体集積回路の実行環境分割制御手段にOS(オペレーティングシステム)の実行に必要な情報を通知し、
     前記他の半導体集積回路の実行環境分割制御手段は、前記通知に基づいて、前記他の半導体集積回路のメモリの空き領域について、前記一の半導体集積回路の実行環境分割制御手段からの書き込みが可能となるように、前記他の半導体集積回路のフィルタ手段の設定を変更し、
     前記他の半導体集積回路の実行環境分割制御手段は、前記他の半導体集積回路のメモリの空き領域について、前記一の半導体集積回路の実行環境分割制御手段に返答し、
     前記一の半導体集積回路の実行環境分割制御手段は、OSの実行に必要な情報を、前記一の半導体集積回路のメモリから、前記他の半導体集積回路のメモリの指定された領域へコピーを行い、
     前記一の半導体集積回路の実行環境分割制御手段は、前記他の半導体集積回路の実行環境分割制御手段にOSの実行に必要な情報の転送完了を通知し、前記他の半導体集積回路の実行環境分割制御手段は、実行環境へOSの実行を依頼し、
     実行環境からOSの実行の応答を得ると、前記他の半導体集積回路の実行環境分割制御手段は、前記情報に基づき、前記他の半導体集積回路のフィルタ装置の設定を変更し、前記他の半導体集積回路のOSの実行の完了について、前記一の半導体集積回路の実行環境分割制御手段に返答し、
     前記一の半導体集積回路の実行環境分割制御手段は、前記一の半導体集積回路のフィルタ手段の設定を行い、システムないし基盤ソフトウェアへOSのやりとりが完了したことを通知する、ことを特徴とする請求項15乃至24のいずれか1項に記載の情報処理装置の制御方法。
    When the execution environment division control unit of one of the semiconductor integrated circuits receives information from the system or the base software, the execution environment division control unit of another semiconductor integrated circuit executes an OS (operating system) based on the information. To inform you of the necessary information,
    Based on the notification, the execution environment division control unit of the other semiconductor integrated circuit can write from the execution environment division control unit of the one semiconductor integrated circuit with respect to an empty area of the memory of the other semiconductor integrated circuit. So that the setting of the filter means of the other semiconductor integrated circuit is changed,
    The execution environment division control unit of the other semiconductor integrated circuit responds to the execution environment division control unit of the one semiconductor integrated circuit with respect to an empty area of the memory of the other semiconductor integrated circuit,
    The execution environment division control unit of the one semiconductor integrated circuit copies information necessary for execution of the OS from the memory of the one semiconductor integrated circuit to a specified area of the memory of the other semiconductor integrated circuit. ,
    The execution environment division control unit of the one semiconductor integrated circuit notifies the execution environment division control unit of the other semiconductor integrated circuit of completion of transfer of information necessary for execution of the OS, and the execution environment of the other semiconductor integrated circuit The division control means requests the execution environment to execute the OS,
    When an OS execution response is obtained from the execution environment, the execution environment division control unit of the other semiconductor integrated circuit changes the setting of the filter device of the other semiconductor integrated circuit based on the information, and the other semiconductor integrated circuit Replying to the execution environment division control means of the one semiconductor integrated circuit about completion of execution of the OS of the integrated circuit;
    The execution environment division control unit of the one semiconductor integrated circuit sets the filter unit of the one semiconductor integrated circuit, and notifies the system or the base software that the exchange of the OS is completed. Item 25. The method for controlling the information processing apparatus according to any one of Items 15 to 24.
  27.  複数の演算回路と、
     前記複数の演算回路で実行され、同一の信頼度を有する複数の基盤ソフトウェアと、
     前記演算回路からのアクセスを制限し、前記演算回路同士の分離制御を行うフィルタ手段を有する相互結合網と、
     を備えた情報処理装置において、
     前記複数の基盤ソフトウェアをそれぞれ実行する演算回路とは別の演算回路において、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する実行環境分割制御処理を実行させるプログラム。
    A plurality of arithmetic circuits;
    A plurality of platform software executed by the plurality of arithmetic circuits and having the same reliability;
    An interconnection network having filter means for restricting access from the arithmetic circuit and performing separation control between the arithmetic circuits;
    In an information processing apparatus comprising:
    A program for executing an execution environment division control process for changing an access restriction setting of the filter means of the interconnection network in an arithmetic circuit different from an arithmetic circuit that respectively executes the plurality of base software.
  28.  前記実行環境分割制御処理は、前記基盤ソフトウェアの信頼度よりも高い信頼度を有し、前記基盤ソフトウェアと協調して、前記相互結合網の前記フィルタ手段のアクセス制限の設定を変更する、ことを特徴とする請求項27に記載のプログラム。 The execution environment division control process has a higher reliability than the reliability of the base software, and changes the setting of access restriction of the filter means of the interconnection network in cooperation with the base software. 28. A program according to claim 27, characterized in that:
  29.  プログラム動作可能な演算装置、
     前記演算装置上で実行され前記演算装置を管理する基盤ソフトウェア、
     前記基盤ソフトウェア上で実行されるオペレーティング及びアプリケーション、
     を備えた実行環境を複数組備え、
     前記複数組の実行環境の前記演算装置間を相互接続する相互接続網を備え、
     前記複数組の実行環境の前記演算装置の分離制御を行うフィルタを、前記複数の実行環境に対して共通に、前記相互接続網内に備え、
     前記複数の実行環境の演算装置とは別に設けられ、前記相互接続網に接続される演算装置をさらに備え、
     前記フィルタは、前記別の演算装置で実行される実行環境分割制御手段によって、そのアクセス制限の設定が変更自在とされる、情報処理装置。
    Arithmetic device capable of program operation,
    Infrastructure software that is executed on the computing device and manages the computing device;
    Operating and applications executed on the platform software;
    With multiple sets of execution environments with
    An interconnection network interconnecting the computing devices of the plurality of execution environments;
    A filter that performs separation control of the arithmetic devices of the plurality of execution environments is provided in the interconnection network in common with the plurality of execution environments,
    A computing device provided separately from the computing devices of the plurality of execution environments, further comprising a computing device connected to the interconnection network,
    The filter is an information processing apparatus in which an access environment setting can be freely changed by an execution environment division control unit that is executed by the other arithmetic device.
PCT/JP2009/054643 2008-03-11 2009-03-11 Information processing device and method capable of operating a plurality of basic software programs WO2009113571A1 (en)

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