WO2010015878A3 - Process for joining and separating substrates - Google Patents

Process for joining and separating substrates Download PDF

Info

Publication number
WO2010015878A3
WO2010015878A3 PCT/IB2008/003101 IB2008003101W WO2010015878A3 WO 2010015878 A3 WO2010015878 A3 WO 2010015878A3 IB 2008003101 W IB2008003101 W IB 2008003101W WO 2010015878 A3 WO2010015878 A3 WO 2010015878A3
Authority
WO
WIPO (PCT)
Prior art keywords
support substrate
substrate
face
electromagnetic radiation
bonding
Prior art date
Application number
PCT/IB2008/003101
Other languages
French (fr)
Other versions
WO2010015878A2 (en
Inventor
Bruce Faure
Fabrice Letertre
Jonathan J. Wierer, Jr.
Original Assignee
S.O.I. Tec Silicon On Insulator Technologies
Philips Lumileds Lighting Company Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP08290759.3A external-priority patent/EP2151852B1/en
Priority claimed from EP08290757A external-priority patent/EP2151856A1/en
Application filed by S.O.I. Tec Silicon On Insulator Technologies, Philips Lumileds Lighting Company Llc filed Critical S.O.I. Tec Silicon On Insulator Technologies
Priority to TW098125948A priority Critical patent/TW201029049A/en
Publication of WO2010015878A2 publication Critical patent/WO2010015878A2/en
Publication of WO2010015878A3 publication Critical patent/WO2010015878A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate

Abstract

The invention relates to a process for modifying a substrate (10) comprising: (a) providing an initial substrate (10) having a face (10b) for bonding and an opposing face (10r); (b) providing a support substrate (25); wherein either the bonding face (10b) of the initial substrate (10), and/or a face of the support substrate (25), is provided with an electromagnetic radiation absorbing layer (24), wherein the support substrate (25) is substantially transparent to a wavelength of electromagnetic radiation (c) performing bonding to join the bonding face (10b) of the initial substrate (10) to the support substrate (25) via the electromagnetic radiation absorbing layer (24); (e) carrying out irradiation of the electromagnetic radiation absorbing layer (24) through the substantially transparent support substrate (25) to induce separation of the support substrate (25).
PCT/IB2008/003101 2008-08-06 2008-09-08 Process for modifying a substrate WO2010015878A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW098125948A TW201029049A (en) 2008-08-06 2009-07-31 Process for modifying a substrate

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP08290757.7 2008-08-06
EP08290759.3A EP2151852B1 (en) 2008-08-06 2008-08-06 Relaxation and transfer of strained layers
EP08290757A EP2151856A1 (en) 2008-08-06 2008-08-06 Relaxation of strained layers
EP08290759.3 2008-08-06

Publications (2)

Publication Number Publication Date
WO2010015878A2 WO2010015878A2 (en) 2010-02-11
WO2010015878A3 true WO2010015878A3 (en) 2010-04-15

Family

ID=41546881

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/003101 WO2010015878A2 (en) 2008-08-06 2008-09-08 Process for modifying a substrate

Country Status (2)

Country Link
TW (1) TW201029049A (en)
WO (1) WO2010015878A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8970045B2 (en) 2011-03-31 2015-03-03 Soitec Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices
FR2975222A1 (en) * 2011-05-10 2012-11-16 Soitec Silicon On Insulator PROCESS FOR PRODUCING A SEMICONDUCTOR SUBSTRATE
EP2645431A1 (en) 2012-03-28 2013-10-02 Soltec Manufacture of multijuntion solar cell devices
EP2645430A1 (en) 2012-03-28 2013-10-02 Soitec Manufacture of multijunction solar cell devices
EP2645429A1 (en) 2012-03-28 2013-10-02 Soitec Manufacture of multijunction solar cell devices
EP2645428A1 (en) 2012-03-28 2013-10-02 Soitec Manufacture of multijuntion solar cell devices
TWI499078B (en) * 2013-01-31 2015-09-01 Just Innovation Corp Device substrate, manufacturing method of device substrate, optical apparatus and manufacturing method thereof
CN107750400A (en) * 2015-06-19 2018-03-02 Qmat股份有限公司 Engagement and release layer transfer process
TWI606611B (en) * 2016-08-30 2017-11-21 光磊科技股份有限公司 Substrate with li2nh layer, led with li2nh layer and associated manufacturing method
IL253085B (en) * 2017-06-20 2021-06-30 Elta Systems Ltd Gallium nitride semiconductor structure and process for fabricating thereof
US20210066547A1 (en) * 2019-08-28 2021-03-04 Tslc Corporation Semiconductor Components And Semiconductor Structures And Methods Of Fabrication

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6071795A (en) * 1998-01-23 2000-06-06 The Regents Of The University Of California Separation of thin films from transparent substrates by selective optical processing
EP1017100A1 (en) * 1998-03-02 2000-07-05 Seiko Epson Corporation Three-dimensional device
US6559075B1 (en) * 1996-10-01 2003-05-06 Siemens Aktiengesellschaft Method of separating two layers of material from one another and electronic components produced using this process
US20070134826A1 (en) * 2005-12-09 2007-06-14 Samsung Electro-Mechanics, Co., Ltd. Method of manufacturing vertical nitride light emitting device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6559075B1 (en) * 1996-10-01 2003-05-06 Siemens Aktiengesellschaft Method of separating two layers of material from one another and electronic components produced using this process
US6071795A (en) * 1998-01-23 2000-06-06 The Regents Of The University Of California Separation of thin films from transparent substrates by selective optical processing
EP1017100A1 (en) * 1998-03-02 2000-07-05 Seiko Epson Corporation Three-dimensional device
US20070134826A1 (en) * 2005-12-09 2007-06-14 Samsung Electro-Mechanics, Co., Ltd. Method of manufacturing vertical nitride light emitting device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
SHIMODA T ET AL: "Surface free technology by laser annealing (SUFTLA)", ELECTRON DEVICES MEETING, 1999. IEDM TECHNICAL DIGEST. INTERNATIONAL WASHINGTON, DC, USA 5-8 DEC. 1999, PISCATAWAY, NJ, USA,IEEE, US, 5 December 1999 (1999-12-05), pages 289 - 292, XP010372039, ISBN: 978-0-7803-5410-4 *
XU J ET AL: "Study of the laser lift-off technology of GaN films from sapphire substrates", SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, 2001. PROCEEDINGS. 6TH INTERNATIONAL CONFERENCE ON OCT. 22-25, 2001, PISCATAWAY, NJ, USA,IEEE, vol. 2, 22 October 2001 (2001-10-22), pages 1179 - 1182, XP010576183, ISBN: 978-0-7803-6520-9 *

Also Published As

Publication number Publication date
TW201029049A (en) 2010-08-01
WO2010015878A2 (en) 2010-02-11

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