WO2010057975A2

WO2010057975A2 - Method for estimating a frequency offset in a communication receiver

Info

Publication number: WO2010057975A2
Application number: PCT/EP2009/065552
Authority: WO
Inventors: Dirk Schmitt; Marten Kabutz; Alkis Ikonomu
Original assignee: Thomson Licensing
Priority date: 2008-11-21
Filing date: 2009-11-20
Publication date: 2010-05-27
Also published as: WO2010057975A3

Abstract

For estimating a frequency offset in a communication receiver, the invention proposes to transform a sequence of complex-valued samples from a first receiver stage into a sequence of frequency bins as a frequency domain representation, to scan the frequency bins to find those frequencies where the frequency domain representation is flat, and to modify a down conversion stage of the receiver depending on the found frequencies.

Description

Method for estimating a frequency offset in a communication receiver

Field of the invention

Digital Communication, like DVB-T, DVB-S, DVB-S2, DVB-C, GSM, WLAN, DSL

Background of the invention

In digital communication receivers, at switch-on a strong unknown frequency offset must be estimated and compensated. Three approaches are known from literature:

^■ "Data-aided" frequency offset compensation is based on the assumption that part of the transmission content is predefined and thus can be used as a pilot sequence.

^■ Closed loop compensation. Drawback: Slow convergence.

^■ Parallel open loop search. Drawback: Very costly hardware or complex software for investigating all candidate channel signals in parallel or in series.

A frequency offset compensation with small hardware/software cost thus is desirable.

Digital communication receiver circuits suffer from a frequency offset because of the lack of precision of a local oscillator frequency in the analogue tuner, especially in the tuner synthesizer or in the analogue receiving parts in the analogue domain, like the LNB oscillator. Due to down conversions of the received signal by both an LNB and the tuner, the received signal has some unknown frequency offset. This can be as much at +/- 5 MHz during a cold startup primarily due to the exposure of the outdoor LNB to temperature extremes. In the block diagram of a digital receiver shown in Figure 1, sources of frequency offset are indicated: While the LNB introduces an unknown frequency offset of Δf_LNB, the tuner causes an unknown frequency

O f f set O f Δftuner -

To compensate the unknown frequency offset, several solutions are presented in literature. The known solutions are:

1. ) Some technical papers estimate and compensate frequency offset in the digital domain by using a pilot sequence which is a part of the DVB-S2 standard for example. These methods are called data-aided frequency offset compensation.

2.) Also there are some papers which are solving this problem in digital or analog domain using a closed loop form, like using Costas loop or using a quadricorrelator .

3.) The third solution is the parallel search or open loop search, which is described in C. H. Wu, Frequency Synchronization, Lecture Note CCU EE, 2005.

The described method in the invention is related to the third field of solutions. So the invention algorithm is an open loop search.

Summary of the invention

The invention proposes two estimation methods based on the following steps: ■ Transforming complex (I, Q) samples from the tuner into a frequency domain.

^■ Scanning the frequency bins with a "secant method" that identifies flat portions of the frequency spectrum. ^■ Memorizing the center frequencies around which the spectrum is maximally flat.

^■ Using the memorized frequencies to correct the tuner down mixing, e.g. by controlling a numerically controllable oscillator or NCO.

A third estimation method is based on the following steps:

^■ In a variant of a known "dual filter" detection scheme, incoming (I, Q) samples are time domain filtered in parallel by one complex-valued filter and one delay element, and their output signals are multiplied. This results in a "band edge correlator", because it amounts to a correlation operation, and has a sharp selection effect.

^■ In a subsequent spectrum analyzer step, the spectral maximum is searched.

^■ Steps 1 and 2 are repeated for increasing values of center frequency shift, the global maximum is representative for the frequency offset that needs to be compensated.

The invention solves the problem of large frequency offset compensation using a software hardware interaction. The frequency offset estimation does not need any pilot tone, as needed in the prior art. Also no timing information for the data stream is needed.

As described above the estimation algorithm is an open loop search (method 1 and method 2), where the following steps will be performed:

1) Estimate the incoming spectrum using FFT or Goertzel algorithm with a subsequent averaging process that uses for instance the Bartlett-Welch windowing method. 2) Scan the estimated spectrum using a secant method where the secant window has the size of the channel bandwidth.

3) Detect the minimum peak at the secant detector output and write the index of the peak into the frequency rate register of the NCO.

To prevent locking to an adjacent channel, a digital filter can be inserted before the spectrum analyzer (method 2) . For low symbol rates (fsymbol<4*fsample) , a digital decimator can be inserted before the spectrum analyzer to suppress the noise and the adjacent energy before the spectrum analyzer. For low SNR, a bandedge correlation (method 3) will be inserted before the spectrum analyzer, which gives a peak in the spectrum if the band edges are centered around the zero frequency. This method has the disadvantage that one has to know at least approximately the location of the band edges, but it yields a high noise rejectance which is helpful in very low SNR regions.

Advantages of the invention are a small hardware impact for frequency offset compensation due to hardware and software interaction. Compared to known solutions mentioned above, the following disadvantages are circumvented:

1) No pilot tones and timing recovery are used as it is needed for data aided frequency recovery.

2) In large frequency offset the closed loop solutions are very slow due to narrow loop bandwidth which is needed for a stable loop especially in low SNR modes.

Brief description of the drawings Figure 1 shows a block diagram of a digital receiver indicating sources of frequency offset.

Figure 2 shows a block diagram of the signal processing modules used for frequency offset estimation and compensation according to the invention.

Figure 3 shows the state diagram of the processing steps of the first method.

Figure 4 shows spectrum amplitudes over frequency to illustrate how the absolute slope is calculated between two separated FFT output values.

Figure 5 shows a measured spectral output Y(k) after the detector .

Figure 6 illustrates the hardware reuse process proposed in the invention. Figure 7 shows the interaction between a power spectrum estimation module and a DSP or microprocessor.

Figure 8 illustrates evaluation algorithms. Figure 8 (a) illustrates the Differential sum algorithm. Figure 8 (b) illustrates a reduced differential sum algorithm.

Figure 9 illustrates an evaluation algorithm.

Figure 10 shows the state diagram of the processing steps in the third method.

Figure 11 symbolically illustrates the two tasks for Tl and T2. The top picture of Figure 11 shows how T2 shifts the filters Fl and F2 to the edges of the channel spectrum, while the bottom picture of Figure 11 shows how the mixer Tl has to shift the channel spectrum to the bandegde filter passband. The simple line spectrum is before mixer Tl and the bold dotted line spectrum is the output spectrum of Tl.

Detailed description Figure 2 shows a block diagram of the signal processing modules used for frequency offset estimation and compensation according to the invention. An input signal 201 is multiplied, in a multiplier 202, with a local carrier frequency from a numerically controlled oscillator or NCO 204. The product is forwarded, in parallel, to a bandedge correlator 207, to an anti-alias filter 208, and to a multiplexer or switch Sl 210. The signal processing modules also comprise a frequency estimator 209, whose input can be selected by switch Sl 210 to be either directly the output 213 of the multiplier 202, the output 212 of the anti-alias filter 208, or the output 211 of the bandedge correlator 207. The output of the frequency estimator 209 is forwarded to a microprocessor 206, which in turn controls the frequency of the NCO 204.

As mentioned above, the invention proposes for frequency offset estimation and compensation to use several methods based on the open loop search principle. Three methods will be presented here, which are suited to different problems in the open loop search. The three different methods can be selected by switching the multiplexer Sl 210 in Figure 2.

The first method of estimating the frequency offset is given when the switch Sl 210 is connected to the output of the multiplier 202.

Figure 3 shows the processing steps of the first method of frequency offset estimation. The same processing steps also are comprised in the second method of frequency offset estimation. These processing steps can be implemented in software or in hardware. The first processing step or step 1 301 estimates the average spectrum and is divided into two stages, namely stagel 302 and stage2 303. The first stage 302 consists of a FFT process which estimates the spectrum of the incoming signal for a short time. In the second stage 303, the magnitudes are averaged over several windows using a Bartlett Welch method, to smooth the estimated spectrum. The averaging over several windows is controlled by a loopback control step 304, which branches either back to step 302 or forward to step 307. For the averaging, magnitudes mag of FFT frequency bins x are estimated using the following formula:

mag = max(real(x),imag(x)) + 0.5 *mm(real(x),imag(x)) ,

where real (x) is the real output value of an FFT bin and imag(x) is the imaginary output value of the FFT bin. The smoothing window length can be adjusted by a software register. The method of smoothing the spectra via average process saves hardware impact and enables to trade off spectrum estimation time against the exactness of the spectral resolution in magnitude. The results of the estimated spectrum is then stored in a memory for further processing.

In the second processing step or step 2 307, the frequency offset is estimated by scanning the spectrum using a secant method, where the absolute slope, i.e. the amplitude difference, between two indexed FFT output values is calculated.

Figure 4 shows spectrum amplitudes over frequency to illustrate the input output behavior of the secant method used for scanning the spectrum. The top part of Figure 4 shows a simplified channel spectrum 401 and several double arrows symbolizing pairs of values from the spectrum, spaced apart in frequency by the secant length, between which the absolute slope will be evaluated. The bottom part of Figure 4 shows, over frequency f, the absolute slope 402 as measured when the pairs of values scan the entire spectrum. Note that the secant length must be chosen according to the channel bandwidth, in order to get a single pronounced minimum. So the baud rate has to be known a priori. The secant length must then be chosen as

Secant_width =Baud_rate [MHz]

For a channel spectrum having a raised cosine shape, the minimum absolute slope occurs on the top of the scanned spectrum.

In the third processing step or step 3 308, the output of step 2 307, corresponding to the absolute slope 402, is scanned to locate the carrier frequency which is indexed by the least bin value. In the fourth processing step or step 4 309, the minimum absolute slope and its index in the spectrum are then written into a software register. To control the estimation range, a start bin and an end bin in the estimated spectrum can be given by software registers. After the minimum index is found, the frequency offset can be easily compensated by adjusting 205 an NCO 204 of a digital down conversion mixer.

The second method differs from the first method in that a digital filter and if needed a decimator are used in front of the estimation process to prevent false locking onto adjacent channels. This method is active when the switch Sl 210 is in its middle position, so that the output of the anti-alias filter 208 is selected as input for the frequency estimator 209. The second method is suited if more than one channel is populated in the tuner output spectrum. The second method has the same state diagram (Figure 3) as method 1. The second method only includes a prefilter in front of the frequency estimator as shown in Figure 2. The third method is suited for low SNR modes where the noise floor is just slightly below the signal spectrum. The third method employs a modified dual filter method for channel estimation. In the dual filter method for channel detection, as known from several papers and books, two digital filters are centered on the negative and positive bandedge and their absolute outputs are fed in negative and positive sense to an adder. If the filters are correctly centered on the bandedges, the output energy of the two filters is equal, so that the output of the adder tends to be zero, which is then interpreted to indicate that the frequency offset is locked. The known dual filter method has the disadvantage that two complex-valued and implementationally complex digital filters are needed.

Figure 6 illustrates the hardware reuse process proposed in the invention. The hardware has a coarse tracking loop Tl 601, and a fine tracking loop T2 603. The output of the fine tracking loop 603 corresponding to the upper channel bandedge X (omega+omegaO) is forwarded to an anti-alias filter 604, whereas the output of the fine tracking loop 603 corresponding to the lower channel bandedge X (omega-omegaO) is forwarded to a delay element 605. The output 611 of the anti-alias filter 604 and the conjugate complex of the output 610 of the delay element 605 are multiplied in multiplier 606, to yield correlated IQ values 609.

The third method of the present invention uses a modification of the dual filter detector, which is equivalent to a correlation algorithm. For it, one complex digital filter Fl is centered on the estimated bandedge, whereas a simple delay element is used as the second filter F2. The results of both filters are then multiplied with a complex multiplier using the following formula : y(t) = x_l(t)*x₂*(t)_r

where xl denotes the first digital filter output 611 and x2* denotes the conjugate complex of the output 610 of the delay element 605. As the operation of taking the complex conjugate corresponds to a reversed spectrum, the output y(t) of the multiplication exhibits a peak at the upper bandedge . Figure 5 shows a measured spectral output Y(k) after the detector. This detection approach exploits the special property of the Fourier transform, that for a time signal x(t) having a transform X(k), the conjugate complex of the time signal will have the inverted spectrum according to:

x* (t) <-> X* (-k) ,

where x(t) denotes the time domain value and X(-k) is the related value in the spectrum.

Figure 10 shows the state diagram of the processing steps in the third method. In a first step 1001 the bandwidth of the bandedge correlator is setup using the block T2 of Figure 6. This step fulfills the above mentioned requirement that both edges are centered around the two edge filter if no frequency offset is included. In a second step 1002, the frequency offset is set up using the block Tl. With this step the whole algorithm is able to shift the spectrum to a location where both bandedges are centered on the filter's passband.

Figure 11 illustrates the two tasks for Tl and T2. T2 is used to adjust the bandwidth of the current channel, while Tl is used to remove the carrier offset of the channel by shifting the total spectrum towards negative or positive frequencies. The top picture of Figure 11 shows how T2 shifts the filters Fl and F2 to the edges of the channel spectrum, while the bottom picture of Figure 11 shows how the mixer Tl has to shift the channel spectrum to the bandedge filter passband. The single continuous line denotes the spectrum before mixer Tl and the bold dotted line denotes the spectrum at the output of Tl.

Now going back to Figure 10, in a third step 1003, the bandedge correlator output 609 is then fed to the spectrum analyzer 607. Same as in the first two methods, the spectrum analyzer consists of two stages 1004, 1005, and yields the estimated spectrum. The last step or step 4 1007 compares the current maximum value in the spectrum with a previously stored value. If the maximum value is greater than the stored value, step 4 overwrites the stored value with the maximum value of the spectrum, and keeps the number of moving steps of block Tl Before the state machine enters step 1, the stored value is set to 0. At the end of step 4, the state machine goes back to step 2 where the spectrum is shifted using the block Tl by a small frequency offset. The procedure is repeated until the frequency shift of Tl reaches a certain value controlled by microcontroller registers.

In this method the frequency of the maximum magnitude indicates the exact location of the frequency offset, which can be fed to a digital derotator as described in step 4 of method 1.

In the following, it is described how to modify an existing hardware of a typical digital demodulation logic, to add the method 3.

Normally a digital demodulator uses an anti-alias filter AA 604 to suppress adjacent channels before the decimation to the symbol rate is done by a digital decimator. Also a coarse and fine frequency tracking loop is used, where the coarse tracking loop Tl removes the coarse frequency offset before the anti- alias filter, and the fine tracking loop T2 tracks to the remaining frequency and phase offset after the decimation process. To save hardware, these modules will be reused in the frequency offset estimation step.

For this hardware saving, the coarse tracking loop is used by the frequency estimation process to shift the scanned frequency spectrum during the process steps; and the second tracking loop T2 is used to shift the center frequency of the upper and lower bandedge to the zero frequency by mixing with the positive and negative half symbol rate plus half bandedge bandwidth. Afterwards, the shifted upper bandedge is fed to the anti-alias filter AA while the shifted lower bandedge is fed to the delay line DEL which compensates the group delay of the AA. The output of the delay line DEL and the anti-alias filter AA is then correlated with the above described method. After the algorithm has found the maximum peak in the spectrum during the step process the coarse tracking loop has to be loaded with the related frequency offset during that peak. Figure 6 shows the schematic of this hardware reuse process. Keep in mind that only the delay line and the complex multiplier for the detector have to be added to the current hardware.

The principle of the invention is applicable to any frequency offset compensation problems in any digital communication IC.

Advantage : ■ Does not rely on specific data sequences.

^■ No big hardware/software effort.

^■ Some existing tuner hardware blocks which are idle in setup mode can be (ab)used for implementing the method. Figure 7 shows the interaction between a power spectrum estimation module 701 and a DSP or microprocessor 704. To search for the frequency offset using the power spectrum estimation results, the DSP or microcontroller 704 can assist to get more flexibility in searching the frequency offset value. For this the microcontroller or DSP 704 requests 702 a new power density spectrum from the power spectrum estimation unit 701, and the power spectrum estimation unit 701 sends a callback 705 to the microcontroller or DSP 704 using an interrupt line or a mailbox signal .

In the microcontroller or DSP, the following frequency offset estimation algorithms can be used:

REMARK: For the following description, a frequency indexing scheme symmetric around 0 for the DC bin is assumed.

k=0 (DC bin) k=M/2 is related to f=(Fs/2), while k=(-M/2+l ) is related to (-

Fs/2), where Fs denotes the sampling frequency and M denotes the

FFT length So the distance between two bins in frequency domain is

(frequency resolution) df=l/M*Fs and ke [(-M/2 + 1) : M12]

Figure 8 (a) illustrates the Differential sum algorithm. The differential sum algorithm calculates the difference between the upper bandedge and the lower bandedge for varying bandwidths using the following formula: diff _ sum(l) = ∑ \x(l - HB - BE + n) - x(l + HB + BE - n)\ ,

where x denotes the FFT bins symmetric around the DC bin at f=0; BE denotes the width of the bandedge in fft bins; HB denotes the half baud rate in FFT bins; n is the index for the summation and 1 denotes the position of the sliding window. The starting point for the sliding window is on the right half of the power spectrum, i.e. at I=L, so that the number of sliding windows can be adjusted with l≡[-L: L] . That means that L allows to choose the search region for the frequency offset. It is not necessary to set the N to the exact bandedge width BW.

From the calculated differences, the location of the minimum frequency offset is then found by

mm_ freq = min (diff _sum(l)) ( 1 )

and is stored as symbolized in block 803.

Figure 8 (b) illustrates a reduced differential sum algorithm. Alternatively to the differential sum algorithm of Figure 8 (a) , a reduced differential sum algorithm can be used, which uses the triangular inequality to simplify the above formula to

diff _ sum _ red (I) = ∑ \x(l - HB - BE + n) - x(l + HB + BE - n)\

N diff _ sum _ red (I) = ∑\x(l - HB - BE + n)\ - ∑\x(l + HB + BE - n)\ ( 2 : diff _sum _ red(l) = \Wl(l) - W2(l)\

Note that in this case where sgn(x)=l the inequality becomes a equality transformation! In the following, Wl denotes the left hand side sliding window, and W2 denotes the right hand side sliding window in the estimated power spectrum.

This transformation seems to be have the same complexity as the previous one but if one uses the calculation of the sliding windows in recursive manner then the computational complexity will shrink dramatically for the sliding window: One has to compute only the first sliding window using the formula for the left and right hand side sliding window:

N

W2(-L) = ∑\x(-L+HB+BE-n)\ κ=0

and to store them. The subsequent windows are calculated as follows

Wl(I) = Wl(I-1)-x((l-1)+HB-BE)+x(l-HB) Wl(I) = Wl(I-I)-X(I-I-BE)+x(l)

So in the following steps only 2 additions are needed instead of N for each differential sum.

The diff_sum_red and the final estimated frequency offset is then calculated in the same manner as it is given in (2) and (1)

This sequence of spectrum estimation and frequency offset search can be repeated to get a better reliability of the frequency estimation .

Claims

Cl aims :

1) Method for estimating a frequency offset in a communication receiver, comprising: - transforming (302) a sequence of complex-valued samples from a first receiver stage into a sequence of frequency bins as a frequency domain representation,

- scanning (307) the frequency bins to find those frequencies where the frequency domain representation is flat, - modifying (205, 309) a down conversion stage of the receiver depending on the found frequencies.

2) Method for estimating a frequency offset in a communication receiver, comprising: - filtering (604) a sequence of complex-valued samples from a first receiver stage with a complex-valued filter into a first output sequence (611),

- delaying (605) the sequence of complex-valued samples into a second output sequence (610), - deriving samples of a detector sequence (609) as products

(606) of the corresponding samples of the first output sequence and a conjugate complex of the corresponding samples of the second output sequence,

- transforming (607) the detector sequence into a frequency domain representation,

- scanning the frequency domain representation to find a maximum magnitude and its frequency,

- modifying (205) a down conversion stage (204) of the receiver depending on the found frequency.