WO2010139860A1 - Light emitting semiconductor device and method for manufacturing - Google Patents
Light emitting semiconductor device and method for manufacturing Download PDFInfo
- Publication number
- WO2010139860A1 WO2010139860A1 PCT/FI2010/050454 FI2010050454W WO2010139860A1 WO 2010139860 A1 WO2010139860 A1 WO 2010139860A1 FI 2010050454 W FI2010050454 W FI 2010050454W WO 2010139860 A1 WO2010139860 A1 WO 2010139860A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- tco
- contact
- type semiconductor
- contact layer
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
- H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Definitions
- the present invention relates generally to light emitting semiconductor structures made of nitrides of group III metals. More precisely, the invention relates to reflective contacts used e.g. in vertical geometry Light Emitting Diodes (LEDs) , and manu- facturing thereof.
- LEDs Light Emitting Diodes
- Light emitting semiconductor devices like LEDs have a continuously growing role in different fields of everyday life. They have a great variety of applications e.g. in telecommunications, lighting, and display technology.
- a layer structure comprising an retype semiconductor layer, an active region, and a p- type semiconductor layer is formed on a growth substrate of e.g. sapphire.
- a reflective contact structure is formed on top of the structure to provide electrical connection to the p-type semiconductor layer and to act as a mirror reflecting the incident light generated in the active region backwards.
- a relatively thick metal layer is then deposited on the reflective contact structure to form the p-side contact electrode of the chip.
- the thick metal layer can also act as a support structure of the completed led chip.
- the growth support is removed, exposing the surface of the n-type layer originally grown on the growth substrate.
- another thick metal layer is formed on this exposed surface to form the the reside contact electrode.
- the reflective contact structure In addition to the desired high reflectance and low electrical re- sistivity, the reflective contact structure itself should also remain stable throughout the component life-cycle and, on the other hand, provide good adhesion between the metal layer forming the p-side electrode and the actual operational device layers.
- Con- ventional solutions include e.g. different metallic combinations like one or more layers of aluminum or gold deposited directly on the p-type semiconductor layer or on an intermediate adhesion layer first formed on the semiconductor surface. In the first case, both adhesion strength and long-term stability of the structure are usually insufficient.
- An intermediate adhesion layer comprising e.g. nickel can en- hance the adhesion. On the other hand, it increases optical losses through light absorption in the adhesion layer.
- the purpose of the present invention is to provide a novel light emitting semiconductor structure comprising a stable reflective contact structure with excellent mechanical, optical, and electrical proper- ties.
- the light emitting semiconductor device and the method for manufacturing a light emitting semicon- ductor device of the present invention are characterized by what is presented in claims 1 and 8, correspondingly.
- the light emitting semiconductor device is made of nitrides of group III metals.
- One suitable material is gallium nitride GaN and its different variations like indium gallium nitride InGaN and aluminum gallium nitride Al- GaN. Being made of said materials means that at least the operationally essential portions of the device comprise at least some of said materials. Naturally, the device can comprise, in different portions thereof, also materials not falling within said definition.
- the device comprises a layer structure comprising an n-type semiconductor layer, a p-type semiconductor layer, and an active region for light generation between the n-type semiconductor layer and the p-type semiconductor layer.
- the layer structure has a contact surface defined by one of the n-type and p-type semiconductor layers, and a reflective contact structure attached to this contact surface.
- the reflective contact structure provides an electrical contact to the semiconductor layer defining the contact surface, and also acts as a mirror reflecting the incident light from the active region .
- the reflective contact structure comprises a first transparent conductive oxide (TCO) contact layer with a poly- crystalline structure attached to the contact surface of the layer structure, a second transparent conductive oxide contact layer having an amorphous structure, and a metallic reflective layer attached to the second TCO layer.
- TCO transparent conductive oxide
- Said structure of the reflective metal contact utilizing a two-layer intermediate TCO structure between the metallic reflective layer and the contact surface provides great advantages over the prior art solutions.
- Each of the two TCO layers has its own pur- pose.
- the polycrystalline material structure of the first TCO layer provides high optical transparency and low electrical resistivity.
- the second TCO layer of amorphous structure for its turn, enables a strong adhesion to the metallic reflective layer.
- the accurate chemical compositions of the two layers can be optimized separately according to their different purposes.
- the chemical composition of the first TCO contact layer is selected to promote strong adhesion to the contact surface of the layer structure, good transparency, and high electrical conductivity of the first TCO contact layer
- the chemi- cal composition of the second TCO contact layer is selected to promote strong adhesion of the metallic reflective layer to the second TCO contact layer.
- the properties of the two TCO layers are optimized separately according to their different purposes.
- the second TCO contact layer can lie in di- rect contact with the first TCO contact layer. However, it is also possible to have some intermediate layer (s) between the two TCO contact layers.
- the layer defining the contact surface comprises preferably p-type indium gallium nitride InGaN.
- the first TCO contact layer for its part, comprises preferably indium tin oxide which due to the presence of indium can provide an excellent adhesion to metals of group III metals.
- the first TCO contact layer has preferably a thickness of 30 - 500 nm, more preferably 100 - 150 nm. A too low thickness would re- suit in inadequate electrical characteristics of the layer. On the other hand, thickening this layer too much would increase disadvantageously the unwanted absorption of the light generated in the active region.
- the second TCO contact layer comprises aluminum zinc oxide (AZO) and the metallic reflective layer comprises aluminum deposited on the second TCO contact layer.
- AZO aluminum zinc oxide
- the metallic reflective layer comprises aluminum deposited on the second TCO contact layer.
- the thickness of the second TCO contact layer Due to the lower optical transparency and electrical conductivity of the amorphous TCO in com- parison to the polycrystalline TCO, the thickness of the second TCO contact layer has to be limited. On the other hand, too low thickness could further decrease the electrical conductivity and possibly also the adhesion to the above metallic reflective layer.
- a preferable thickness range is 0.2 - 20 nm, more preferably 1 - 3 nm.
- the metallic reflective layer can have a thickness of e.g. 20 - 1000 nm, however preferably at least 200 nm to ensure that no light is penetrated through the layer and thus to maximize the reflectivity of the reflective contact structure.
- an anti-oxidation layer formed of e.g.
- the method of the present invention for manufacturing a light emitting semiconductor structure made of nitrides of group III metals comprises fabricating a layer structure comprising an n-type semiconductor layer, a p-type semiconductor layer, and an ac- tive region between the n-type semiconductor layer and the p-type semiconductor layer, the layer structure having a contact surface defined by one of the n-type and p-type semiconductor layers.
- the layer structure can be fabricated e.g. by normal vapor phase epitaxial processes commonly used and well known in the LED industry. Thus, no detailed description of the fabrication processes is needed here.
- the method comprises further forming a reflective contact structure on the contact surface.
- forming the reflective contact structure comprises the steps of forming a first transparent conductive oxide (TCO) contact layer, having a polycrystalline structure, on the contact surface of the layer structure, forming a second transparent conductive oxide (TCO) contact layer having an amorphous structure, and forming a metallic reflective layer on the second TCO layer.
- TCO contact layers can be deposited e.g. by sputtering. As-deposited TCO is amorphous.
- the first TCO contact layer has to be annealed to change the phase, i.e. to crystallize the originally amor- phous layer.
- Suitable temperature range for the annealing depending, for example, on the accurate material composition can be e.g. 150 - 300°C.
- the second TCO contact layer can be deposited directly on the first TCO contact layer or on some intermediate layer (s) first deposited on the first TCO contact layer .
- the chemical composition of the first TCO contact layer is selected to promote strong adhesion to the contact surface of the layer structure, good transparency, and high electrical conductivity of the first TCO contact layer
- the chemical composition of the second TCO contact layer is selected to promote strong adhesion of the metallic reflective layer to the second TCO contact layer.
- the properties of the two TCO layers are optimized separately according to their different functions. How said material composition selections are made in practice in order to achieve said proper- ties depends, for example, on the materials of the semiconductor layer structure. However, it is routine engineering for a person skilled in the art.
- the layer defining the contact surface comprises preferably p-type indium gallium nitride InGaN.
- One preferable material for the first TCO contact layers comprises indium tin oxide.
- the first TCO contact layer is preferably fabricated to have a thickness of 30 - 500 nm, more preferably of 100 - 150 nm.
- the second TCO contact layer comprises aluminum zinc oxide, and the step of forming the metallic reflective layer com- prises depositing aluminum on the second TCO contact layer .
- the second TCO contact layer is preferably fabricated to have a thickness of 0.2 - 20 nm, more preferably of 1 - 3 nm.
- the metallic reflective layer is preferably fabricated to have a thickness of 20 -
- the entire manufacturing process of the structures providing the electrical contact to the semiconductor layer defining the contact surface can also include depositing many further layers.
- an anti-oxidation layer of e.g. gold and having a thickness of e.g. 1 - 20, preferably 5 - 10 nm can be deposited on the surface of the metallic reflective layer.
- an adhesion layer of e.g. titanium can be formed on the anti- oxidation layer to enhance adhesion of the following layers to the reflective contact structure.
- a diffusion barrier layer can then be deposited to protect the metallic reflective layer from diffusion of possibly aggressive metal of a bonding pad finally defining the surface electrode of the component.
- a thick layer of solderable metal to form said bonding pad can be deposited by e.g. galvanic deposition.
- suitable solderable metals include Au, Au/In alloy, and Cu.
- the process can also include different patterning steps by e.g. lithography to achieve the desired device geometry.
- the manufacturing process of the light emitting device as a whole e.g. in the case of a vertical geometry Light Emitting Diode LED, can necessitate also many further steps. Examples of these are removing the growth substrate by e.g. chemi- cal etching, and forming electrical contact structures also to this way exposed opposite side of the semiconductor device.
- the manufacturing process according to the present invention is suitable for cost-effective mass production of light emitting devices in which up to several tens of wafers can be processed simultaneously.
- Figure 1 presents a schematic overview of a vertical LED in accordance of the present inven- tion
- Figures 2a - 2f illustrate a manufacturing method according to the present invention.
- the corresponding layers are denoted by the same reference numbers. The drawings are not in scale.
- the vertical LED chip 1 of figure 1 is based on a heterostructure comprising an electron emitter layer 2 made of n-doped GaN, a hole emitter layer 3 made of p-doped InGaN, and an active region 4 for light generation between these two layers.
- a reflective contact structure 6 Below the hole emitter is a reflective contact structure 6.
- an anti-oxidation layer 7 As the next layer downwards is an anti-oxidation layer 7 to protect the reflective contact structure from oxidation during the rest of the manufacturing process after depositing the reflective contact structure.
- the anti-oxidation layer is formed of Au and has a thickness of about 5 nm.
- An adhesion layer 8 formed of Ti lies below the anti-oxidation layer to form a strong adhesion between the layers above and below it.
- the undermost layer in the chip of Figure 1 is a bottom metal layer 9 separated from the rest of the device by a diffusion barrier layer 10 formed of e.g. Ni, protecting the upper device layers from diffusion of metal atoms of the bottom metal layer.
- the bottom metal layer serves as a p-side electrode providing one of the two electrical connections needed to electrically connect the LED chip to an external power supply. It also provides an efficient route to transfer the excess heat out of the chip. Besides, it also acts as a protective and mechanical support structure of the chip. Via the bottom metal layer, the chip can be attached to an electrically and heat conducting pad on a circuit board or the like e.g. by soldering.
- the bottom metal layer can be formed of e.g. Au, Au/In alloy, Cu or some other solderable metal and have a thickness in the range of 2 - 200 ⁇ m.
- the surface of the n-doped GaN layer 2 on the upper side of the chip of Figure 1 is structured to have an uneven surface topology.
- the roughened surface decreases the total internal reflection of the light 11 from the active region 4 at the device surface, thus enhancing the light extraction from the chip.
- a net-shaped top metal layer 12 On top of this uneven surface is a net-shaped top metal layer 12 forming the other contact electrode of the chip .
- the reflective contact structure 6 of the present example includes three sublayers.
- a first transparent conductive oxide (TCO) layer 13 formed of polycrystalline indium tin oxide and having a thick- ness in a range of 100 - 150 nm.
- a second transparent conductive oxide layer 14 formed of amorphous aluminum zinc oxide and having a thickness in a range of 1 - 3 nm.
- a mirror layer 15 formed of aluminum and having a thickness of at least 200 nm.
- the reflective contact structure 6 as a whole has two main purposes. First, it provides an electrical connection from the bottom metal layer 9 to the hole emitter layer 3. Secondly, it acts as a mirror reflecting the downwards-directed light 16 from the active region 4 backwards, thus re-directing it to a direction increasing its probability to escape from the chip.
- each of the sub-layers has its own specific purpose as a por- tion of the reflective contact structure.
- the metallic mirror layer 15 is responsible for the actual reflection performance of the reflective contact structure.
- the thickness of the mirror layer is selected high enough to ensure that substantially no light can be penetrated through the layer to the next layers with a higher absorbance.
- Main purpose of the TCO layers is to provide a strong adhesion between the mirror layer 15 and the hole emitter layer 3.
- the first transparent conductive oxide layer 13 formed of indium tin oxide provides a strong adhesion of the reflective contact structure to the indium-containing hole emitter layer 3.
- Polycrystalline structure thereof provides good optical transparency, minimizing the effect of the layer to the device optical perform- ance .
- Polycrystalline structure of the layer also provides high electrical conductivity which, together with the relatively high layer thickness, ensures efficient current spreading over the entire area of the reflective contact structure and a good specific con- tact resistivity to the hole emitter layer 3.
- the second transparent conductive oxide layer 14 of amorphous aluminum zinc oxide instead, provides a strong adhesion between the first TCO layer 13 and the mirror layer 15 made of aluminum. Due to the lower optical transparency and electrical conductivity of the amorphous material structure, the layer thickness is lim- ited to a value substantially lower than that of the first TCO layer.
- the exemplary manufacturing method starts by growing, on an insulating sub- strate wafer 17, a semiconductor heterostructure comprising an active region 4 sandwiched between an electron emitter layer 2 and a hole emitter layer 3.
- mask metal 18 is deposited on the heterostructure and patterned by photolithography according to the desired chip size and geometry.
- the heterostructure is then etched by reactive ion etching through the openings in the mask metal layer to form separate mesa-like layer stacks 19 as shown in Figure 2b.
- the mask metal is removed after etching.
- a first transparent conductive oxide layer 13 is deposited on the wafer e.g.
- TCO layer 14 of amorphous struc- ture, a reflective metal layer 15, and a metallic anti-oxidation layer 7 are deposited on top of each other and patterned by photolithography to remove the deposited material outside the mesas.
- a dielectric passivation layer 20 is depos- ited and patterned by photolithography to protect the mesa sidewalls from deposited material during the following process steps. In addition, the passivation layer also decreases leakage currents via the side- walls.
- the trenches between the mesas can be protected by depositing and hard-baking resist 21 therein.
- An adhesion layer 8 and a diffusion barrier layer 10, both formed of metal, are next deposited and patterned on top of the mesas. After this, a thick metal layer 9 is deposited by electroplating on top of the wafer. As illustrated in Figure 2d, the metal deposits as a continuous film over the entire wafer. This metal layer forms a support structure enabling the next step, namely removal of the original growth substrate 17, after which the mesa-like layer structures lie on the thick metal layer 9 as shown in Fig- ure 2e.
- the exposed surface of the electron emitter layer 2 is roughened.
- the n-side electrodes of the chips are formed as a metallic net on the roughened electron emitter surface. Finally, the mesas are separated to single LED chips 1 as shown in Figure 2f.
- etching the heterostructure to form the separate mesa-like layer stacks could be as well performed as a final step after the n-side electrode formation.
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010800247358A CN102460743A (en) | 2009-06-05 | 2010-06-03 | Light emitting semiconductor device and method for manufacturing |
JP2012513647A JP2012529170A (en) | 2009-06-05 | 2010-06-03 | Light emitting semiconductor device and manufacturing method |
EP10783033A EP2438628A1 (en) | 2009-06-05 | 2010-06-03 | Light emitting semiconductor device and method for manufacturing |
US13/376,279 US20120104413A1 (en) | 2009-06-29 | 2010-06-03 | Light emitting semiconductor device and method for manufacturing |
RU2011144445/28A RU2011144445A (en) | 2009-06-05 | 2010-06-03 | LIGHT-RADIATING SEMICONDUCTOR DEVICE AND METHOD FOR ITS MANUFACTURE |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI20095627 | 2009-06-05 | ||
FI20095627A FI122622B (en) | 2009-06-05 | 2009-06-05 | Light-emitting semiconductor device and method of manufacture |
Publications (1)
Publication Number | Publication Date |
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WO2010139860A1 true WO2010139860A1 (en) | 2010-12-09 |
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Family Applications (1)
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PCT/FI2010/050454 WO2010139860A1 (en) | 2009-06-05 | 2010-06-03 | Light emitting semiconductor device and method for manufacturing |
Country Status (8)
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EP (1) | EP2438628A1 (en) |
JP (1) | JP2012529170A (en) |
KR (1) | KR20120030430A (en) |
CN (1) | CN102460743A (en) |
FI (1) | FI122622B (en) |
RU (1) | RU2011144445A (en) |
TW (1) | TW201110419A (en) |
WO (1) | WO2010139860A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102637790A (en) * | 2012-05-03 | 2012-08-15 | 杭州士兰明芯科技有限公司 | LED (light emitting diode) chip and corresponding manufacturing method thereof |
RU2530487C1 (en) * | 2013-06-04 | 2014-10-10 | Федеральное государственное бюджетное учреждение науки "Научно-технологический центр микроэлектроники и субмикронных гетероструктур Российской академии наук" | Method of producing nitride light-emitting diode |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103117343B (en) * | 2013-02-05 | 2016-06-15 | 海迪科(南通)光电科技有限公司 | LED with mirror structure and preparation method thereof |
CN105280666A (en) * | 2015-11-18 | 2016-01-27 | 海迪科(南通)光电科技有限公司 | An integrated array type automobile headlamp LED chip |
CN105280777B (en) * | 2015-11-25 | 2018-03-13 | 湘能华磊光电股份有限公司 | LED chip and preparation method |
US11600656B2 (en) * | 2020-12-14 | 2023-03-07 | Lumileds Llc | Light emitting diode device |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6469324B1 (en) * | 1999-05-25 | 2002-10-22 | Tien Yang Wang | Semiconductor light-emitting device and method for manufacturing the same |
US20060046460A1 (en) * | 2004-08-30 | 2006-03-02 | Fang-An Shu | Method of fabricating poly-crystal ito film and polycrystal ito electrode |
US20070018184A1 (en) * | 2005-07-20 | 2007-01-25 | Goldeneye, Inc. | Light emitting diodes with high light extraction and high reflectivity |
WO2007027035A1 (en) * | 2005-08-30 | 2007-03-08 | Lg Innotek Co., Ltd | Nitride semiconductor light-emitting device and manufacturing method thereof |
GB2447091A (en) * | 2007-03-02 | 2008-09-03 | James Stuart Mckenzie | Vertical LED |
US20090072233A1 (en) * | 2006-03-17 | 2009-03-19 | Canon Kabushiki Kaisha | Light-emitting device using oxide semiconductor thin-film transistor and image display apparatus using the same |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7863630B2 (en) * | 2005-07-05 | 2011-01-04 | Showa Denko K.K. | Light-emitting diode and method for fabrication thereof |
-
2009
- 2009-06-05 FI FI20095627A patent/FI122622B/en not_active IP Right Cessation
-
2010
- 2010-06-03 TW TW099117868A patent/TW201110419A/en unknown
- 2010-06-03 CN CN2010800247358A patent/CN102460743A/en active Pending
- 2010-06-03 JP JP2012513647A patent/JP2012529170A/en active Pending
- 2010-06-03 RU RU2011144445/28A patent/RU2011144445A/en not_active Application Discontinuation
- 2010-06-03 EP EP10783033A patent/EP2438628A1/en not_active Withdrawn
- 2010-06-03 KR KR1020117030326A patent/KR20120030430A/en not_active Application Discontinuation
- 2010-06-03 WO PCT/FI2010/050454 patent/WO2010139860A1/en active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6469324B1 (en) * | 1999-05-25 | 2002-10-22 | Tien Yang Wang | Semiconductor light-emitting device and method for manufacturing the same |
US20060046460A1 (en) * | 2004-08-30 | 2006-03-02 | Fang-An Shu | Method of fabricating poly-crystal ito film and polycrystal ito electrode |
US20070018184A1 (en) * | 2005-07-20 | 2007-01-25 | Goldeneye, Inc. | Light emitting diodes with high light extraction and high reflectivity |
WO2007027035A1 (en) * | 2005-08-30 | 2007-03-08 | Lg Innotek Co., Ltd | Nitride semiconductor light-emitting device and manufacturing method thereof |
US20090072233A1 (en) * | 2006-03-17 | 2009-03-19 | Canon Kabushiki Kaisha | Light-emitting device using oxide semiconductor thin-film transistor and image display apparatus using the same |
GB2447091A (en) * | 2007-03-02 | 2008-09-03 | James Stuart Mckenzie | Vertical LED |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102637790A (en) * | 2012-05-03 | 2012-08-15 | 杭州士兰明芯科技有限公司 | LED (light emitting diode) chip and corresponding manufacturing method thereof |
RU2530487C1 (en) * | 2013-06-04 | 2014-10-10 | Федеральное государственное бюджетное учреждение науки "Научно-технологический центр микроэлектроники и субмикронных гетероструктур Российской академии наук" | Method of producing nitride light-emitting diode |
Also Published As
Publication number | Publication date |
---|---|
CN102460743A (en) | 2012-05-16 |
EP2438628A1 (en) | 2012-04-11 |
RU2011144445A (en) | 2013-07-20 |
TW201110419A (en) | 2011-03-16 |
JP2012529170A (en) | 2012-11-15 |
FI122622B (en) | 2012-04-30 |
FI20095627A0 (en) | 2009-06-05 |
KR20120030430A (en) | 2012-03-28 |
FI20095627A (en) | 2010-12-06 |
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