WO2010147141A1 - 成膜方法、前処理装置及び処理システム - Google Patents
成膜方法、前処理装置及び処理システム Download PDFInfo
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- WO2010147141A1 WO2010147141A1 PCT/JP2010/060191 JP2010060191W WO2010147141A1 WO 2010147141 A1 WO2010147141 A1 WO 2010147141A1 JP 2010060191 W JP2010060191 W JP 2010060191W WO 2010147141 A1 WO2010147141 A1 WO 2010147141A1
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/32051—Deposition of metallic or metal-silicide layers
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
Definitions
- the present invention relates to a technique for forming a thin film containing Mn in an insulating film made of a low-k film having a recess formed on the surface of an object to be processed such as a semiconductor wafer.
- a semiconductor device is repeatedly subjected to various processes such as a film forming process and a pattern etching process to manufacture a desired device.
- the line width and hole diameter are becoming increasingly finer than requested.
- copper which has a very low electric resistance and is inexpensive because it is necessary to reduce the electric resistance by miniaturizing various dimensions.
- tantalum metal (Ta), tantalum nitride film (TaN) or the like is generally used as the barrier in consideration of the diffusion barrier property of copper to the lower layer. Used as a layer.
- a thin seed film made of a copper film is formed on the entire wafer surface including the entire wall surface in the recess, and then the copper is formed on the entire wafer surface.
- the inside of the recess is completely embedded.
- an excessive copper thin film on the wafer surface is removed by polishing by CMP (Chemical Chemical Mechanical) processing or the like.
- FIG. 13 is a view showing a conventional embedding process of a recess of a semiconductor wafer.
- the surface of the insulating layer 1 formed on the semiconductor wafer W such as an interlayer insulating film made of, for example, a SiO2 film, is formed with via holes, through holes, or trenches (trench) by a single-damascene structure, a dual-damascene structure, a three-dimensional mounting structure, or the like.
- a lower wiring layer 3 made of copper, for example is formed in an exposed state at the bottom of the recess 2.
- the recess 2 is composed of a groove (trench) 2A having an elongated cross section and a hole 2B formed in a part of the bottom of the groove 2A.
- the hole 2B is a via hole or a through hole. It becomes.
- the wiring layer 3 is exposed at the bottom of the hole 2B, and is electrically connected to a lower wiring layer and an element such as a transistor. Note that illustration of elements such as lower wiring layers and transistors is omitted.
- the width or inner diameter of the recess 2 is very small, for example, about 120 nm, and the aspect ratio is, for example, about 2 to 4.
- the diffusion prevention film, the etching stop film, and the like are not shown and simplified in shape.
- a barrier layer 4 made of a laminated structure of, for example, a TaN film and a Ta film is formed in a plasma sputtering apparatus substantially uniformly including the inner surface in the recess 2 (FIG. 13A). )reference).
- a seed film 6 made of a thin copper film is formed as a metal film over the entire wafer surface including the surface in the recess 2 by a plasma sputtering apparatus (see FIG. 13B).
- the recess 2 is filled with a metal film 8 made of, for example, a copper film by performing copper plating on the wafer surface (see FIG. 13C). Thereafter, the excess metal film 8, seed film 6 and barrier layer 4 on the wafer surface are removed by polishing using the above-described CMP process or the like.
- a self-formed barrier layer using a Mn film or a CuMn alloy film instead of the Ta film or TaN film has attracted attention.
- the Mn film or CuMn alloy film is formed by sputtering, and the Mn film or CuMn alloy film itself becomes a seed film. Therefore, a Cu plating layer can be directly formed thereon, and annealing can be performed after plating.
- MnSixOy (x, y: arbitrary positive number) film or Mn and SiO is formed at the boundary between the SiO 2 layer and the Mn film or CuMn alloy film. Since a barrier film called a manganese oxide MnOx (x: arbitrary positive number) film formed by the reaction with two layers of oxygen is formed, there is an advantage that the number of manufacturing steps can be reduced.
- Manganese oxides include MnO, Mn 3 O 4 , Mn 2 O 3 , and MnO 2 depending on the valence of Mn. In this specification, these are collectively referred to as MnOx.
- TEOS is used as a material for the interlayer insulating film.
- a low-k film made of SiOC, SiCOH or the like containing an organic group such as a methyl group as a material having a lower relative dielectric constant has been studied.
- the relative dielectric constant of the silicon oxide film formed using the TEOS is about 4.1
- the relative dielectric constant of SiOC is about 3.0.
- a Mn-containing film is formed by CVD on the surface of the interlayer insulating film having a low relative dielectric constant including the exposed surface in the recess.
- a MnOx film is hardly deposited, there is a problem that a barrier layer cannot be formed.
- the present invention provides a film forming method, a pre-processing apparatus, and a processing system capable of efficiently forming a thin film containing Mn, for example, a MnOx film, on the surface of an insulating layer made of a low-k film.
- the present inventors have made a hydrophilic treatment such as exposing the surface of the insulating layer to plasma before performing the MnOx film forming process.
- the present invention has been achieved by obtaining the knowledge that the MnOx thin film can be efficiently deposited by applying the above to improve the wettability of the insulating layer.
- the surface of the insulating layer is formed. Forming a thin film containing Mn by subjecting the surface of the insulating layer that has been subjected to the hydrophilization treatment to film formation using a Mn-containing material on the surface of the insulating layer that has been subjected to the hydrophilization treatment. And a thin film forming process.
- the surface of the insulating layer is formed.
- a hydrophilization step for making a hydrophilic surface by performing a hydrophilization treatment, and forming a thin film containing Mn by subjecting the surface of the insulating layer subjected to the hydrophilization treatment to a film formation treatment using a Mn-containing source gas A thin film forming process is provided.
- the hydrophilic treatment can be performed by performing a plasma treatment on the insulating layer.
- a plasma treatment an oxygen-containing gas and / or a rare gas can be used.
- the hydrophilization treatment can also be performed by performing an ultraviolet ozone treatment that modifies the surface of the insulating layer using ultraviolet rays and an oxygen-containing gas.
- the hydrophilization treatment can also be performed by performing a GCIB treatment that irradiates the surface of the insulating layer with a gas cluster ion beam.
- the hydrophilization treatment can also be performed by performing a visible light irradiation treatment that irradiates the surface of the insulating layer with visible light having a wavelength of 425 nm.
- an annealing step can be performed in which the insulating layer is annealed at a temperature higher than the process temperature in the thin film forming step to remove moisture in the insulating layer.
- an adhesion step of applying an adhesion treatment for adhering water and / or oxygen-containing gas to the surface of the insulating layer may be performed.
- the low-k film is defined as a film made of a dielectric material having a relative dielectric constant smaller than 4.1.
- the low-k film includes a SiOC film, a SiO film, a SiOF film, a SiC film, a SiCOH film, a SiCN film, a porous silica film, a porous methylsilsesquioxane film, a polyarylene film, a SiLK (registered trademark) film, and a fluorocarbon film. It can be composed of one or more films selected from the group consisting of:
- the pretreatment for performing the pretreatment that is performed before forming the thin film containing Mn on the target object having the insulating layer formed of the low-k film having the recess formed on the surface a processing container capable of being evacuated, a mounting table structure provided in the processing container for mounting the processing object, a heating means for heating the processing object, and the processing container Gas introduction means for introducing gas into the gas; gas supply means capable of supplying rare gas, water vapor and oxygen-containing gas to the gas introduction means; and hydrophilic means for hydrophilizing the surface of the insulating layer;
- a pretreatment device including a device control unit that controls the entire device to perform an annealing treatment, an adhesion treatment, and a hydrophilization treatment on the object to be treated.
- the hydrophilizing means may be any one of plasma generating means, ultraviolet irradiation means, GCIB processing means, and visible light irradiation means having a wavelength of 425 nm.
- a processing system for forming a thin film containing Mn on an object to be processed on which an insulating layer made of a low-k film having a recess is formed the object to be processed is disposed inside.
- a common transfer chamber having a transfer mechanism for transferring; a hydrophilic treatment device connected to the common transfer chamber to perform a hydrophilic treatment on the object to be processed; and a target to be processed connected to the common transfer chamber.
- a processing system including a film forming apparatus that performs a film forming process for forming a thin film containing Mn on a body, and a system control unit that controls the operation of the entire processing system.
- the hydrophilization treatment apparatus is any one of a plasma treatment apparatus, an ultraviolet irradiation treatment apparatus, a gas cluster ion beam irradiation treatment apparatus, and a visible light irradiation treatment apparatus that emits visible light having a wavelength of 425 nm. Can do.
- An annealing apparatus for performing an annealing process on the object to be processed can be connected to the common transfer chamber.
- An adhesion processing apparatus for performing an adhesion process for adhering water and / or oxygen-containing gas to the object to be processed can be connected to the common transfer chamber.
- a processing system for forming a thin film containing Mn on an object to be processed on which an insulating layer made of a low-k film having a recess is formed the object to be processed is disposed inside.
- a common transfer chamber having a transfer mechanism for transferring, the above-described pretreatment device connected to the common transfer chamber, and a thin film containing Mn to the target object connected to the common transfer chamber.
- a processing system including a film forming apparatus that performs a film forming process, and a system control unit that controls the operation of the entire processing system.
- FIG. 2 is a schematic cross-sectional view showing a pretreatment processing apparatus capable of performing three treatments, a hydrophilic treatment, an annealing treatment, and an adhesion treatment.
- FIG. 2 is a schematic cross-sectional view showing a pretreatment processing apparatus capable of performing three treatments, a hydrophilic treatment, an annealing treatment, and an adhesion treatment.
- It is a schematic sectional drawing which shows the film-forming apparatus which forms manganese oxide into a film. It is a whole explanatory drawing for demonstrating the whole film-forming method of this invention.
- It is a flowchart which shows 1st Example of the film-forming method of this invention.
- It is a flowchart which shows 2nd Example of the film-forming method of this invention.
- It is a flowchart which shows 3rd Example of the film-forming method of this invention.
- FIG. 1 is a schematic configuration diagram showing an example of a processing system for carrying out the method of the present invention
- FIG. 2 is a schematic cross-sectional view showing a pretreatment apparatus capable of performing three treatments of hydrophilic treatment, annealing treatment and adhesion treatment
- 3 is a schematic sectional view showing a film forming apparatus for forming a manganese oxide film
- FIG. 4 is an overall explanatory view for explaining the whole film forming method of the present invention
- FIG. 5 is a film forming method of the present invention.
- FIG. 6 is a flowchart showing a second embodiment of the film forming method of the present invention
- FIG. 7 is a flowchart showing a third embodiment of the film forming method of the present invention
- FIG. It is a figure which shows an example of the aspect of a change when the surface is hydrophilized.
- a processing system 10 has a common transfer chamber 14 provided therein with a transfer mechanism 12 for transferring a semiconductor wafer W, which is an object to be processed.
- the common transfer chamber 14 is evacuated inside and is in a reduced pressure atmosphere during normal operation.
- the transfer mechanism 12 has two picks 12A and 12B for holding the wafer W, and is capable of turning and bending so that the wafer W can be moved to various processing apparatuses and load lock chambers as will be described later. It can be carried in and out.
- the common transfer chamber 14 is formed in a hexagonal shape, and the load lock chambers 16 and 18 are connected via a gate valve G that can be opened and closed with respect to two adjacent sides of the hexagonal shape.
- the load lock chambers 16 and 18 can be evacuated and returned to atmospheric pressure, and are alternately repeated in an atmospheric pressure atmosphere and a vacuum atmosphere when the wafer W is loaded and unloaded, so that the vacuum state in the common transfer chamber 14 is obtained.
- the wafer W can be loaded and unloaded while maintaining the above.
- Each of the load lock chambers 16 and 18 is provided with a support table 20 that temporarily supports the wafer W.
- a loader chamber 22 having a horizontally long box shape is connected to the opposite side of each of the load lock chambers 16 and 18 through a gate valve G.
- a plurality of cassette stands 24 are attached to one side of the loader chamber 22 in the longitudinal direction, and a cassette 26 that can accommodate a plurality of wafers W can be placed thereon.
- a gate door 27 that can be opened and closed is provided on the side wall of the loader chamber 22 to which the cassettes 26 are attached. The gate door 27 is opened and the wafer W is transferred into and out of the loader chamber 22. Can be done.
- a transfer arm 28 that is movable along the longitudinal direction is provided.
- the transfer arm 28 has two picks 28A and 28B which can be turned and bent, and the wafer W can be held and transferred by the picks 28A and 28B.
- An orienter 30 that aligns and aligns the wafer W is provided at one end of the horizontally long loader chamber 22.
- the wafer W in the cassette 26 are transferred to the loader chamber 22 in an atmospheric pressure atmosphere by the transfer arm 28. It is taken in. Then, the wafer W is transferred to the orienter 30 by the transfer arm 28, and alignment and orientation are performed based on the notches and orientation flats formed on the wafer W. The wafer W is again transferred by the transfer arm 28 and is loaded into one of the load lock chambers, for example, the load lock chamber 16.
- the wafer W accommodated in the load lock chamber 16 is received by the transfer mechanism 12 provided in the common transfer chamber 14, and this common It will be carried into the transfer chamber 14.
- the unprocessed wafer W is loaded into each processing apparatus to be described later by the transfer mechanism 12 and predetermined processing is performed in each processing apparatus.
- the processed wafer W is carried out to the loader chamber 22 side through any one of the load lock chambers, for example, the load lock chamber 18, and further in a predetermined cassette 26 for storing the processed wafers W. Will be housed.
- each processing apparatus connected to the common transfer chamber 14 will be described.
- the four processing apparatuses include a hydrophilic processing apparatus 32 that performs a hydrophilic process on the wafer W, an annealing process apparatus 34 that performs an annealing process on the wafer W, and an attachment that attaches moisture or the like to the wafer W.
- the processing apparatuses necessary for carrying out the method of the present invention are the hydrophilization processing apparatus 32 and the film forming processing apparatus 38, and other processing apparatuses, that is, the annealing processing apparatus 34 and the adhesion processing apparatus 36 are used as necessary. Should be provided.
- the hydrophilic treatment apparatus 32 performs a hydrophilic treatment on the surface of the insulating layer formed on the surface of the wafer W to obtain a hydrophilic surface. Examples of the hydrophilic treatment method include the following four types, and any hydrophilic treatment may be performed.
- the first hydrophilization treatment is to perform plasma treatment on the insulating layer of the wafer W using an oxygen-containing gas and / or a rare gas.
- the hydrophilization treatment device 32 is a plasma treatment device.
- FIG. 1 shows a case where a plasma processing apparatus is used.
- the second hydrophilization treatment apparatus is intended to perform surface modification treatment for modifying the surface of the insulating layer of the wafer W using ultraviolet rays and an oxygen-containing gas. In this case, the hydrophilic treatment is performed.
- an ultraviolet irradiation processing apparatus is used as the apparatus 32. *
- the third hydrophilization treatment includes a GCIB (Gas Cluster Ion Beam) treatment in which the surface of the insulating layer of the wafer W is irradiated with a gas cluster ion beam.
- the hydrophilization treatment device 32 is used.
- a gas cluster ion beam irradiation processing apparatus is used.
- the fourth hydrophilization treatment is performed by irradiating the surface of the insulating layer of the wafer W with visible light having a wavelength of 425 nm to perform the visible light irradiation treatment.
- the hydrophilic treatment device 32 is visible.
- a light irradiation treatment device is used.
- visible light with a wavelength of 425 nm corresponds to the binding energy between silicon and a methyl group (Si—CH 3 ), and is a wavelength that can efficiently cut this methyl group.
- the hydrophilic treatment device 32 any one of the four types of treatment devices is used.
- the wafer W is heated to a predetermined process temperature, and moisture in the insulating layer formed on the wafer W is evaporated and removed.
- the process temperature is set to be higher than the process temperature in the film forming apparatus 38.
- inert gas into the processing unit for example, N 2 or Ar, it is shed a rare gas such as He.
- the adhesion processing apparatus 36 water (water vapor) and / or oxygen-containing gas is adhered to the surface of the insulating layer of the wafer W in order to promote the deposition of the thin film.
- FIG. 2 is a cross-sectional view showing such a pretreatment apparatus.
- the pretreatment device 42 has a cylindrical treatment container 44 formed of an aluminum alloy or the like, and the treatment container 44 is grounded.
- a loading / unloading port 46 is provided on the side wall of the processing container 44, and the loading / unloading port 46 is connected to the common transfer chamber 14 via a gate valve G so that the wafer W can be loaded / unloaded.
- an exhaust port 48 is formed at the bottom of the processing container 44, and an exhaust means 50 is connected to the exhaust port 48.
- the exhaust means 50 has an exhaust passage 51 connected to the exhaust port 48.
- a pressure adjusting valve 52 such as a butterfly valve and a vacuum pump 54 are sequentially provided,
- the atmosphere in the processing container 44 can be evacuated while adjusting the pressure.
- a shower head 56 is provided on the ceiling of the processing container 44 as a gas introducing means, and necessary gas is introduced into the processing container 44 through a gas hole 56A provided on the gas injection surface. It has become.
- the shower head 56 is connected to gas supply means 58 for supplying necessary gas.
- the gas supply means 58 has a gas passage 60 connected to the gas inlet 56 ⁇ / b> B of the shower head 56.
- the upstream side of the gas passage 60 is branched into a plurality of branch passages 62, and a flow rate controller 64 such as a mass flow controller and an opening / closing valve 66 are interposed in the middle of each branch passage 62.
- the necessary gas can be supplied while controlling the flow rate.
- Ar can be supplied as a rare gas, oxygen or ozone as an oxygen-containing gas, or a mixed gas of both, and N 2 and moisture (water vapor, H 2 O) can be supplied as the inert gas as required. .
- moisture may be supplied by a bubbling method using an inert gas.
- a mounting table structure 68 for mounting the wafer W is provided.
- the mounting table structure 68 includes a column 70 standing up from the bottom of the container, and a disk-shaped mounting table 72 made of a disk, for example, provided at the upper end of the column 70.
- the mounting table 72 is provided with, for example, a resistance heater 74 as a heating means, and the wafer W mounted on the mounting table 72 is heated to a desired temperature.
- the resistance heater 74 is connected to a heater power supply 78 via a power supply line 76 so as to perform necessary power supply.
- this pre-processing apparatus 42 has a hydrophilizing means 80 for hydrophilizing the surface of the insulating layer of the wafer W.
- a plasma generating means 82 for generating plasma in the processing vessel 44 is provided.
- the plasma generating means 82 has a lower electrode 84 embedded in the upper part of the mounting table 72, and a power supply line 86 is connected to the lower electrode 84.
- the power supply line 86 is connected to the high-frequency power supply 90 via a matching circuit 88 in the middle, and between the lower electrode 84 and the shower head 56 which is the upper electrode facing the power supply line 86 as necessary.
- Plasma can be generated in the processing space 92 by applying high-frequency power.
- As the frequency of the high frequency power for example, 13.56 MHz can be used, but the frequency is not particularly limited.
- a device control unit 94 made of, for example, a computer is provided.
- the device control unit 94 stores a computer-readable program necessary for the operation.
- a storage medium 96 is included.
- the storage medium 96 is composed of a flexible disk, a CD (Compact Disc), a hard disk, a flash memory, a DVD, or the like.
- the hydrophilization treatment, annealing treatment and adhesion treatment can be performed continuously.
- the pretreatment device 42 may perform only the hydrophilic treatment or only one of the annealing treatment and the adhesion treatment in addition to the hydrophilic treatment.
- a parallel plate type (capacitive coupling type) plasma generating unit is used as the plasma generating unit 82 as an example, but instead of this, an inductively coupled plasma generating unit, a helicon wave excitation type, or the like is used.
- Plasma generation means microwave excitation surface wave plasma generation means (including RLSA (Radial Line Slot Antenna) microwave plasma and SPA (Slot Plane Antenna) plasma), electron cyclotron resonance plasma generation means, remote plasma generation means, etc. Can do.
- RLSA Rotary Line Slot Antenna
- SPA Slot Plane Antenna
- the film forming apparatus 38 forms a thin film containing Mn on the surface of the insulating layer of the wafer W using a Mn-containing source gas (hereinafter also referred to as “Mn source gas”).
- Mn source gas a Mn-containing source gas
- a film forming apparatus similar to the film forming apparatus disclosed in Japanese Patent Application Laid-Open No. 2009-016782 can be used.
- the film forming apparatus 38 includes a processing container 100 whose internal atmosphere can be evacuated, and a loading / unloading port 102 is provided on the side wall of the processing container 100.
- the inlet 102 is connected to the common transfer chamber 14 via a gate valve G.
- a mounting table 104 is provided standing from the bottom of the container, and a resistance heater 106 is embedded in the mounting table 104 as a heating means. Thereby, the wafer W mounted on the upper surface of the mounting table 104 can be heated to a predetermined temperature.
- a shower head 108 is provided on the ceiling of the processing vessel 100 as a gas introduction unit.
- a gas diffusion space 110 is formed in the shower head 108, and a gas ejection hole 114 is formed by connecting the gas diffusion space 110 and the processing space 112.
- Mn source gas is made to flow through this gas diffusion space while controlling the flow rate.
- the Mn source gas is flowed together with a carrier gas such as H 2 , N 2, or a rare gas.
- H 2 gas is used as the carrier gas.
- the Mn source gas is supplied to the processing space 112 through the gas ejection holes 114 and reaches the surface of the wafer W, where it decomposes and deposits the first metal on the surface of the insulating layer on the wafer W by thermal CVD reaction.
- An MnOx film is formed as a thin film containing the film. In this case, the manganese produced by decomposition on the surface of the wafer W is combined with the oxygen component of the insulating layer to form the MnOx film.
- the film forming apparatus 38 is merely an example, and the present invention is not limited to this.
- the MnOx film may be formed by another film forming method, for example, a PVD method.
- the system control unit 116 including, for example, a computer is provided.
- the system control unit 116 is necessary for the operation.
- the storage medium 120 is composed of a flexible disk, a CD (Compact Disc), a hard disk, a flash memory, a DVD, or the like.
- the operations of the processing devices 32 to 38 operate under the control of the system control unit 116, whereby each processing described later is performed.
- FIG. 4 is an overall explanatory diagram for explaining the entire film forming method of the present invention
- FIG. 5 is a flowchart showing a first embodiment of the film forming method of the present invention
- FIG. 6 is a second flowchart of the film forming method of the present invention
- FIG. 7 is a flowchart showing a third embodiment of the film forming method of the present invention
- FIG. 8 is a view showing an example of a change mode when the surface of the insulating layer is subjected to a hydrophilic treatment.
- the state is as shown in FIG. 4A, and the insulating layer is changed from the SiO 2 film formed by TEOS to the insulating layer 122 having a low relative dielectric constant. Except for the changed points, the structure is the same as the structure shown in FIG. 13A (excluding the barrier layer 4). That is, on the surface of an insulating layer (interlayer insulating film) 122 made of a material having a low relative dielectric constant, for example, called a Low-k film (SiCO) formed on the semiconductor wafer W, a single damascene structure, a dual damascene structure, a three-dimensional structure is formed.
- an insulating layer (interlayer insulating film) 122 made of a material having a low relative dielectric constant, for example, called a Low-k film (SiCO) formed on the semiconductor wafer W, a single damascene structure, a dual damascene structure, a three-dimensional structure is formed.
- SiCO Low-k film
- a recess 2 corresponding to a via hole, a through hole, a groove (trench), or the like is formed by a mounting structure or the like, and a lower wiring layer 3 made of, for example, copper is formed in an exposed state at the bottom of the recess 2.
- the Low-k material means a material having a relative dielectric constant lower than 4.1 which is a relative dielectric constant of the SiO 2 film.
- the recess 2 includes a groove (trench) 2A having an elongated cross section and a hole 2B formed in a part of the bottom of the groove 2A.
- the hole 2B is a contact hole or through hole. It becomes a hall.
- the wiring layer 3 is exposed at the bottom of the hole 2B, and is electrically connected to a lower wiring layer and an element such as a transistor. Note that illustration of elements such as lower wiring layers and transistors is omitted.
- the width or inner diameter of the recess 2 is very small, for example, about 120 nm, and the aspect ratio is, for example, about 2 to 4.
- the diffusion prevention film, the etching stop film, and the like are not illustrated and simplified in shape.
- the wafer W as shown in FIG. 4A is subjected to a pretreatment as shown in FIG. 4B as a pretreatment to make the surface of the insulating layer 122 hydrophilic (S1).
- a thin film forming step is performed to form a thin film 124 containing the first metal on the surface of the insulating layer 122 and the exposed surface in the recess 2 (S2). Since the surface of the insulating layer 122 is a hydrophilic surface, the thin film 124 is efficiently deposited.
- the thin film 124 is made of a MnOx film, and this MnOx film functions as a barrier layer.
- a copper seed film is formed on the surface of the thin film 124 (including the exposed surface in the recess 2) by sputtering or the like, and further subjected to copper plating treatment, whereby the metal film 8 made of, for example, a copper film is formed in the recess 2. (See FIG. 4D). Thereafter, the excess metal film 8, the seed film and the barrier layer 124 on the wafer surface are removed by polishing using the above-described CMP process or the like.
- the pre-processing includes the first embodiment shown in FIG. 5, the second embodiment shown in FIG. 6, and the third embodiment shown in FIG. 7, and any of these embodiments may be performed.
- the first embodiment shown in FIG. 5 performs the above-described hydrophilization step S1 in which the surface of the insulating layer 122 is subjected to a hydrophilic treatment, and then the thin film formation in which a thin film 124, here a MnOx film, is formed.
- Step S2 is performed.
- the hydrophilization treatment includes four treatment methods of plasma treatment, ultraviolet ozone treatment, GCIB treatment, and visible light irradiation treatment, and any one of these four treatment methods is selected. And do it.
- This plasma treatment can be performed by the hydrophilic treatment apparatus 32 in FIG. 1 (can also be performed by the pretreatment apparatus 42 shown in FIG. 2).
- plasma is generated in an atmosphere of a rare gas such as Ar, an oxygen-containing atmosphere such as O 2 , or a mixed gas atmosphere of both gases to hydrophilize the surface of the insulating layer 122.
- a rare gas such as Ar
- an oxygen-containing atmosphere such as O 2
- a mixed gas atmosphere of both gases to hydrophilize the surface of the insulating layer 122.
- the low-k film (SiOC) constituting the insulating layer 122 is generally formed using an organic material such as trimethylsilane, the surface has a methyl group (—CH 2) as shown in FIG. 3 ) It is terminated with a hydrophobic surface.
- the surface of the insulating layer 122 is exposed to plasma and subjected to a hydrophilization treatment, whereby the methyl group is cut to form —OH groups or Si—O—Si bonds as shown in FIG. As a result, the surface becomes hydrophilic.
- the surface of the insulating layer 122 is hydrophilized, it becomes possible to efficiently deposit the MnOx film in the subsequent thin film forming step.
- this plasma treatment can exert its effect if it is performed for at least about several seconds.
- the process pressure at the time of plasma treatment and the high frequency power to be applied are not particularly limited, but practically the process pressure is in the range of 10 0 to 10 5 Pa and the high frequency power is in the range of 10 1 to 10 4 watts. .
- this plasma treatment can also be performed in the pretreatment apparatus shown in FIG.
- O 2 gas is used during the plasma treatment, the formation of —OH groups is promoted on the surface of the insulating layer, so that the MnOx film can be deposited more efficiently.
- plasma of a process gas containing H plasma of a process gas containing C, plasma of a process gas containing N, or a process containing halogen such as F Gas plasma may be used.
- the surface modification treatment which is a second example of the hydrophilization treatment, is carried out by installing a known ultraviolet ozone treatment device as the hydrophilization treatment device 32 in FIG. be able to.
- a known ultraviolet ozone treatment device As the hydrophilization treatment device 32 in FIG. be able to.
- the wafer W is exposed to an atmosphere of oxygen-containing gas including ozone and O 2 gas, and at the same time, ultraviolet rays are irradiated to modify the surface of the insulating layer 122 to make it hydrophilic.
- a low-pressure mercury lamp (wavelength: 185 to 254 nm), an Xe excimer lamp (wavelength: 172 nm) or the like can be used, and preferably short-wavelength ultraviolet light (wavelength: 240 nm or less) is used.
- the GCIB process which is a third example of the hydrophilization process, includes the gas cluster ion beam process, and is implemented by installing a well-known GCIB process apparatus as the hydrophilization apparatus 32 in FIG. Can do.
- a cluster in which several to thousands of atoms and molecules are gently bonded is ionized to a positive charge, and this is accelerated at an acceleration voltage of 2.5 to 80 kV to irradiate the surface of the insulating layer 122.
- the gas used here is, for example, a rare gas such as O 2 , N 2 , H 2 , CH 4 , Ar, or He, and a mixed gas thereof may be used.
- the hydrophobic surface is modified to the hydrophilic surface.
- the surface of the insulating layer 122 is hydrophilized, it becomes possible to efficiently deposit the MnOx film in the subsequent thin film forming step.
- the visible light irradiation process which is a fourth example of the hydrophilization process, includes the irradiation process of visible light having a wavelength of 425 nm, and a visible light irradiation processing apparatus is installed as the hydrophilic treatment apparatus 32 in FIG. Can be implemented.
- the surface of the insulating layer 122 is irradiated with visible light having a wavelength of 425 nm (purple light) as described above.
- the bond energy between silicon terminated on the surface of the insulating layer 122 and the methyl group (Si—CH 3 ) corresponds to an energy of 425 nm.
- the hydrophobic surface can be modified to the hydrophilic surface by converting into —OH group or Si—O—Si bond (see FIG. 8).
- the surface of the insulating layer 122 is hydrophilized, it becomes possible to efficiently deposit the MnOx film in the subsequent thin film forming step.
- the thin film formation step S2 is performed in the film formation processing apparatus 38.
- both the annealing processing apparatus 34 and the adhesion processing apparatus 36 in FIG. 1 need not be installed.
- a film forming apparatus 38 as shown in FIG. 3 is used. That is, the wafer W on the mounting table 104 is heated to a predetermined temperature by the resistance heater 106 and the inside of the processing container 100 is evacuated, and the shower head 108 contains the H 2 gas as a carrier gas in the processing container 100.
- a Mn source gas is supplied to cause a decomposition reaction on the wafer surface, and a MnOx film is formed as a thin film 124 containing the first metal on the surface of the insulating layer 122 formed on the surface of the wafer W (see FIG. 4C). ).
- the Mn source gas is supplied here using H 2 gas as the carrier gas as described above.
- the Mn source gas decomposes when it comes into contact with oxygen during heating, and manganese has a property of being strongly bonded to oxygen
- the MnOx film reacts with the oxygen component in the insulating layer 122 containing the oxygen component. Will be formed. Therefore, the MnOx film is hardly deposited on the exposed copper surface, which is the wiring layer 3 exposed at the bottom in the recess 2.
- the surface of the insulating layer 122 is a hydrophilic surface, the thin film 124 made of the MnOx film is quickly and easily deposited, not only the surface of the insulating layer 122, A film can also be efficiently formed on the exposed surface in the recess 2.
- the process conditions at this time are a process temperature in the range of 100 to 400 ° C., for example, about 200 ° C., and a process pressure in the range of 10 0 to 10 5 Pa, for example, 133 Pa.
- the gas flow rate is about 0.2 to 10 sccm for the Mn source gas, about 10 to 100 sccm for the carrier gas, and forms a MnOx film having a thickness of about 1 to 7 nm.
- an annealing treatment is performed in addition to the hydrophilic treatment performed in the first embodiment.
- an annealing step S1-1 is performed between the hydrophilization step S1 and the thin film formation step S2 described above, in which the wafer W is annealed by heating to a predetermined temperature. ing.
- the wafer W is heated at a temperature higher than the process temperature in the thin film formation step so that moisture in the insulating layer 122 is removed.
- This annealing treatment can be performed by the annealing treatment apparatus 34 in FIG. 1, and an inert gas such as N 2 gas or a rare gas such as Ar or He is allowed to flow during the treatment so that the insulating layer 122 is used. Remove moisture contained in it.
- This annealing treatment is performed for the following reason. That is, since the Mn source gas used in the thin film forming step S2, which is a subsequent step of the annealing step, has a characteristic that it is very easy to react with moisture, when moisture is generated from the insulating layer 122 in the thin film forming step. This is because the film thickness of the formed MnOx film varies depending on the amount of the generated water, and the reproducibility of the film forming process is poor.
- the process temperature during the annealing process is higher than the process temperature in the thin film forming step, and according to this, in the thin film forming step, moisture is extracted from the insulating layer 122. It can be surely prevented.
- the process temperature in the annealing step may be set to a temperature higher than the above temperature, for example, 220 ° C.
- the annealing step S1-1 may be performed not immediately between the steps S1 and S2 but immediately before the hydrophilization step in step S1.
- this annealing treatment can be performed by the pretreatment apparatus shown in FIG.
- a third embodiment of the method of the present invention will be described.
- water (water vapor) and / or oxygen-containing gas is added to the surface of the insulating layer 122.
- Adhesion treatment is performed for adhesion.
- an adhesion step S1-2 for performing the above-described adhesion treatment is performed between the annealing step S1-1 and the thin film formation step S2 of the second embodiment.
- This adhesion treatment can be performed by the adhesion treatment device 36 in FIG. 1, and by exposing the wafer W to an atmosphere of water (water vapor) or an oxygen-containing gas such as O 2 gas, the water vapor or O 2 gas is exposed to the insulating layer.
- an atmosphere of water water vapor
- an oxygen-containing gas such as O 2 gas
- the deposition amount of the MnOx film in the subsequent process is increased.
- this adhesion processing may be performed by exposing the wafer W to an atmosphere having a certain humidity without using the adhesion processing apparatus 36.
- the adhesion step S1-2 may be performed immediately before the annealing step S1-1 or immediately before the hydrophilic treatment step S1 in the first embodiment. Further, in the flowchart shown in FIG. 7, the order of the hydrophilization step S1 and the annealing step S1-1 may be reversed.
- this adhesion treatment can be performed by the pretreatment device 42 shown in FIG. Therefore, if the pretreatment device 42 shown in FIG. 2 is provided, not only can the hydrophilic treatment (plasma treatment), annealing treatment and adhesion treatment be performed continuously in this device, but also the number of treatment steps can be reduced. If desired, in addition to the hydrophilic treatment (plasma treatment), any one of annealing treatment and adhesion treatment can be performed.
- the XRF is a fluorescent X-ray analyzer.
- Ar plasma treatment was performed as the plasma treatment.
- the deposition time of the MnOx film is 600 seconds.
- the MnOx film is hardly deposited.
- the film thickness of the deposited MnOx film reaches 1 nm even if the plasma treatment is performed for about 15 seconds, for example, and shows a good result.
- the plasma treatment is further performed for about 117 seconds or more, the film thickness of the deposited MnOx film is It reached 2.3 nm or more and was found to be very excellent.
- FIG. 10 is a view showing the wettability state of the surface of the SiOC film
- FIG. 10 (A) is a view showing the wettability results of the TEOS film (SiO 2 film) and the SiOC film
- FIG. 10 (B) is the wettability. It is a diagram showing the dependence of sexual O 2 plasma treatment time.
- H 2 O water
- C 2 H 5 OH ethyl alcohol
- the SiO 2 film of TEOS has wettability to both H 2 O and ethyl alcohol
- the SiOC film has wettability to ethyl alcohol.
- the difference in wettability is caused by the fact that Si—O—Si bonds and Si—OH bonds exist on the surface of the TEOS SiO 2 film, whereas Si—CH 3 bonds exist on the surface of the SiOC film. It is expected that it exists.
- FIG. 11 is a schematic diagram showing a cross section centered on the MnOx film of the wafer when the accelerated load test is performed
- FIG. 12 is a graph showing the analysis results of elements in a specific part in FIG. FIG.
- FIG. 12 is a graph showing the distribution of elements in the A part (immediately after the formation of the MnOx film), which is the boundary part of the MnOx film in FIG. 11, and FIG. It is a graph which shows distribution of the element of B section (after an acceleration load test) in a SiOC film.
- O 2 plasma treatment was performed for 10 seconds as a hydrophilic treatment, and a MnOx film was formed for 30 minutes as a thin film formation treatment.
- the process conditions at this time are a process temperature of 200 ° C., a process pressure of 133 Pa, an H 2 carrier gas of 25 sccm, and a Mn source gas: (EtCp) 2 Mn of 7 sccm.
- a Cu film was deposited on the MnOx film by sputtering.
- such a wafer was allowed to stand in an atmosphere at 400 ° C. for 100 hours and annealed (pressure: 5 ⁇ 10 ⁇ 5 Pa or less).
- the thickness of the MnOx film was about 3.2 nm, and a sufficiently thick MnOx film was deposited.
- Mn and Cu exist in the vicinity of the boundary of the MnOx film.
- Cu does not exist in the SiOC film, and Cu element does not diffuse even when the accelerated load test is performed, and the MnOx film is sufficiently used as a barrier layer. It can be seen that it performs a function.
- the SiOC film has been described as an example of the insulating layer 122 having a low relative dielectric constant.
- the present invention is not limited to this, and the SiOC film, the SiO film, the SiOF film, the SiC film, the SiCOH film, and the SiCN film are not limited thereto.
- One or more films selected from the group consisting of a porous silica film, a porous methylsilsesquioxane film, a polyarylene film, a SiLK (registered trademark) film, and a fluorocarbon film can be used.
- the present invention is not limited to this, and the present invention can be applied even when the MnOx (or MnSixOy film) is formed by the PVD method.
- MnOx or MnSixOy film
- the present invention can be applied even when the MnOx (or MnSixOy film) is formed by the PVD method.
- MnOx was formed at the interface between Cu and the insulating film.
- MnOx was not formed at the interface between Cu and the insulating film.
- the condition that Mn atoms dissolved and diffused in the Cu layer react with O atoms of the insulating film adjacent to the Cu layer to form a MnOx thin film at the interface is that the insulating film surface is hydrophilic. Therefore, when the surface of the insulating film has hydrophobicity, it is effective to perform a hydrophilic treatment on the surface.
- the semiconductor wafer includes a silicon substrate and a compound semiconductor substrate such as GaAs, SiC, GaN, and the like, and is not limited to these substrates.
- the present invention can also be applied to glass substrates, ceramic substrates, and the like used in display devices.
- a semiconductor device having a film structure formed by the above-described film forming method of the present invention and an electronic apparatus including the semiconductor device are also within the scope of the present invention.
Abstract
Description
本発明の第2の観点によれば、凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する成膜方法において、前記絶縁層の表面に親水化処理を施して親水性の表面にする親水化工程と、前記親水化処理の行われた前記絶縁層の表面にMn含有原料ガスを用いて成膜処理を施すことによりMnを含む薄膜を形成する薄膜形成工程と、を有する成膜方法が提供される。
上記のようにMnを含む薄膜を成膜する前にlow-k膜の表面を親水化することにより、Mnを含む薄膜、例えばMnOx膜を効率的に形成することが可能となる。
前記親水化手段は、プラズマ発生手段、紫外線照射手段、GCIB処理手段および波長が425nmの可視光照射手段の内のいずれか1つとすることができる。
前記親水化処理装置は、プラズマ処理装置、紫外線照射処理装置、ガスクラスターイオンビーム照射処理装置および波長が425nmの可視光を照射する可視光照射処理装置の内のいずれか1つの処理装置とすることができる。
前記共通搬送室に、前記被処理体に対して水及び/又は酸素含有ガスを付着させる付着処理を施す付着処理装置を連結することもできる。
また上記3つの処理装置、すなわち親水化処理装置32とアニール処理装置34と付着処理装置36をまとめて1つの前処理装置として構成することができる。図2は、このような前処理装置を示す断面図である。図示するように、この前処理装置42は、アルミニウム合金等により成形された円筒体状の処理容器44を有しており、この処理容器44は接地されている。この処理容器44の側壁には搬出入口46が設けられ、この搬出入口46はゲートバルブGを介して共通搬送室14に連結されており、ウエハWを搬出入できるようになっている。
次に図3も参照して成膜処理装置38の概略構成について説明する。この成膜処理装置38は、前述したようにウエハWの絶縁層の表面にMn含有原料ガス(以下「Mn原料ガス」とも称する)を用いてMnを含む薄膜を形成するものである。この成膜処理装置38としては、例えば特開2009-016782号公報に開示されたような成膜装置に類似する成膜装置を用いることができる。
次に、以上のように構成された処理システム10を用いて行われる本発明方法について説明する。図4は本発明の成膜方法の全体を説明するための全体説明図、図5は本発明の成膜方法の第1実施例を示すフローチャート、図6は本発明の成膜方法の第2実施例を示すフローチャート、図7は本発明の成膜方法の第3実施例を示すフローチャート、図8は絶縁層の表面を親水化処理した時の変化の態様の一例を示す図である。
まず、図5に示す第1実施例は絶縁層122の表面に親水化処理を施す上記親水化工程S1を行って、次に薄膜124、ここではMnOx膜を形成する成膜処理を施す薄膜形成工程S2を行っている。上記親水化処理には、前述したようにプラズマ処理と紫外線オゾン処理とGCIB処理と可視光照射処理の4つの処理方法があり、これらの4つの処理方法の内のいずれか1つの処理方法を選択して行う。
ここでは、親水化処理の第1例としてプラズマ処理を選択した場合について主に説明する。このプラズマ処理は、図1中の親水化処理装置32で行うことができる(図2に示す前処理装置42で行うこともできる)。このプラズマ処理ではAr等の希ガスの雰囲気中、またはO2等の酸素含有雰囲気中、或いは両ガスの混合ガス雰囲気中でプラズマを発生し、絶縁層122の表面を親水化する。この絶縁層122を構成するLow-k膜(SiOC)は、一般的にはトリメチルシラン等の有機材料を用いて形成するので、図8(A)に示すように、表面はメチル基(-CH3)で終端しており、疎水面となっている。そして、この絶縁層122の表面をプラズマに曝して親水化処理を施すことにより、上記メチル基は切断されて図8(B)に示すように-OH基やSi-O-Siの結合となり、これによって表面は親水化されることになる。このように絶縁層122の表面が親水化されると、この後工程における薄膜形成工程においてMnOx膜の堆積を効率的に行うことが可能となる。
次に親水化処理の第2例である表面改質処理は、紫外線オゾン処理を行うことを内容とし、図1中の親水化処理装置32として周知の紫外線オゾン処理装置を設置することにより実施することができる。この紫外線オゾン処理では、オゾンやO2ガスを含む酸素含有ガスの雰囲気中にウエハWを曝すと同時に紫外線を照射し、絶縁層122の表面を改質して親水化させる。この紫外線の照射には、低圧水銀ランプ(波長:185~254nm)やXeエキシマランプ(波長:172nm)等を用いることができ、好ましくは短波長紫外線(波長:240nm以下)を用いる。
次に親水化処理の第3例であるGCIB処理は、ガスクラスターイオンビーム処理を行うことを内容とし、図1中の親水化処理装置32として周知のGCIB処理装置を設置することにより実施することができる。このGCIB処理では、数個から数千の原子や分子が緩やかに結合したクラスターを正電荷にイオン化させ、これを2.5~80kVの加速電圧で加速して絶縁層122の表面に照射させるようにしている。ここで用いられるガスは、例えばO2、N2、H2、CH4、ArやHe等の希ガス等であり、これらの混合ガスを用いてもよい。上述のようにガスクラスターイオンビームを絶縁層122の表面に照射することで疎水性表面が親水性表面に改質されることになる。このように絶縁層122の表面が親水化されると、この後工程における薄膜形成工程においてMnOx膜の堆積を効率的に行うことが可能となる。
次に親水化処理の第4例である可視光照射処理は、波長が425nmの可視光を照射処理することを内容とし、図1中の親水化処理装置32として可視光照射処理装置を設置することにより実施することができる。この可視光照射処理装置では、上述したように波長が425nm(紫光)の可視光を絶縁層122の表面に照射する。ここで、前述したように絶縁層122の表面で終端しているシリコンとメチル基(Si-CH3)の結合エネルギーは、425nmのエネルギーに相当するので、このメチル基を効率的に切断して前述したように-OH基やSi-O-Si結合(図8参照)に変換することにより、疎水性表面を親水性表面に改質することができる。このように絶縁層122の表面が親水化されると、この後工程における薄膜形成工程においてMnOx膜の堆積を効率的に行うことが可能となる。
次に、本発明方法の第2実施例について説明する。この第2実施例では、図4(B)に示すように、第1実施例で行った親水化処理に加えてアニール処理を行うようにしている。具体的には、図6に示すように、先に説明した親水化工程S1と薄膜形成工程S2との間で、ウエハWを所定の温度に加熱してアニール処理するアニール工程S1-1を行っている。このアニール処理では、ウエハWを上記薄膜形成工程におけるプロセス温度よりも高い温度で加熱しており、絶縁層122中の水分を抜くようにしている。
次に本発明方法の第3実施例について説明する。この第3実施例では、図4(B)で示すように、先の第1実施例、或いは第2実施例に加えて、絶縁層122の表面に水(水蒸気)及び/又は酸素含有ガスを付着させる付着処理を行うようにしている。具体的には、図7に示すように、ここでは第2実施例のアニール工程S1-1と薄膜形成工程S2との間で上記付着処理を施す付着工程S1-2を行っている。
次に、本発明方法を実際に実施して絶縁層の表面にMnOx膜を形成したので、その評価結果について説明する。
[Arプラズマ処理の場合]
まず、ウエハWの表面にLow-k材料(比誘電率が4.1よりも小さい)の1つであるメチル基等を含んだSiOC膜よりなる絶縁層を形成し、この絶縁層を有するウエハに対して親水化処理として前述したようなプラズマ処理を施し、このウエハに前述したようなMnOx成膜処理を行った時のMnOx膜の堆積量について検討を行ったので、その評価結果について説明する。図9はプラズマ処理時間とXRF膜厚(MnOx換算)との関係を示すグラフである。尚、上記XRFとは蛍光X線分析装置である。ここではプラズマ処理としてArプラズマ処理を行った。またMnOx膜の成膜時間は600secである。
次に、上述したようなSiOC膜よりなる絶縁層の表面の濡れ性とO2プラズマ処理による濡れ性の変化について検討を行った。比較のためにTEOSを用いて形成したSiO2膜よりなる絶縁層についても濡れ性を評価した。図10はSiOC膜の表面の濡れ性の状態を示す図であり、図10(A)はTEOS膜(SiO2膜)とSiOC膜の濡れ性の結果を示す図、図10(B)は濡れ性のO2プラズマ処理時間の依存性を示す図である。
次に、上述のように親水化処理としてO2プラズマ処理を行った絶縁膜の表面にMnOx膜を実際に成膜した膜にCu膜を堆積し、更に加速負荷試験(アニール)を行った時のCu拡散バリヤ性について検討したのでその評価結果について説明する。図11は加速負荷試験をおこなった時のウエハのMnOx膜を中心とする断面を示す模式図、図12は図11中の特定部分の元素の分析結果を示すグラフであり、図12(A)は図11中のMnOx膜の境界部分であるA部(MnOx膜の成膜直後)の元素の分布を示すグラフ、図12(B)は図11中のMnOx膜の境界部分の僅かに下方のSiOC膜中のB部(加速負荷試験後)の元素の分布を示すグラフである。
Claims (21)
- 凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する成膜方法において、
前記絶縁層の表面に親水化処理を施して親水性の表面にする親水化工程と、
前記親水化処理の行われた前記絶縁層の表面にMn含有原料を用いて成膜処理を施すことによりMnを含む薄膜を形成する薄膜形成工程と、
を有することを特徴とする成膜方法。 - 凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する成膜方法において、
前記絶縁層の表面に親水化処理を施して親水性の表面にする親水化工程と、
前記親水化処理の行われた前記絶縁層の表面にMn含有原料ガスを用いて成膜処理を施すことによりMnを含む薄膜を形成する薄膜形成工程と、
を有することを特徴とする成膜方法。 - 前記親水化処理は、前記絶縁層に対してプラズマ処理を施すことを特徴とする請求項1又は2記載の成膜方法。
- 前記プラズマ処理では、酸素含有ガス及び/又は希ガスが用いられることを特徴とする請求項3記載の成膜方法。
- 前記親水化処理は、紫外線と酸素含有ガスとを用いて前記絶縁層の表面の改質を行う紫外線オゾン処理を施すことを特徴とする請求項1又は2記載の成膜方法。
- 前記親水化処理は、前記絶縁層の表面に対してガスクラスターイオンビームを照射するGCIB処理を施すことを特徴とする請求項1又は2記載の成膜方法。
- 前記親水化処理は、前記絶縁層の表面に波長が425nmの可視光を照射する可視光照射処理を施すことを特徴とする請求項1又は2記載の成膜方法。
- 前記薄膜形成工程の前には、前記絶縁層を前記薄膜形成工程におけるプロセス温度よりも高い温度でアニール処理して前記絶縁層中の水分を抜くアニール工程を行うようにしたことを特徴とする請求項1乃至7のいずれか一項に記載の成膜方法。
- 前記薄膜形成工程の前には、前記絶縁層の表面に水及び/又は酸素含有ガスを付着させる付着処理を施す付着工程を行うようにしたことを特徴とする請求項1乃至8のいずれか一項に記載の成膜方法。
- 前記low-k膜は、比誘電率が4.1よりも小さい誘電率を有する材料であることを特徴とする請求項1乃至9のいずれか一項に記載の成膜方法。
- 前記low-k膜は、SiOC膜とSiO膜とSiOF膜とSiC膜とSiCOH膜とSiCN膜とポーラスシリカ膜とポーラスメチルシルセスキオキサン膜とポリアリレン膜とSiLK(登録商標)膜とフロロカーボン膜とよりなる群から選択される1つ以上の膜よりなることを特徴とする請求項1乃至10のいずれか一項に記載の成膜方法。
- 前記Mn含有原料は、Cp2 Mn[=Mn(C5 H5)2]、(MeCp)2 Mn[=Mn(CH3C5H4)2]、(EtCp)2 Mn[=Mn(C2H5C5H4)2]、(i-PrCp)2Mn[=Mn(C3H7C5H4)2]、MeCpMn(CO)3[=(CH3C5H4)Mn(CO)3]、(t-BuCp)2 Mn[=Mn(C4H9C5H4)2]、CH3Mn(CO)5 、Mn(DPM)3[= Mn(C11H19O2)3]、Mn(DMPD)(EtCp)[=Mn(C7H11C2H5C5H4)]、Mn(acac)2[=Mn(C5H7O2 )2 ]、Mn(DPM)2[=Mn(C11H19O2)2]、Mn(acac)3[=Mn(C5H7O2)3]、Mn(hfac)2[=Mn(C5HF6O2)3]、(( CH3)5Cp)2Mn[=Mn((CH3)5C5H4)2]、[Mn(iPr-AMD)2][=Mn(C3H7NC(CH3)NC3H7)2]、[ Mn(tBu-AMD)2][=Mn(C4H9NC(CH3)NC4H9)2]よりなる群から選択される1以上の材料であることを特徴とする 請求項1乃至11のいずれか一項に記載の成膜方法。
- 凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する前に行われる前処理を実施する前処理装置において、排気が可能になされた処理容器と、前記処理容器内に設けられて前記被処理体を載置するための載置台構造と、前記被処理体を加熱する加熱手段と、前記処理容器内へガスを導入するガス導入手段と、前記ガス導入手段へ、希ガスと水蒸気と酸素含有ガスとを供給することができるガス供給手段と、前記絶縁層の表面を親水化する親水化手段と、装置全体を制御して前記被処理体にアニール処理と付着処理と親水化処理とを施すようにする装置制御部と、を備えたことを特徴とする前処理装置。
- 前記親水化手段は、プラズマ発生手段と紫外線照射手段とGCIB処理手段と波長が425nmの可視光照射手段の内のいずれか1つの手段よりなることを特徴とする請求項13記載の前処理装置。
- 凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する処理システムにおいて、
内部に前記被処理体を搬送するための搬送機構を有する共通搬送室と、
前記共通搬送室に連結されて前記被処理体に対して親水化処理を施す親水化処理装置と、
前記共通搬送室に連結されて前記被処理体に対してMnを含む薄膜を形成する成膜処理を施す成膜処理装置と、
処理システム全体の動作を制御するシステム制御部と、
を備えたことを特徴とする処理システム。 - 前記親水化処理装置は、プラズマ処理装置と紫外線照射処理装置とガスクラスターイオンビーム照射処理装置と波長が425nmの可視光を照射する可視光照射処理装置の内のいずれか1つの処理装置であることを特徴とする請求項15記載の処理システム。
- 前記共通搬送室には、前記被処理体に対してアニール処理を施すアニール処理装置が連結されていることを特徴とする請求項15又は16記載の処理システム。
- 前記共通搬送室には、前記被処理体に対して水及び/又は酸素含有ガスを付着させる付着処理を施す付着処理装置が連結されていることを特徴とする請求項15乃至17のいずれか一項に記載の処理システム。
- 凹部を有するlow-k膜からなる絶縁層が表面に形成された被処理体にMnを含む薄膜を形成する処理システムにおいて、内部に前記被処理体を搬送するための搬送機構を有する共通搬送室と、前記共通搬送室に連結されて請求項13又は14に記載の前処理装置と、前記共通搬送室に連結されて前記被処理体に対してMnを含む薄膜を形成する成膜処理を施す成膜処理装置と、処理システム全体の動作を制御するシステム制御部と、を備えたことを特徴とする処理システム。
- 請求項1乃至12のいずれか一項に記載の成膜方法によって形成された膜構造を有することを特徴とする半導体装置。
- 請求項1乃至12のいずれか一項に記載の成膜方法によって形成された膜構造を有する半導体装置を備えることを特徴とする電子機器。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011114960A1 (ja) * | 2010-03-16 | 2011-09-22 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
JP2013055317A (ja) * | 2011-08-05 | 2013-03-21 | Tokyo Electron Ltd | 半導体装置の製造方法 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5307072B2 (ja) * | 2009-06-17 | 2013-10-02 | 東京エレクトロン株式会社 | 金属酸化物膜の形成方法及び成膜装置 |
JP5507909B2 (ja) * | 2009-07-14 | 2014-05-28 | 東京エレクトロン株式会社 | 成膜方法 |
JP6117588B2 (ja) * | 2012-12-12 | 2017-04-19 | 東京エレクトロン株式会社 | Cu配線の形成方法 |
US8603913B1 (en) * | 2012-12-20 | 2013-12-10 | Lam Research Corporation | Porous dielectrics K value restoration by thermal treatment and or solvent treatment |
JP6601257B2 (ja) * | 2016-02-19 | 2019-11-06 | 東京エレクトロン株式会社 | 基板処理方法 |
DE102016109713A1 (de) * | 2016-05-25 | 2017-11-30 | Infineon Technologies Ag | Verfahren zum Bilden eines Halbleiterbauelements und Halbleiterbauelement |
KR102616489B1 (ko) | 2016-10-11 | 2023-12-20 | 삼성전자주식회사 | 반도체 장치 제조 방법 |
JP6336022B1 (ja) * | 2016-12-19 | 2018-06-06 | 株式会社荏原製作所 | めっき装置、めっき方法、及びコンピュータ読み取り可能な記録媒体 |
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JP7157596B2 (ja) * | 2018-08-30 | 2022-10-20 | 株式会社Screenホールディングス | ゲート絶縁膜の形成方法および熱処理方法 |
CN112313777A (zh) | 2018-10-15 | 2021-02-02 | 玛特森技术公司 | 用于选择性亲水表面处理的臭氧 |
CN112864089A (zh) * | 2019-11-27 | 2021-05-28 | 长鑫存储技术有限公司 | 半导体结构和互连结构的制备方法 |
EP4288999A1 (en) | 2021-02-08 | 2023-12-13 | MacDermid Enthone Inc. | Method and wet chemical compositions for diffusion barrier formation |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11297829A (ja) * | 1998-04-15 | 1999-10-29 | Nec Corp | 半導体装置及びその製造方法 |
JP2002026121A (ja) * | 2000-06-30 | 2002-01-25 | Tokyo Electron Ltd | 半導体装置およびその製造方法、絶縁膜の形成方法 |
JP2002118112A (ja) * | 2000-10-05 | 2002-04-19 | Hitachi Ltd | 埋め込み配線構造を有する半導体装置の製法 |
JP2002370059A (ja) * | 2001-03-13 | 2002-12-24 | Tokyo Electron Ltd | 膜形成方法及び膜形成装置 |
JP2003309170A (ja) * | 2002-02-14 | 2003-10-31 | Nec Electronics Corp | 半導体装置及びその製造方法 |
JP2003338540A (ja) * | 2002-05-20 | 2003-11-28 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
JP2004343087A (ja) * | 2003-04-23 | 2004-12-02 | Tokyo Electron Ltd | 層間絶縁膜の表面改質方法及び表面改質装置 |
JP2005167081A (ja) * | 2003-12-04 | 2005-06-23 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2007273848A (ja) * | 2006-03-31 | 2007-10-18 | Toshiba Corp | 半導体装置の製造方法 |
JP2008013848A (ja) * | 2006-06-08 | 2008-01-24 | Tokyo Electron Ltd | 成膜装置及び成膜方法 |
JP2008502150A (ja) * | 2004-06-03 | 2008-01-24 | エピオン コーポレーション | 改善された二重ダマシン集積構造およびその製造方法 |
JP2008300568A (ja) * | 2007-05-30 | 2008-12-11 | Tokyo Electron Ltd | 半導体装置の製造方法、半導体製造装置及び記憶媒体 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5900103A (en) * | 1994-04-20 | 1999-05-04 | Tokyo Electron Limited | Plasma treatment method and apparatus |
JPH09251935A (ja) * | 1996-03-18 | 1997-09-22 | Applied Materials Inc | プラズマ点火装置、プラズマを用いる半導体製造装置及び半導体装置のプラズマ点火方法 |
US5855681A (en) * | 1996-11-18 | 1999-01-05 | Applied Materials, Inc. | Ultra high throughput wafer vacuum processing system |
KR100897771B1 (ko) | 2001-03-13 | 2009-05-15 | 도쿄엘렉트론가부시키가이샤 | 막형성방법 및 막형성장치 |
US20030155657A1 (en) | 2002-02-14 | 2003-08-21 | Nec Electronics Corporation | Manufacturing method of semiconductor device |
JP3495033B1 (ja) | 2002-09-19 | 2004-02-09 | 東京エレクトロン株式会社 | 無電解メッキ装置、および無電解メッキ方法 |
JP4478038B2 (ja) | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
US20070026642A1 (en) | 2004-04-20 | 2007-02-01 | Shingo Hishiya | Surface modification method and surface modification apparatus for interlayer insulating film |
CN101466864A (zh) * | 2006-06-08 | 2009-06-24 | 东京毅力科创株式会社 | 成膜装置、成膜方法、计算机程序和存储介质 |
JP2009016782A (ja) | 2007-06-04 | 2009-01-22 | Tokyo Electron Ltd | 成膜方法及び成膜装置 |
-
2009
- 2009-06-16 JP JP2009142963A patent/JP5522979B2/ja not_active Expired - Fee Related
-
2010
- 2010-06-15 TW TW099119470A patent/TW201118949A/zh unknown
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Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11297829A (ja) * | 1998-04-15 | 1999-10-29 | Nec Corp | 半導体装置及びその製造方法 |
JP2002026121A (ja) * | 2000-06-30 | 2002-01-25 | Tokyo Electron Ltd | 半導体装置およびその製造方法、絶縁膜の形成方法 |
JP2002118112A (ja) * | 2000-10-05 | 2002-04-19 | Hitachi Ltd | 埋め込み配線構造を有する半導体装置の製法 |
JP2002370059A (ja) * | 2001-03-13 | 2002-12-24 | Tokyo Electron Ltd | 膜形成方法及び膜形成装置 |
JP2003309170A (ja) * | 2002-02-14 | 2003-10-31 | Nec Electronics Corp | 半導体装置及びその製造方法 |
JP2003338540A (ja) * | 2002-05-20 | 2003-11-28 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
JP2004343087A (ja) * | 2003-04-23 | 2004-12-02 | Tokyo Electron Ltd | 層間絶縁膜の表面改質方法及び表面改質装置 |
JP2005167081A (ja) * | 2003-12-04 | 2005-06-23 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2008502150A (ja) * | 2004-06-03 | 2008-01-24 | エピオン コーポレーション | 改善された二重ダマシン集積構造およびその製造方法 |
JP2007273848A (ja) * | 2006-03-31 | 2007-10-18 | Toshiba Corp | 半導体装置の製造方法 |
JP2008013848A (ja) * | 2006-06-08 | 2008-01-24 | Tokyo Electron Ltd | 成膜装置及び成膜方法 |
JP2008300568A (ja) * | 2007-05-30 | 2008-12-11 | Tokyo Electron Ltd | 半導体装置の製造方法、半導体製造装置及び記憶媒体 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011114960A1 (ja) * | 2010-03-16 | 2011-09-22 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
JP2013055317A (ja) * | 2011-08-05 | 2013-03-21 | Tokyo Electron Ltd | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
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KR20120025543A (ko) | 2012-03-15 |
US8865590B2 (en) | 2014-10-21 |
US20120135612A1 (en) | 2012-05-31 |
KR101399814B1 (ko) | 2014-05-27 |
JP5522979B2 (ja) | 2014-06-18 |
TW201118949A (en) | 2011-06-01 |
CN102460653A (zh) | 2012-05-16 |
JP2011003569A (ja) | 2011-01-06 |
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