WO2011046980A3 - Architecture for adjusting natural frequency in resonant clock distribution networks - Google Patents
Architecture for adjusting natural frequency in resonant clock distribution networks Download PDFInfo
- Publication number
- WO2011046980A3 WO2011046980A3 PCT/US2010/052396 US2010052396W WO2011046980A3 WO 2011046980 A3 WO2011046980 A3 WO 2011046980A3 US 2010052396 W US2010052396 W US 2010052396W WO 2011046980 A3 WO2011046980 A3 WO 2011046980A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- architecture
- clock distribution
- distribution networks
- resonant clock
- natural frequency
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
- H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
- H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
Abstract
An inductor architecture for resonant clock distribution networks is proposed. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture is primarily targeted at the design of resonant clock distribution networks with integrated inductors and exhibits relatively low area overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US25083009P | 2009-10-12 | 2009-10-12 | |
US61/250,830 | 2009-10-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2011046980A2 WO2011046980A2 (en) | 2011-04-21 |
WO2011046980A3 true WO2011046980A3 (en) | 2011-09-15 |
Family
ID=43854365
Family Applications (8)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2010/052401 WO2011046984A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for single-stepping in resonant clock distribution networks |
PCT/US2010/052405 WO2011046987A2 (en) | 2009-10-12 | 2010-10-12 | Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networks |
PCT/US2010/052402 WO2011046985A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for operating resonant clock network in conventional mode |
PCT/US2010/052395 WO2011046979A2 (en) | 2009-10-12 | 2010-10-12 | Method for selecting natural frequency in resonant clock distribution networks with no inductor overhead |
PCT/US2010/052396 WO2011046980A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for adjusting natural frequency in resonant clock distribution networks |
PCT/US2010/052393 WO2011046977A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for controlling clock characteristics |
PCT/US2010/052397 WO2011046981A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for frequency-scaled operation in resonant clock distribution networks |
PCT/US2010/052390 WO2011046974A2 (en) | 2009-10-12 | 2010-10-12 | Resonant clock distribution network architecture with programmable drivers |
Family Applications Before (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2010/052401 WO2011046984A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for single-stepping in resonant clock distribution networks |
PCT/US2010/052405 WO2011046987A2 (en) | 2009-10-12 | 2010-10-12 | Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networks |
PCT/US2010/052402 WO2011046985A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for operating resonant clock network in conventional mode |
PCT/US2010/052395 WO2011046979A2 (en) | 2009-10-12 | 2010-10-12 | Method for selecting natural frequency in resonant clock distribution networks with no inductor overhead |
Family Applications After (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2010/052393 WO2011046977A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for controlling clock characteristics |
PCT/US2010/052397 WO2011046981A2 (en) | 2009-10-12 | 2010-10-12 | Architecture for frequency-scaled operation in resonant clock distribution networks |
PCT/US2010/052390 WO2011046974A2 (en) | 2009-10-12 | 2010-10-12 | Resonant clock distribution network architecture with programmable drivers |
Country Status (4)
Country | Link |
---|---|
US (12) | US8362811B2 (en) |
JP (4) | JP2013507888A (en) |
KR (4) | KR20120093954A (en) |
WO (8) | WO2011046984A2 (en) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7973565B2 (en) * | 2007-05-23 | 2011-07-05 | Cyclos Semiconductor, Inc. | Resonant clock and interconnect architecture for digital devices with multiple clock networks |
WO2011046984A2 (en) * | 2009-10-12 | 2011-04-21 | Cyclos Semiconductor Inc. | Architecture for single-stepping in resonant clock distribution networks |
US8181140B2 (en) * | 2009-11-09 | 2012-05-15 | Xilinx, Inc. | T-coil network design for improved bandwidth and electrostatic discharge immunity |
US8739100B2 (en) * | 2011-06-29 | 2014-05-27 | The Regents Of The University Of California | Distributed LC resonant tanks clock tree synthesis |
US8482315B2 (en) | 2011-08-23 | 2013-07-09 | Apple Inc. | One-of-n N-nary logic implementation of a storage cell |
US8729975B2 (en) | 2011-08-23 | 2014-05-20 | International Business Machines Corporation | Implementing differential resonant clock with DC blocking capacitor |
US8836366B2 (en) | 2011-10-07 | 2014-09-16 | Apple Inc. | Method for testing integrated circuits with hysteresis |
US8482333B2 (en) | 2011-10-17 | 2013-07-09 | Apple Inc. | Reduced voltage swing clock distribution |
EP2791753B1 (en) * | 2011-12-14 | 2017-10-04 | Intel Corporation | Multi-supply sequential logic unit |
WO2013097092A1 (en) * | 2011-12-27 | 2013-07-04 | 中兴通讯股份有限公司 | Global synchronization method and system based on packet switching system |
US8847652B2 (en) * | 2012-07-26 | 2014-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reconfigurable and auto-reconfigurable resonant clock |
WO2014025110A1 (en) * | 2012-08-09 | 2014-02-13 | 서울대학교 산학협력단 | Apparatus for controlling power devices and method for controlling power devices using same |
US8742817B2 (en) * | 2012-08-31 | 2014-06-03 | Advanced Micro Devices, Inc. | Controlling impedance of a switch using high impedance voltage sources to provide more efficient clocking |
US8854100B2 (en) | 2012-08-31 | 2014-10-07 | Advanced Micro Devices, Inc. | Clock driver for frequency-scalable systems |
US8975936B2 (en) | 2012-08-31 | 2015-03-10 | Advanced Micro Devices, Inc. | Constraining clock skew in a resonant clocked system |
US8836403B2 (en) | 2012-08-31 | 2014-09-16 | Advanced Micro Devices, Inc. | Programmable clock driver |
US8941432B2 (en) * | 2012-08-31 | 2015-01-27 | Advanced Micro Devices, Inc. | Transitioning between resonant clocking mode and conventional clocking mode |
US9312813B2 (en) | 2012-12-18 | 2016-04-12 | Continental Automotive Systems, Inc. | Instrument panel cluster |
US8736342B1 (en) * | 2012-12-19 | 2014-05-27 | International Business Machines Corporation | Changing resonant clock modes |
US8704576B1 (en) * | 2013-02-05 | 2014-04-22 | International Business Machines Corporation | Variable resistance switch for wide bandwidth resonant global clock distribution |
US9054682B2 (en) * | 2013-02-05 | 2015-06-09 | International Business Machines Corporation | Wide bandwidth resonant global clock distribution |
US9058130B2 (en) * | 2013-02-05 | 2015-06-16 | International Business Machines Corporation | Tunable sector buffer for wide bandwidth resonant global clock distribution |
US8887118B2 (en) * | 2013-02-22 | 2014-11-11 | International Business Machines Corporation | Setting switch size and transition pattern in a resonant clock distribution system |
US20150212152A1 (en) * | 2014-01-24 | 2015-07-30 | Texas Instruments Incorporated | Testing of integrated circuits during at-speed mode of operation |
US9270289B2 (en) | 2014-02-13 | 2016-02-23 | Fujitsu Limited | Monolithic signal generation for injection locking |
US9773079B2 (en) | 2014-04-29 | 2017-09-26 | Drexel University | Methods and computer-readable media for synthesizing a multi-corner mesh-based clock distribution network for multi-voltage domain and clock meshes and integrated circuits |
US9276563B2 (en) | 2014-06-13 | 2016-03-01 | International Business Machines Corporation | Clock buffers with pulse drive capability for power efficiency |
US9429982B2 (en) * | 2014-09-27 | 2016-08-30 | Qualcomm Incorporated | Configurable last level clock driver for improved energy efficiency of a resonant clock |
US9595943B2 (en) | 2014-10-08 | 2017-03-14 | Globalfoundries Inc. | Implementing broadband resonator for resonant clock distribution |
US9490775B2 (en) | 2014-12-19 | 2016-11-08 | International Business Machines Corporation | Implementing adaptive control for optimization of pulsed resonant drivers |
US9612614B2 (en) | 2015-07-31 | 2017-04-04 | International Business Machines Corporation | Pulse-drive resonant clock with on-the-fly mode change |
US9634654B2 (en) | 2015-08-07 | 2017-04-25 | International Business Machines Corporation | Sequenced pulse-width adjustment in a resonant clocking circuit |
US9568548B1 (en) | 2015-10-14 | 2017-02-14 | International Business Machines Corporation | Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency stepping |
US9916409B2 (en) | 2015-12-08 | 2018-03-13 | International Business Machines Corporation | Generating a layout for an integrated circuit |
US9735793B2 (en) | 2015-12-08 | 2017-08-15 | Nxp Usa, Inc. | Low-power clock repeaters and injection locking protection for high-frequency clock distributions |
CN106680887A (en) * | 2016-12-30 | 2017-05-17 | 佛山亚图信息技术有限公司 | Light and infrared integrated induction device |
US10454455B2 (en) | 2017-09-25 | 2019-10-22 | Rezonent Corporation | Reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies |
US11023631B2 (en) | 2017-09-25 | 2021-06-01 | Rezonent Corporation | Reduced-power dynamic data circuits with wide-band energy recovery |
US10910946B2 (en) * | 2018-09-27 | 2021-02-02 | Intel Corporation | Self-tuning zero current detection circuit |
CA3080559A1 (en) | 2019-05-13 | 2020-11-13 | Wonderland Switzerland Ag | Infant car seat |
US11579649B1 (en) | 2021-12-30 | 2023-02-14 | Analog Devices, Inc. | Apparatus and methods for clock duty cycle correction and deskew |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5734285A (en) * | 1992-12-19 | 1998-03-31 | Harvey; Geoffrey P. | Electronic circuit utilizing resonance technique to drive clock inputs of function circuitry for saving power |
US6882182B1 (en) * | 2003-09-23 | 2005-04-19 | Xilinx, Inc. | Tunable clock distribution system for reducing power dissipation |
US20080150605A1 (en) * | 2006-12-01 | 2008-06-26 | The Regents Of The University Of Michigan | Clock Distribution Network Architecture with Clock Skew Management |
US20090027085A1 (en) * | 2007-05-23 | 2009-01-29 | Cyclos Semiconductor, Inc. | Resonant clock and interconnect architecture for digital devices with multiple clock networks |
Family Cites Families (108)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR860001485B1 (en) * | 1982-09-13 | 1986-09-26 | 산요덴기 가부시기가이샤 | Analog switch circuit |
JPS63246865A (en) | 1987-04-02 | 1988-10-13 | Oki Electric Ind Co Ltd | Cmos semiconductor device and manufacture thereof |
JPH02105910A (en) * | 1988-10-14 | 1990-04-18 | Hitachi Ltd | Logic integrated circuit |
JPH02294537A (en) * | 1989-05-10 | 1990-12-05 | Mitsubishi Electric Corp | Engine idling regulation |
US5036217A (en) | 1989-06-02 | 1991-07-30 | Motorola, Inc. | High-speed low-power flip-flop |
US5023480A (en) | 1990-01-04 | 1991-06-11 | Digital Equipment Corporation | Push-pull cascode logic |
IT1243692B (en) | 1990-07-27 | 1994-06-21 | St Microelectronics Srl | DEVICE FOR PILOTING A FLOATING CIRCUIT WITH A DIGITAL SIGNAL |
US5111072A (en) | 1990-08-29 | 1992-05-05 | Ncr Corporation | Sample-and-hold switch with low on resistance and reduced charge injection |
JP2695078B2 (en) * | 1991-06-10 | 1997-12-24 | 株式会社東芝 | Data processing device clock signal distribution method |
JPH0595266A (en) | 1991-09-30 | 1993-04-16 | Rohm Co Ltd | Transmission gate |
US5384493A (en) | 1991-10-03 | 1995-01-24 | Nec Corporation | Hi-speed and low-power flip-flop |
US5311071A (en) | 1991-10-21 | 1994-05-10 | Silicon Systems, Inc. | High speed threshold crossing detector with reset |
US5215188A (en) * | 1992-02-24 | 1993-06-01 | Empak, Inc. | Security package with a slidable locking mechanism |
WO1994002993A1 (en) | 1992-07-17 | 1994-02-03 | Massachusetts Institute Of Technology | Recovered energy logic circuits |
KR960016605B1 (en) | 1992-11-20 | 1996-12-16 | 마쯔시다 덴꼬 가부시끼가이샤 | Power supply |
US5430408A (en) | 1993-03-08 | 1995-07-04 | Texas Instruments Incorporated | Transmission gate circuit |
US8089323B2 (en) | 2006-08-05 | 2012-01-03 | Min Ming Tarng | Green technology: green circuit and device designs of green chip |
JPH07154228A (en) * | 1993-09-30 | 1995-06-16 | Nippon Telegr & Teleph Corp <Ntt> | Logic circuit device |
US5473571A (en) | 1993-09-30 | 1995-12-05 | Nippon Telegraph And Telephone Corporation | Data hold circuit |
GB9320246D0 (en) | 1993-10-01 | 1993-11-17 | Sgs Thomson Microelectronics | A driver circuit |
US5537067A (en) * | 1994-03-11 | 1996-07-16 | Texas Instruments Incorporated | Signal driver circuit operable to control signal rise and fall times |
US5559463A (en) * | 1994-04-18 | 1996-09-24 | Lucent Technologies Inc. | Low power clock circuit |
US5489866A (en) | 1994-04-19 | 1996-02-06 | Xilinx, Inc. | High speed and low noise margin schmitt trigger with controllable trip point |
US5473526A (en) * | 1994-04-22 | 1995-12-05 | University Of Southern California | System and method for power-efficient charging and discharging of a capacitive load from a single source |
JPH07321640A (en) | 1994-05-30 | 1995-12-08 | Nippon Telegr & Teleph Corp <Ntt> | Programmable logic circuit |
CA2151850A1 (en) | 1994-07-18 | 1996-01-19 | Thaddeus John Gabara | Hot-clock adiabatic gate using multiple clock signals with different phases |
US5504441A (en) | 1994-08-19 | 1996-04-02 | International Business Machines Corporation | Two-phase overlapping clocking technique for digital dynamic circuits |
US5517145A (en) * | 1994-10-31 | 1996-05-14 | International Business Machines Corporation | CMOS toggle flip-flop using adiabatic switching |
US5506528A (en) | 1994-10-31 | 1996-04-09 | International Business Machines Corporation | High speed off-chip CMOS receiver |
US5506520A (en) * | 1995-01-11 | 1996-04-09 | International Business Machines Corporation | Energy conserving clock pulse generating circuits |
US5508639A (en) | 1995-01-13 | 1996-04-16 | Texas Instruments Incorporated | CMOS clock drivers with inductive coupling |
US5526319A (en) | 1995-01-31 | 1996-06-11 | International Business Machines Corporation | Memory with adiabatically switched bit lines |
JP3313276B2 (en) | 1995-03-15 | 2002-08-12 | 株式会社東芝 | MOS gate circuit and power supply method thereof |
US5538346A (en) * | 1995-06-07 | 1996-07-23 | The Young Engineers, Inc. | Novel ball transfer unit |
US5559478A (en) | 1995-07-17 | 1996-09-24 | University Of Southern California | Highly efficient, complementary, resonant pulse generation |
JP3233557B2 (en) | 1995-07-21 | 2001-11-26 | シャープ株式会社 | Method and apparatus for measuring threshold characteristics of semiconductor integrated circuit |
US5649176A (en) | 1995-08-10 | 1997-07-15 | Virtual Machine Works, Inc. | Transition analysis and circuit resynthesis method and device for digital circuit modeling |
KR100466457B1 (en) | 1995-11-08 | 2005-06-16 | 마츠시타 덴끼 산교 가부시키가이샤 | Signal transmission circuit, signal reception circuit and signal transmission / reception circuit, signal transmission method, signal reception method, signal transmission / reception method, semiconductor integrated circuit and control method thereof |
US5760620A (en) | 1996-04-22 | 1998-06-02 | Quantum Effect Design, Inc. | CMOS limited-voltage-swing clock driver for reduced power driving high-frequency clocks |
JP3437719B2 (en) | 1996-07-24 | 2003-08-18 | 株式会社東芝 | Analog switch circuit |
JP3579205B2 (en) | 1996-08-06 | 2004-10-20 | 株式会社ルネサステクノロジ | Semiconductor storage device, semiconductor device, data processing device, and computer system |
US5896054A (en) | 1996-12-05 | 1999-04-20 | Motorola, Inc. | Clock driver |
US5838203A (en) | 1996-12-06 | 1998-11-17 | Intel Corporation | Method and apparatus for generating waveforms using adiabatic circuitry |
JP3241619B2 (en) | 1996-12-25 | 2001-12-25 | シャープ株式会社 | CMOS logic circuit |
US5841299A (en) | 1997-02-06 | 1998-11-24 | Intel Corporation | Method and apparatus for implementing an adiabatic logic family |
JP3258930B2 (en) | 1997-04-24 | 2002-02-18 | 東芝マイクロエレクトロニクス株式会社 | Transmission gate |
JPH118314A (en) * | 1997-04-25 | 1999-01-12 | Toshiba Corp | Method and device for optimizing tree depth of clock signal wiring |
US5872489A (en) | 1997-04-28 | 1999-02-16 | Rockwell Science Center, Llc | Integrated tunable inductance network and method |
JP3756285B2 (en) | 1997-05-09 | 2006-03-15 | シャープ株式会社 | CMOS logic circuit and driving method thereof |
US5986476A (en) * | 1997-08-08 | 1999-11-16 | Intel Corporation | Method and apparatus for implementing a dynamic adiabatic logic family |
US6242951B1 (en) | 1997-09-05 | 2001-06-05 | Shunji Nakata | Adiabatic charging logic circuit |
JPH1197627A (en) * | 1997-09-18 | 1999-04-09 | Hitachi Ltd | Semiconductor integrated circuit and electronic device using the same |
US6069495A (en) * | 1997-11-21 | 2000-05-30 | Vsli Technology, Inc. | High-speed logic embodied differential dynamic CMOS true single phase clock latches and flip-flops with single transistor clock latches |
US5999025A (en) | 1998-03-27 | 1999-12-07 | Xilinx, Inc. | Phase-locked loop architecture for a programmable logic device |
US6011441A (en) | 1998-04-27 | 2000-01-04 | International Business Machines Corporation | Clock distribution load buffer for an integrated circuit |
EP0953892A1 (en) | 1998-04-29 | 1999-11-03 | Lsi Logic Corporation | Method of providing clock signals to load circuits in an ASIC device |
FR2781065B1 (en) | 1998-07-10 | 2000-08-25 | St Microelectronics Sa | METHOD OF PLACING-ROUTING A GLOBAL CLOCK CIRCUIT ON AN INTEGRATED CIRCUIT, AND ASSOCIATED DEVICES |
KR100277903B1 (en) * | 1998-10-19 | 2001-01-15 | 김영환 | Micro processor having variable clock operation |
US6438422B1 (en) | 1998-10-28 | 2002-08-20 | Medtronic, Inc. | Power dissipation reduction in medical devices using adiabatic logic |
US6052019A (en) | 1998-10-29 | 2000-04-18 | Pericom Semiconductor Corp. | Undershoot-isolating MOS bus switch |
JP3753355B2 (en) | 1998-11-10 | 2006-03-08 | 株式会社ルネサステクノロジ | Semiconductor device |
US6538346B2 (en) | 1998-11-25 | 2003-03-25 | Stmicroelectronics S.R.L. | System for driving a reactive load |
US6323701B1 (en) * | 1998-12-28 | 2001-11-27 | Cypress Semiconductor Corporation | Scheme for reducing leakage current in an input buffer |
JP4030213B2 (en) | 1999-02-22 | 2008-01-09 | 株式会社ルネサステクノロジ | Semiconductor circuit device |
US6177819B1 (en) | 1999-04-01 | 2001-01-23 | Xilinx, Inc. | Integrated circuit driver with adjustable trip point |
US6160422A (en) | 1999-05-03 | 2000-12-12 | Silicon Integrated Systems Corp. | Power saving clock buffer |
US7005893B1 (en) * | 1999-07-19 | 2006-02-28 | University Of Southern California | High-performance clock-powered logic |
US6278308B1 (en) | 1999-10-08 | 2001-08-21 | Advanced Micro Devices, Inc. | Low-power flip-flop circuit employing an asymmetric differential stage |
US6331797B1 (en) | 1999-11-23 | 2001-12-18 | Philips Electronics North America Corporation | Voltage translator circuit |
US6445210B2 (en) | 2000-02-10 | 2002-09-03 | Matsushita Electric Industrial Co., Ltd. | Level shifter |
US6448816B1 (en) | 2000-07-11 | 2002-09-10 | Piconetics, Inc. | Resonant logic and the implementation of low power digital integrated circuits |
KR100403810B1 (en) * | 2001-03-09 | 2003-10-30 | 삼성전자주식회사 | Hybrid power supply circuit and method for charging/discharging a logic circuit using the same |
US6630855B2 (en) | 2001-03-29 | 2003-10-07 | Intel Corporation | Clock distribution phase alignment technique |
US6608512B2 (en) | 2001-12-28 | 2003-08-19 | Honeywell International Inc. | Full rail drive enhancement to differential SEU hardening circuit |
WO2003061109A1 (en) | 2002-01-11 | 2003-07-24 | The Trustees Of Columbia University In The City Of New York | Resonant clock distribution for very large scale integrated circuits |
DE10211609B4 (en) | 2002-03-12 | 2009-01-08 | Hüttinger Elektronik GmbH & Co. KG | Method and power amplifier for generating sinusoidal high-frequency signals for operating a load |
US6879190B2 (en) * | 2002-04-04 | 2005-04-12 | The Regents Of The University Of Michigan | Low-power driver with energy recovery |
US6742132B2 (en) | 2002-04-04 | 2004-05-25 | The Regents Of The University Of Michigan | Method and apparatus for generating a clock signal having a driven oscillator circuit formed with energy storage characteristics of a memory storage device |
US6777992B2 (en) | 2002-04-04 | 2004-08-17 | The Regents Of The University Of Michigan | Low-power CMOS flip-flop |
US7015765B2 (en) | 2003-01-13 | 2006-03-21 | The Trustees Of Columbia In The City Of New York | Resonant clock distribution for very large scale integrated circuits |
JP2004348573A (en) * | 2003-05-23 | 2004-12-09 | Renesas Technology Corp | Clock generation circuit and system including it |
US6856171B1 (en) * | 2003-06-11 | 2005-02-15 | Lattice Semiconductor Corporation | Synchronization of programmable multiplexers and demultiplexers |
US7237217B2 (en) | 2003-11-24 | 2007-06-26 | International Business Machines Corporation | Resonant tree driven clock distribution grid |
US7365614B2 (en) | 2004-03-22 | 2008-04-29 | Mobius Microsystems, Inc. | Integrated clock generator and timing/frequency reference |
TWI351817B (en) | 2004-03-22 | 2011-11-01 | Integrated Device Tech | Transconductance and current modulation for resona |
US7307486B2 (en) | 2004-03-22 | 2007-12-11 | Mobius Microsystems, Inc. | Low-latency start-up for a monolithic clock generator and timing/frequency reference |
ATE443375T1 (en) * | 2004-06-15 | 2009-10-15 | Univ Michigan | BOOST LOGIC FOR ENERGY RECOVERY |
JP4536449B2 (en) | 2004-07-29 | 2010-09-01 | 富士通株式会社 | Driver circuit, semiconductor device, and electronic device |
US7215188B2 (en) | 2005-02-25 | 2007-05-08 | Freescale Semiconductor, Inc. | Integrated circuit having a low power mode and method therefor |
US7415645B2 (en) | 2005-07-28 | 2008-08-19 | International Business Machines Corporation | Method and apparatus for soft-error immune and self-correcting latches |
JP4299283B2 (en) | 2005-09-16 | 2009-07-22 | 富士通株式会社 | Clock signal generation and distribution device |
US7301385B2 (en) | 2005-09-22 | 2007-11-27 | Sony Computer Entertainment Inc. | Methods and apparatus for managing clock skew |
KR100834400B1 (en) | 2005-09-28 | 2008-06-04 | 주식회사 하이닉스반도체 | DLL for increasing frequency of DRAM and output driver of the DLL |
TWI298579B (en) | 2005-10-04 | 2008-07-01 | Univ Nat Taiwan Science Tech | An dual-band voltage controlled oscillator utilizing switched feedback technology |
US7622977B2 (en) | 2005-10-27 | 2009-11-24 | The Regents Of The University Of Michigan | Ramped clock digital storage control |
US7489176B2 (en) | 2006-04-28 | 2009-02-10 | Rambus Inc. | Clock distribution circuit |
JP2007300290A (en) | 2006-04-28 | 2007-11-15 | Nec Electronics Corp | Clock distribution circuit |
ITMI20061272A1 (en) | 2006-06-30 | 2008-01-01 | St Microelectronics Srl | DYNAMIC TUNING METHOD OF THE TIMING FREQUENCY (CLOCK) IN A OSCILLATOR AND ITS OSCILLATOR SYSTEM. |
KR100807115B1 (en) | 2006-09-29 | 2008-02-27 | 주식회사 하이닉스반도체 | Semiconductor memory device and driving method thereof |
NL1032933C2 (en) * | 2006-11-23 | 2008-05-26 | Peinemann Equipment Bv | Gripper for objects. |
JP4229177B2 (en) | 2006-11-30 | 2009-02-25 | ミツミ電機株式会社 | Multi-phase DC-DC converter |
JP4952234B2 (en) | 2006-12-20 | 2012-06-13 | ソニー株式会社 | Clock supply device |
JP2009022029A (en) * | 2008-09-01 | 2009-01-29 | Renesas Technology Corp | Semiconductor integrated circuit device |
JP4966352B2 (en) * | 2009-09-25 | 2012-07-04 | シャープ株式会社 | Optical pointing device and electronic device |
WO2011046984A2 (en) | 2009-10-12 | 2011-04-21 | Cyclos Semiconductor Inc. | Architecture for single-stepping in resonant clock distribution networks |
US8350632B1 (en) | 2009-11-05 | 2013-01-08 | National Semiconductor Corporation | Energy-conserving driver for reactive loads |
JP2011101266A (en) * | 2009-11-06 | 2011-05-19 | Elpida Memory Inc | Semiconductor device and information processing system |
US8860425B2 (en) | 2012-03-02 | 2014-10-14 | International Business Machines Corporation | Defect detection on characteristically capacitive circuit nodes |
-
2010
- 2010-10-12 WO PCT/US2010/052401 patent/WO2011046984A2/en active Application Filing
- 2010-10-12 US US12/903,172 patent/US8362811B2/en active Active
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- 2010-10-12 WO PCT/US2010/052393 patent/WO2011046977A2/en active Application Filing
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- 2010-10-12 WO PCT/US2010/052397 patent/WO2011046981A2/en active Application Filing
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-
2012
- 2012-12-10 US US13/710,362 patent/US20130194018A1/en not_active Abandoned
- 2012-12-13 US US13/714,369 patent/US9041451B2/en not_active Expired - Fee Related
- 2012-12-13 US US13/714,371 patent/US20140002175A1/en not_active Abandoned
- 2012-12-13 US US13/714,370 patent/US20130328608A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5734285A (en) * | 1992-12-19 | 1998-03-31 | Harvey; Geoffrey P. | Electronic circuit utilizing resonance technique to drive clock inputs of function circuitry for saving power |
US6882182B1 (en) * | 2003-09-23 | 2005-04-19 | Xilinx, Inc. | Tunable clock distribution system for reducing power dissipation |
US20080150605A1 (en) * | 2006-12-01 | 2008-06-26 | The Regents Of The University Of Michigan | Clock Distribution Network Architecture with Clock Skew Management |
US20090027085A1 (en) * | 2007-05-23 | 2009-01-29 | Cyclos Semiconductor, Inc. | Resonant clock and interconnect architecture for digital devices with multiple clock networks |
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