WO2011100647A3 - Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing - Google Patents

Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing Download PDF

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Publication number
WO2011100647A3
WO2011100647A3 PCT/US2011/024670 US2011024670W WO2011100647A3 WO 2011100647 A3 WO2011100647 A3 WO 2011100647A3 US 2011024670 W US2011024670 W US 2011024670W WO 2011100647 A3 WO2011100647 A3 WO 2011100647A3
Authority
WO
WIPO (PCT)
Prior art keywords
fabrication
double
device manufacturing
photovoltaic cell
semiconductor substrates
Prior art date
Application number
PCT/US2011/024670
Other languages
French (fr)
Other versions
WO2011100647A2 (en
Inventor
Mehrdad M. Moslehi
Karl-Josef Kramer
David Xuan-Qi Wang
Pawan Kapur
Somnath Nag
George Kamian
Jay Ashjaee
Takao Yonehara
Original Assignee
Solexel, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Solexel, Inc. filed Critical Solexel, Inc.
Priority to CN201180018589.2A priority Critical patent/CN102844883B/en
Priority to EP20110742933 priority patent/EP2534700A4/en
Publication of WO2011100647A2 publication Critical patent/WO2011100647A2/en
Publication of WO2011100647A3 publication Critical patent/WO2011100647A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02513Microstructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re -usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.
PCT/US2011/024670 2010-02-12 2011-02-12 Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing WO2011100647A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201180018589.2A CN102844883B (en) 2010-02-12 2011-02-12 For the manufacture of the two-sided reusable template of the Semiconductor substrate of photocell and microelectronic component
EP20110742933 EP2534700A4 (en) 2010-02-12 2011-02-12 Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US30434010P 2010-02-12 2010-02-12
US61/304,340 2010-02-12

Publications (2)

Publication Number Publication Date
WO2011100647A2 WO2011100647A2 (en) 2011-08-18
WO2011100647A3 true WO2011100647A3 (en) 2012-01-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/024670 WO2011100647A2 (en) 2010-02-12 2011-02-12 Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing

Country Status (4)

Country Link
US (2) US8241940B2 (en)
EP (1) EP2534700A4 (en)
CN (1) CN102844883B (en)
WO (1) WO2011100647A2 (en)

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US8294026B2 (en) 2008-11-13 2012-10-23 Solexel, Inc. High-efficiency thin-film solar cells
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US8906218B2 (en) 2010-05-05 2014-12-09 Solexel, Inc. Apparatus and methods for uniformly forming porous semiconductor on a substrate
US9318644B2 (en) 2009-05-05 2016-04-19 Solexel, Inc. Ion implantation and annealing for thin film crystalline solar cells
WO2011100647A2 (en) 2010-02-12 2011-08-18 Solexel, Inc. Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing
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US9748414B2 (en) 2011-05-20 2017-08-29 Arthur R. Zingher Self-activated front surface bias for a solar cell
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US20110256654A1 (en) 2011-10-20
US9401276B2 (en) 2016-07-26
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