WO2012075303A3 - A system and method for analyzing an electronics device including a logic analyzer - Google Patents
A system and method for analyzing an electronics device including a logic analyzer Download PDFInfo
- Publication number
- WO2012075303A3 WO2012075303A3 PCT/US2011/062910 US2011062910W WO2012075303A3 WO 2012075303 A3 WO2012075303 A3 WO 2012075303A3 US 2011062910 W US2011062910 W US 2011062910W WO 2012075303 A3 WO2012075303 A3 WO 2012075303A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- logic analyzer
- under test
- computing device
- device under
- embedded logic
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3177—Testing of logic operation, e.g. by logic analysers
Abstract
A system for testing or debugging a device under test having an embedded logic analyzer. In one embodiment, the system includes software stored in non-transitory memory for testing a device under test having an embedded logic analyzer, the software program product having instructions which, when executed by a computing device associated with the device under test cause the computing device to reconstruct signals of interest in the device under test based at least in part upon signals captured by the embedded logic analyzer during the test or debug session, and cause the computing device to display the reconstructed signals of interest to a user of the computing device.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US41884910P | 2010-12-01 | 2010-12-01 | |
US61/418,849 | 2010-12-01 | ||
US13/308,286 US9170901B2 (en) | 2009-08-18 | 2011-11-30 | System and method for analyzing an electronics device including a logic analyzer |
US13/308,286 | 2011-11-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2012075303A2 WO2012075303A2 (en) | 2012-06-07 |
WO2012075303A3 true WO2012075303A3 (en) | 2012-08-02 |
Family
ID=46172575
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2011/062910 WO2012075303A2 (en) | 2010-12-01 | 2011-12-01 | A system and method for analyzing an electronics device including a logic analyzer |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2012075303A2 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5881217A (en) * | 1996-11-27 | 1999-03-09 | Hewlett-Packard Company | Input comparison circuitry and method for a programmable state machine |
US6389558B1 (en) * | 1996-10-28 | 2002-05-14 | Altera Corporation | Embedded logic analyzer for a programmable logic device |
US20030078752A1 (en) * | 1999-05-14 | 2003-04-24 | Chakravarthy K. Allamsetty | System and method for testing a circuit implemented on a programmable logic device |
-
2011
- 2011-12-01 WO PCT/US2011/062910 patent/WO2012075303A2/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6389558B1 (en) * | 1996-10-28 | 2002-05-14 | Altera Corporation | Embedded logic analyzer for a programmable logic device |
US5881217A (en) * | 1996-11-27 | 1999-03-09 | Hewlett-Packard Company | Input comparison circuitry and method for a programmable state machine |
US20030078752A1 (en) * | 1999-05-14 | 2003-04-24 | Chakravarthy K. Allamsetty | System and method for testing a circuit implemented on a programmable logic device |
Also Published As
Publication number | Publication date |
---|---|
WO2012075303A2 (en) | 2012-06-07 |
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