WO2015077929A1 - Optical value full adder and optical value full adding method and device - Google Patents

Optical value full adder and optical value full adding method and device Download PDF

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Publication number
WO2015077929A1
WO2015077929A1 PCT/CN2013/087903 CN2013087903W WO2015077929A1 WO 2015077929 A1 WO2015077929 A1 WO 2015077929A1 CN 2013087903 W CN2013087903 W CN 2013087903W WO 2015077929 A1 WO2015077929 A1 WO 2015077929A1
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WIPO (PCT)
Prior art keywords
signal
optical
carry
low
full
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PCT/CN2013/087903
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French (fr)
Chinese (zh)
Inventor
曹彤彤
张俪耀
刘耀达
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2013/087903 priority Critical patent/WO2015077929A1/en
Priority to CN201380002719.2A priority patent/CN105051598B/en
Publication of WO2015077929A1 publication Critical patent/WO2015077929A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06EOPTICAL COMPUTING DEVICES; COMPUTING DEVICES USING OTHER RADIATIONS WITH SIMILAR PROPERTIES
    • G06E3/00Devices not provided for in group G06E1/00, e.g. for processing analogue or hybrid data
    • G06E3/001Analogue devices in which mathematical operations are carried out with the aid of optical or electro-optical elements
    • G06E3/005Analogue devices in which mathematical operations are carried out with the aid of optical or electro-optical elements using electro-optical or opto-electronic means
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/26Optical coupling means
    • G02B6/35Optical coupling means having switching means
    • G02B6/354Switching arrangements, i.e. number of input/output ports and interconnection types
    • G02B6/35442D constellations, i.e. with switching elements and switched beams located in a plane
    • G02B6/3546NxM switch, i.e. a regular array of switches elements of matrix type constellation
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/26Optical coupling means
    • G02B6/35Optical coupling means having switching means
    • G02B6/354Switching arrangements, i.e. number of input/output ports and interconnection types
    • G02B6/35442D constellations, i.e. with switching elements and switched beams located in a plane
    • G02B6/35481xN switch, i.e. one input and a selectable single output of N possible outputs
    • G02B6/35521x1 switch, e.g. on/off switch

Definitions

  • the present invention relates to the field of optical computing technologies, and in particular, to an optical value full adder, an optical value full adding method and device. Background technique
  • photonic-based devices Compared with electronic components, photonic-based devices tend to have high bandwidth, low power consumption, and high parallelism. Therefore, research on photonic-based computer systems and their basic meta-function devices has begun to break existing computer systems. The bottleneck of development. Adders play an extremely important role in electrical computing. In addition to adding input data, they are the basis for implementing multipliers, block converters, accumulators, counters, and more. Because of this, optical adders are also an important research component in optical computing systems.
  • the existing optical full adders mostly utilize nonlinear effects of materials, such as structures based on periodic polarization lithium niobate waveguides or structures based on semiconductor optical amplifiers.
  • Binary optical full adders based on these structures are often cascading from multiple basic all-optical switches based on nonlinear effects.
  • the binary optical full adder based on the nonlinear effect should utilize the nonlinear effect of the material, which requires a bundle of 4 strong pump light to be injected into the material during operation to realize the function of opening the light, which greatly increases the light source.
  • Embodiments of the present invention provide an optical numerical full adder, an optical value full adding method and device, which can make a device work without high-intensity pump light injection, a fabrication process and a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) process compatibility, device implementation difficulty and production cost reduction, as well as small delay, fast operation and low power consumption in the full-addition process.
  • CMOS complementary Metal Oxide Semiconductor
  • an optical value full adder comprising:
  • each of the at least two optical all-adding units comprising: an optical input terminal, a signal input terminal for inputting a signal to be added, and at least one low-position carry a signal input terminal, a signal output terminal for outputting an addition result, at least one high-position carry signal output terminal, at least one optical waveguide, and an optical switch based on an optical guiding logic;
  • each of the optical total adding units further includes: an optical beam splitter and a photo combiner.
  • the optical total adding unit specifically includes two signal input ends, wherein one signal input end is used for input
  • the first to-be-phased power-on signal is used to input a second to-be-phased power-on signal.
  • the first to-be-connected power-on signal and the second to-be-charged power-on signal are multi-bit binary numbers
  • Each of the optical total adding units is configured to perform phase separation on each of the first to-be-phased power-on signal and the second to-be-phased power-on signal and the low-position carry signal in order of number of bits from low to high. Add the sum result and the high carry signal.
  • the optical value full adder further includes: at least one photoelectric converter
  • Each of the optical total adding units includes one of the lower carry signal input terminals for inputting a lower carry electric signal, and one of the high carry signals output terminals for outputting a high carry optical signal; the at least two of the cascaded In the optical total adding unit, the high-order carry signal output end of any one of the optical full-adding units is connected to one end of a photoelectric converter, and the other end of the photoelectric converter and the lower end of the next-stage optical full-adding unit The carry signal input terminal is connected, and the photoelectric converter is configured to convert the output of the high carry signal output terminal into an electrical signal output to the lower carry signal input end of the next-stage optical full add unit.
  • Each of the optical total adding units includes two low-order carry inputs for inputting the first lower carry light signal and the second lower carry light signal, respectively for outputting the first high carry light signal and the second high position Two high carry outputs of the carry optical signal, the combination of the first low carry optical signal and the second low carry optical signal represent a low carry, the first high carry light signal and the second high carry light signal Combination means high carry;
  • optical total adding unit And outputting, by the optical total adding unit, the high-order carry output end of the first high-order carry light signal and the input first low-position carry light signal of the next stage of the at least two optical all-adding units
  • the lower carry input is connected, and the high carry output of the second higher carry optical signal is connected to the lower carry input of the input second lower carry optical signal of the next stage.
  • the optical switch is a micro ring resonator switch or a Mach-Zehnder interferometer MZI switch.
  • the optical structure in the beam splitter and optical switch is any one of silicon, a silicon SOI or a III-V compound on an insulating substrate.
  • an optical value addition method is provided, including:
  • the upper carry signal is output as a lower carry signal of the next addition calculation of the signal to be added.
  • the lower carry signal is an electrical signal
  • the high carry The signal is an optical signal
  • the high carry signal converted into an electric signal is output as a lower carry signal of the next addition calculation of the signal to be added.
  • the lower carry signal includes a first lower carry optical signal and a second lower carry optical signal
  • the high carry signal includes a first high carry light signal and a second High carry light signal
  • an optical value full adding device including:
  • a first acquiring unit configured to acquire the input to-be-added signal and a low-level carry signal
  • a control unit configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal, to control the input The direction of light in at least one of the optical waveguides;
  • a second obtaining unit configured to obtain an addition result and a high-order carry signal according to a condition of the output light; and a first output unit configured to use the high-order carry signal as a low-position carry of the next addition calculation of the to-be-added signal The signal is output.
  • the lower carry signal is an electrical signal
  • the high carry signal is an optical signal
  • the first output unit includes:
  • a conversion unit configured to convert the high carry signal into an electrical signal
  • a second output unit configured to use the high-order carry signal converted into an electrical signal as the to-be-added The lower carry signal of the next addition of the signal is output.
  • the lower carry signal includes a first lower carry optical signal and a second lower carry optical signal
  • the high carry signal includes a first high carry light signal and a second High carry light signal
  • the first output unit includes:
  • a third output unit configured to output the first high-order carry signal as a first lower-level carry optical signal of the next addition calculation of the to-be-added signal
  • a fourth output unit configured to output the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal
  • the combination of the first lower carry optical signal and the second lower carry optical signal represents a lower carry
  • the combination of the first higher carry optical signal and the second higher carry optical signal represents a higher carry.
  • FIG. 2 is a schematic structural view of an embodiment of an optical full adder of the present invention.
  • FIG. 3 is a schematic structural view of a full-addition unit in the binary optical full adder shown in FIG. 2;
  • FIG. 4 is a schematic structural view of a micro-ring resonator switch according to the present invention.
  • Figure 5 is a schematic view showing the optical path structure of the fully-added unit shown in Figure 3;
  • FIG. 6 is a schematic structural view of another embodiment of an optical full adder according to the present invention
  • FIG. 7 is a schematic structural view of a full adder unit in the optical full adder shown in FIG.
  • the optical value full adder of the present invention comprises: a plurality of optical full add units for cascading, each optical full add unit comprising: an optical input end, a signal input end for inputting a signal to be added, and at least one low carry signal input a signal output terminal for outputting an addition result, at least one high-position carry signal output terminal, a plurality of optical waveguides, and an optical switch based on optical guiding logic; and at least two optical total adding units for cascading, any one of optical The high carry signal output of the full add unit is connected to the lower carry signal input of the optical full add unit of the next stage.
  • Each of the optical total adding units may further include: an optical beam splitter and an optical combiner.
  • Each of the optical full adding units specifically includes two signal input terminals, one of which is used for inputting a first to-be-phased power-on signal, and the other of which is for inputting a second to-be-phased power-on signal.
  • optical value full adder of the present invention will be described in detail below in two specific embodiments.
  • FIG. 2 is a schematic view showing the structure of an embodiment of an optical full adder of the present invention.
  • the output high-level carry light signal of the first-stage full-addition unit is connected to the input low-level carry electric signal of the subsequent one-stage full-addition unit after photoelectric conversion.
  • the core of the multi-bit binary number full-add operation is a full-addition unit.
  • the full-addition unit of the present invention is based on optical steering logic.
  • the input includes two signals to be calculated and a low-position carry signal, and the output includes operations.
  • Figure 3 is a binary optical full adder shown in Figure 2.
  • the full-addition unit can realize the full-addition operation of the 1-bit binary number, and the truth table is as shown in Table 1.
  • the logic values of the input and output are represented by the level of the electrical signal or the intensity of the optical signal, where each signal has the following meaning:
  • ⁇ 1 represents two electrical signals to be calculated, the high and low levels of the signal in this embodiment respectively represent logic 1 and 0;
  • S 1 indicates the calculation result of the unit.
  • light or strong light
  • no light or weak light
  • Input light Input light source for this unit.
  • the input light source of the present invention does not need to be high intensity pump light, and may be an ordinary light source.
  • the operation principle of the full-addition unit shown in Fig. 3 is as follows: the electrical signal to be calculated and the low-position carry signal are connected to the light-guided logic switch in the optical path through a modulation structure, such as a Mach-Zehnder Interferometer (MZI). Switch, and the micro-ring resonator switch shown in Figure 4, the different inputs of the electrical signal can control the state of the switch to control the direction of the light wave in the optical path, and finally according to the presence or absence of light in the output (or strong light intensity) Weak) can be judged to obtain the operation result signal and the high-order carry signal, thereby realizing the full addition of the 1-bit binary number.
  • a modulation structure such as a Mach-Zehnder Interferometer (MZI).
  • MZI Mach-Zehnder Interferometer
  • Switch, and the micro-ring resonator switch shown in Figure 4 the different inputs of the electrical signal can control the state of the switch to control the direction of the light wave
  • FIG. 5 is a schematic diagram of the optical path structure of the fully-added unit shown in FIG. 3, including a plurality of optical waveguides, an optical beam splitter, an optical combiner, an optical switch, and a modulation structure thereof.
  • Modulation structure of microring 1 and signal to be calculated Connected, the modulation structure of the microring 2 and the microring 3 is connected to the signal to be calculated, and the modulation structure of the microring 4 and the microring 5 is connected to the lower carry signal C l4 .
  • the structure of the microring resonator optical switch is as shown in FIG. 4, and includes a microring resonator and an adjacent waveguide.
  • the microring resonator is coupled with the adjacent waveguide, and the light is input from the input end waveguide and the microring resonator is connected. Interactions occur to change the direction of the light wave.
  • the microring resonator When the microring resonator is in resonance, light will couple into the microring and output from the download; when the microring resonator is in a non-resonant state, light will be output directly from the through end without passing through the microring.
  • the resonant state of the microring is directly related to the effective refractive index of the microring. Therefore, the resonant state of the microring can be changed by changing the effective refractive index of the waveguide.
  • the methods used include thermo-optic effects, carrier dispersion effects, and the like.
  • the thermo-optic effect adjustment is to change the effective refractive index of the waveguide by heating or cooling the micro-ring waveguide, and the method of heating the electrode above the waveguide can be adopted;
  • the carrier dispersion effect is another common change of the effective refractive index of the silicon waveguide.
  • high-speed silicon-based electro-optical modulation is often used in such a manner that the applied carrier voltage is used to change the carrier concentration in the silicon waveguide to change the refractive index of the silicon material.
  • the function of the micro-ring optical switch can also be realized by the electro-optic effect of the three-five materials.
  • optical path structure diagram of the fully-added unit shown in FIG. 5 is only an example. According to the principle of the present invention, the other optical path structures used to implement the full-addition unit and the multi-bit numerical calculation full adder are within the scope of protection of the present invention.
  • the microring When passing through the microrings 2 and 3, the microring is in resonance. , Light is output from the download side. The microrings 4 and 5 are in a non-resonant state. When the light passes, the light passes directly from the through end. The final output terminal & no light (or weak light) indicates that the operation result of the bit is 0, and the high carry end G has light (or light). Strong) indicates that the post-level carry signal is 1. Therefore, the results shown in the truth table shown in Table 1 are obtained, and the function of adding 1-bit binary numbers is realized. A multi-bit binary number addition can be implemented by multiple 1-bit binary full-addition unit cascades.
  • the optical structure in the plurality of optical waveguides, optical beam splitters, optical combiners, and optical switches in the present invention is any one of silicon, a silicon SOI or a III-V compound on an insulating substrate.
  • an optical numerical full adder does not require high-intensity pump light injection during operation, and the fabrication process is compatible with a CMOS process, and the implementation difficulty and manufacturing cost of the device are reduced.
  • FIG. 6 is a schematic view showing the structure of another embodiment of an optical full adder of the present invention.
  • the carry signals are represented by optical signals, and the cascade between the full add units does not require photoelectric conversion, which further improves the performance of the device.
  • Figure 6 is for n-bit binary numbers ( - . -B! )
  • the cascading structure of the addition operation is formed by cascading the carry ends of n all-added units.
  • the carry signal is represented by two optical signals C and C*, and the advantage is that the input low carry signal and the output high carry signal are both optical signals, and in the process of cascading, the previous stage and the latter one
  • the level carry signals can be directly cascaded, avoiding the photoelectric conversion link in the foregoing embodiment, and reducing the complexity of the system.
  • the logical values of the two signals C and C* are always opposite.
  • Fig. 7 is a schematic structural view of a full addition unit in the optical full adder shown in Fig. 6.
  • the input and output of the full-add unit are different, and the specific meanings are as follows:
  • a 15 B 1 Two electrical signals to be calculated, the high and low levels of the signal in this embodiment respectively represent 1 and 0;
  • S 1 the calculation result of the unit, in this example, there is light (or strong light) indicating 1 No light (or weak light) means 0;
  • Input light Input light source for this unit.
  • Fig. 8 is a view showing the optical path structure of the optical total adding unit shown in Fig. 7, which also includes a plurality of optical waveguides, a beam splitter, an optical combiner, an optical switch, a modulation structure thereof, and the like.
  • the modulation structure of the microring resonators 1, 2, 3, 4 is connected to the electrical signal to be calculated
  • the modulation structure of the microring resonators 5, 6, 7, 8 is connected to the electrical signal to be calculated.
  • the working process is described in the sixth behavior example in the truth table shown in the table.
  • the transmission path of the light in the structure is as indicated by the arrow in FIG.
  • the two electrical signals A F 1 , B 0 to be calculated assume that the microring resonator resonates when the input electrical signal is 0, and when the electrical signal is 1, does not resonate, then the microring resonator connected to A is in a non-resonant state.
  • the microring resonator connected to B is in a resonant state.
  • the low carry signal is 1, and the end has a strong light input. (The * 14 has no glare input. When the light passes through the microring resonator connected to ⁇ , it passes directly from the through end, and the light resonates through the connected microring.
  • the final output When outputting from the download terminal, the final output has no light (or weak light), indicating that the operation result of the unit is 0, and the high-level carry terminal Q has light (or light intensity), and no light (or weak light) , indicating that the high-order carry signal of the unit is 1. Therefore, the calculation results shown in the truth table shown in Table 2 are obtained.
  • a plurality of 1-bit binary full-addition unit cascades can realize addition of multi-bit binary numbers.
  • optical path structure diagram of the fully-added unit shown in FIG. 8 is only an example. According to the principle of the present invention, the other optical path structures used to implement the full-addition unit and the multi-digit numerical calculation full adder are within the scope of protection of the present invention.
  • An optical numerical full adder does not require high-intensity pump light injection during operation, and the manufacturing process is compatible with the CMOS process, and the implementation difficulty and the manufacturing cost of the device are reduced;
  • the combination does not require photoelectric conversion, which reduces the delay and power consumption in the operation, further improving the performance of the device.
  • FIG. 9 is a flow chart of an embodiment of an optical value total addition method of the present invention. As shown in Figure 9, the method includes the following steps:
  • Step S101 Acquire an input to-be-added signal and a low-position carry signal.
  • Step S102 controlling a state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
  • Step S103 obtaining an addition result and a high carry signal according to the condition of the output light.
  • Step S104 outputting the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal.
  • the acquired input signal to be added generally includes two signals to be added, and the two signals to be added may be multi-bit binary numbers.
  • the number of bits can be from low to high. Waiting for phase
  • Each bit of the power-on signal and the low-level carry signal are separately added to obtain an addition result and a high-order carry signal.
  • an optical path structure diagram as shown in FIG. 5 or as shown in FIG. 8 may be adopted, and an optical switch based on the light guiding logic is connected to each optical path, and the electric signal to be added and the low carry signal pass through the optical switch.
  • the modulation structure is connected with the light guiding logic switch in the optical path.
  • the different inputs of the electrical signal can control the state of the switch to control the direction of the input light in the optical path, and finally according to the presence or absence of the output light or the intensity of the light intensity.
  • the addition result and the high carry signal are output, and the high carry signal is output as the lower carry signal of the next addition calculation of the signal to be added.
  • the specific implementation process can refer to the foregoing embodiment.
  • An optical value total addition method is based on the steering logic of light, and the full addition operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
  • FIG. 10 is a flow chart showing another embodiment of an optical value full addition method of the present invention. As shown in Figure 10, the method includes the following steps:
  • Step S201 Acquire an input to-be-added signal and a low-position carry signal, and the low-position carry signal is an electrical signal.
  • Step S202 controlling the state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
  • Step S203 Acquire an addition result and a high carry signal according to the condition of the output light, and the high carry signal is an optical signal.
  • Step S204 Convert the high carry signal into an electrical signal.
  • Step S205 outputting the high-order carry signal converted into an electrical signal as a lower carry signal of the next addition calculation of the to-be-added signal.
  • Step S201 to step S203 of this embodiment are the same as steps S101 to S103 of the foregoing embodiment.
  • the lower carry signal is an electrical signal
  • the high carry signal is an optical signal
  • steps S204 and S205 are for the foregoing embodiment.
  • step S104 since the output high carry signal is an optical signal, since the high carry signal is required as the lower carry signal of the next addition calculation of the signal to be added, the high carry signal is used as the phase to be phased Before the output of the lower carry signal of the next addition of the signal is output, it is necessary to convert the high carry signal into an electrical signal.
  • the specific implementation process can refer to the description in the foregoing embodiment.
  • FIG. 11 is a flow chart showing still another embodiment of an optical value addition method of the present invention. As shown in Figure 11, the method includes the following steps:
  • Step S301 Acquire an input to-be-added signal and a lower carry signal, where the lower carry signal includes a first lower carry light signal and a second lower carry light signal.
  • Step S302 controlling the state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
  • Step S303 Acquire an addition result and a high carry signal according to the condition of the output light, where the high carry signal includes a first high carry light signal and a second high carry light signal.
  • Step S304 the first high-order carry signal is output as the first lower-level carry optical signal of the next addition calculation of the to-be-added signal.
  • Step S305 outputting the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal, wherein the first low carry light signal and the second low carry light
  • the combination of signals represents a low carry
  • the combination of the first high carry light signal and the second high carry light signal represents a high carry.
  • both the low carry signal and the high carry signal use a combination of two optical signals to indicate a low carry and a high carry, so the high carry signal is used as the next addition calculation of the signal to be added.
  • the low carry signal is used, no photoelectric conversion is required, which reduces the delay and power consumption in the operation, further improving the performance of the device.
  • An optical value total addition method is based on the guiding logic of light, and the full-add operation is realized by controlling the direction of the light, the delay is small, the calculation speed is fast, and the power consumption is low; and the high-position carry signal is used as When the lower carry signal of the next addition calculation is to be added, the photoelectric conversion is not required, and the delay and power consumption in the operation are further reduced.
  • Figure 12 is a schematic view showing the structure of an embodiment of an optical value adding device according to the present invention. As shown in Figure 12, the apparatus 1000 includes:
  • the first obtaining unit 11 is configured to acquire the input to-be-added signal and the low-level carry signal.
  • the control unit 12 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
  • the second obtaining unit 13 is configured to obtain an addition result and a high carry signal according to the condition of the output light.
  • a first output unit 14 configured to use the high-order carry signal as a next step of the signal to be added The sub-addition calculation of the lower carry signal is output.
  • An optical value full adding device according to an embodiment of the present invention, the calculation process is based on the steering logic of light, and the full-add operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
  • Figure 13 is a schematic view showing the structure of another embodiment of an optical value adding device according to the present invention. As shown in Figure 13, the apparatus 2000 includes:
  • the first obtaining unit 21 is configured to acquire the input to-be-added signal and the low-level carry signal, and the low-position carry signal is an electrical signal.
  • the control unit 22 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
  • the second obtaining unit 23 is configured to obtain an addition result and a high carry signal according to the condition of the output light, where the high carry signal is an optical signal.
  • the first output unit 24 is configured to output the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal.
  • the first output unit 24 includes a conversion unit 241 and a second output unit 242.
  • the converting unit 241 is configured to convert the high carry signal into an electrical signal.
  • the second output unit 242 is configured to output the high-order carry signal converted into an electrical signal as a lower carry signal of the next addition calculation of the to-be-added signal.
  • An optical value full adding device according to an embodiment of the present invention, the calculation process is based on the steering logic of light, and the full-add operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
  • Figure 14 is a schematic view showing the structure of still another embodiment of an optical value adding device according to the present invention. As shown in Figure 14, the apparatus 3000 includes:
  • the first obtaining unit 31 is configured to acquire the input to-be-added signal and the lower carry signal, where the lower carry signal includes a first lower carry light signal and a second lower carry light signal.
  • the control unit 32 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
  • the second obtaining unit 33 is configured to obtain an addition result and a high-order carry signal according to the condition of the output light, where the high-order carry signal includes a first high-order carry light signal and a second high-order carry light signal.
  • the first output unit 34 is configured to output the high-order carry signal as a lower carry signal of the next addition calculation of the signal to be added.
  • the first output unit 34 includes: a third output unit 341 and a fourth output list Yuan 342.
  • the third output unit 341 is configured to output the first upper carry signal as the first lower carry optical signal of the next addition calculation of the to-be-added signal.
  • a fourth output unit 342 configured to output the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal; wherein the first lower carry optical signal and The combination of the second lower carry optical signal represents a low carry, and the combination of the first high carry light signal and the second higher carry light signal represents a high carry.
  • An optical value full adding device based on the guiding logic of light, realizes a full addition operation by controlling the direction of the light, the delay is small, the calculation speed is fast, and the power consumption is low; and the high carry signal is used as the phase to be phased When the lower carry signal of the next addition of the signal is added, no photoelectric conversion is required, which further reduces the delay and power consumption in the operation.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a computer.
  • computer readable media may comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage media or other magnetic storage device, or can be used for carrying or storing in the form of an instruction or data structure.
  • Any connection may suitably be a computer readable medium.
  • the software is using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or none such as infrared, radio, and microwave Wire technology is transmitted from a website, server or other remote source, then coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, wireless and microwave are included in the fixing of the associated medium.
  • a disk and a disc include a compact disc (CD), a laser disc, a disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

Abstract

An optical value full adder and optical value full adding method and device. The optical value full adder comprises: at least two optical full adding units which perform cascading, each of the at least two optical full adding units comprising: an optical input terminal, a signal input terminal used for inputting a signal to be summed, at least one low carry signal input terminal, a signal input terminal used for outputting a summed result, at least one high carry signal input terminal, at least one optical waveguide, and an optical switch based on optical guide logic; in the at least two optical full adding units which perform cascading, at least one high carry signal output terminal of any one of the optical full adding units being connected to at least one low carry signal input terminal of the next-level optical full adding unit. Also disclosed are a corresponding optical value full adding method and device.

Description

一种光学数值全加器、 光学数值全加方法及装置 技术领域  Optical numerical full adder, optical numerical full adding method and device
本发明涉及光学计算技术领域, 尤其涉及一种光学数值全加器、光学数值 全加方法及装置。 背景技术  The present invention relates to the field of optical computing technologies, and in particular, to an optical value full adder, an optical value full adding method and device. Background technique
未来不断增长的数据流量将对计算机系统的数据处理能力提出更高的要 求,计算机系统的性能将直接关系到信息产业乃至各行各业的发展和进步。现 有基于电子的计算机系统依赖于集成电路技术的持续发展,处理器的计算能力 不断增强。 然而, 随着芯片集成度的提高, 芯片内的功耗急剧上升, 由此引来 的散热问题将制约处理器性能的进一步提升。  The ever-increasing data traffic in the future will place higher demands on the data processing capabilities of computer systems. The performance of computer systems will directly affect the development and progress of the information industry and all walks of life. Existing electronic-based computer systems rely on the continued development of integrated circuit technology, and the computing power of the processor continues to increase. However, as the integration of the chip increases, the power consumption in the chip rises sharply, and the heat dissipation problem caused by this will further improve the performance of the processor.
与电子元器件相比, 基于光子的器件往往具有高带宽、 低功耗、 高度并行 性的特点, 因此已经开始了基于光子的计算机系统及其基本元功能器件的研 究, 以打破现有计算机系统的发展瓶颈。加法器在电计算中充当着极为重要的 角色, 除了可以对输入数据进行加法运算外, 还是实现乘法器、 码组转换器、 累加器、 计数器等器件的基础。 正是因为这样, 光学加法器也是光计算系统中 的一项重要研究内容。  Compared with electronic components, photonic-based devices tend to have high bandwidth, low power consumption, and high parallelism. Therefore, research on photonic-based computer systems and their basic meta-function devices has begun to break existing computer systems. The bottleneck of development. Adders play an extremely important role in electrical computing. In addition to adding input data, they are the basis for implementing multipliers, block converters, accumulators, counters, and more. Because of this, optical adders are also an important research component in optical computing systems.
如图 1所示,现有的光学全加器多是利用材料的非线性效应, 比如基于周 期性极化铌酸锂波导的结构或者基于半导体光放大器的结构。基于这些结构的 二进制光学全加器往往是由多个基本的基于非线性效应的全光开关级联而成。 基于非线性效应的二进制光学全加器要利用材料的非线性效应,该结构在工作 时需要一束 4艮强的泵浦光注入到材料中才能实现开光的功能,这样会极大增加 光源的制作难度和成本,同时高强度的光注入也会对系统的散热提出更高的要 求; 且要求材料具有较强的光学非线性效应, 如周期性极化铌酸锂等, 并且需 要特殊的加工工艺才能实现, 无法在非线性效应很弱的硅材料上直接制作, 因 此该全加器的材料成本和制作成本都较高。 发明内容  As shown in Fig. 1, the existing optical full adders mostly utilize nonlinear effects of materials, such as structures based on periodic polarization lithium niobate waveguides or structures based on semiconductor optical amplifiers. Binary optical full adders based on these structures are often cascading from multiple basic all-optical switches based on nonlinear effects. The binary optical full adder based on the nonlinear effect should utilize the nonlinear effect of the material, which requires a bundle of 4 strong pump light to be injected into the material during operation to realize the function of opening the light, which greatly increases the light source. Difficulty and cost of fabrication, while high-intensity light injection also imposes higher requirements on the heat dissipation of the system; and requires materials with strong optical nonlinear effects, such as periodically polarized lithium niobate, etc., and requires special processing. The process can be realized and cannot be directly fabricated on silicon materials with weak nonlinear effects, so the material cost and production cost of the full adder are high. Summary of the invention
本发明实施例提供了一种光学数值全加器、光学数值全加方法及装置, 可 以使器件工作时无需高强度的泵浦光注入,制作工艺与互补金属氧化物半导体 (Complementary Metal Oxide Semiconductor , CMOS)工艺兼容, 器件的实现难 度和制作成本降低, 以及使全加运算过程延迟小、 运算速度快和功耗低。 Embodiments of the present invention provide an optical numerical full adder, an optical value full adding method and device, which can make a device work without high-intensity pump light injection, a fabrication process and a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) process compatibility, device implementation difficulty and production cost reduction, as well as small delay, fast operation and low power consumption in the full-addition process.
第一方面, 提供了一种光学数值全加器, 包括:  In a first aspect, an optical value full adder is provided, comprising:
进行级联的至少两个光学全加单元,所述至少两个光学全加单元中的各光 学全加单元包括: 光输入端、 用于输入待相加信号的信号输入端、 至少一个低 位进位信号输入端、用于输出相加结果的信号输出端、至少一个高位进位信号 输出端、 至少一条光波导和基于光学导向逻辑的光开关;  Cascading at least two optical total adding units, each of the at least two optical all-adding units comprising: an optical input terminal, a signal input terminal for inputting a signal to be added, and at least one low-position carry a signal input terminal, a signal output terminal for outputting an addition result, at least one high-position carry signal output terminal, at least one optical waveguide, and an optical switch based on an optical guiding logic;
所述进行级联的至少两个光学全加单元中,任一个光学全加单元的所述至 少一个高位进位信号输出端与其下一级的光学全加单元的所述至少一个低位 进位信号输入端相连。  The at least one high-level carry signal output end of any one of the at least two optical full-add units of the optical total add-on unit and the at least one low-position carry signal input end of the optical full-add unit of the next stage Connected.
在第一种可能的实现方式中, 所述各光学全加单元还包括: 光分束器、 光 合束器。  In a first possible implementation, each of the optical total adding units further includes: an optical beam splitter and a photo combiner.
结合第一方面或第一方面的第一种可能的实现方式,在第二种可能的实现 方式中, 所述各光学全加单元具体包括两个信号输入端,其中一个信号输入端 用于输入第一待相加电信号, 另一个信号输入端用于输入第二待相加电信号。  With reference to the first aspect or the first possible implementation manner of the first aspect, in the second possible implementation, the optical total adding unit specifically includes two signal input ends, wherein one signal input end is used for input The first to-be-phased power-on signal is used to input a second to-be-phased power-on signal.
结合第一方面的第二种可能的实现方式,在第三种可能的实现方式中, 所 述第一待相加电信号和所述第二待相加电信号均为多位二进制数;  With reference to the second possible implementation of the first aspect, in a third possible implementation, the first to-be-connected power-on signal and the second to-be-charged power-on signal are multi-bit binary numbers;
所述各光学全加单元用于按照位数从低到高的顺序,对所述第一待相加电 信号和所述第二待相加电信号的每一位以及低位进位信号分别进行相加以获 得相加结果和高位进位信号。  Each of the optical total adding units is configured to perform phase separation on each of the first to-be-phased power-on signal and the second to-be-phased power-on signal and the low-position carry signal in order of number of bits from low to high. Add the sum result and the high carry signal.
结合第一方面或第一方面的第一种可能的实现方式或第一方面的第二种 可能的实现方式或第一方面的第三种可能的实现方式,在第四种可能的实现方 式中, 所述光学数值全加器还包括: 至少一个光电转换器;  In conjunction with the first aspect or the first possible implementation of the first aspect or the second possible implementation of the first aspect or the third possible implementation of the first aspect, in a fourth possible implementation The optical value full adder further includes: at least one photoelectric converter;
所述各光学全加单元包括用于输入低位进位电信号的一个所述低位进位 信号输入端、 用于输出高位进位光信号的一个所述高位进位信号输出端; 所述进行级联的至少两个光学全加单元中,任一个光学全加单元的所述高 位进位信号输出端与一个光电转换器的一端相连,所述光电转换器的另一端与 下一级光学全加单元的所述低位进位信号输入端相连,所述光电转换器用于将 所述高位进位信号输出端输出的结果转换成电信号输出至所述下一级光学全 加单元的所述低位进位信号输入端。 结合第一方面或第一方面的第一种可能的实现方式或第一方面的第二种 可能的实现方式或第一方面的第三种可能的实现方式,在第五种可能的实现方 式中,所述各光学全加单元包括分别用于输入第一低位进位光信号和第二低位 进位光信号的两个所述低位进位输入端、分别用于输出第一高位进位光信号和 第二高位进位光信号的两个所述高位进位输出端,所述第一低位进位光信号和 第二低位进位光信号的组合表示低位进位,所述第一高位进位光信号和第二高 位进位光信号的组合表示高位进位; Each of the optical total adding units includes one of the lower carry signal input terminals for inputting a lower carry electric signal, and one of the high carry signals output terminals for outputting a high carry optical signal; the at least two of the cascaded In the optical total adding unit, the high-order carry signal output end of any one of the optical full-adding units is connected to one end of a photoelectric converter, and the other end of the photoelectric converter and the lower end of the next-stage optical full-adding unit The carry signal input terminal is connected, and the photoelectric converter is configured to convert the output of the high carry signal output terminal into an electrical signal output to the lower carry signal input end of the next-stage optical full add unit. In combination with the first aspect or the first possible implementation of the first aspect or the second possible implementation of the first aspect or the third possible implementation of the first aspect, in a fifth possible implementation Each of the optical total adding units includes two low-order carry inputs for inputting the first lower carry light signal and the second lower carry light signal, respectively for outputting the first high carry light signal and the second high position Two high carry outputs of the carry optical signal, the combination of the first low carry optical signal and the second low carry optical signal represent a low carry, the first high carry light signal and the second high carry light signal Combination means high carry;
所述进行级联的至少两个光学全加单元中,任一个光学全加单元的输出所 述第一高位进位光信号的高位进位输出端与其下一级的所述输入第一低位进 位光信号的低位进位输入端相连,输出所述第二高位进位光信号的高位进位输 出端与其下一级的所述输入第二低位进位光信号的低位进位输入端相连。  And outputting, by the optical total adding unit, the high-order carry output end of the first high-order carry light signal and the input first low-position carry light signal of the next stage of the at least two optical all-adding units The lower carry input is connected, and the high carry output of the second higher carry optical signal is connected to the lower carry input of the input second lower carry optical signal of the next stage.
结合第一方面或第一方面的第一种可能的实现方式或第一方面的第二种 可能的实现方式或第一方面的第三种可能的实现方式或第一方面的第四种可 能的实现方式或第一方面的第五种可能的实现方式,在第六种可能的实现方式 中, 所述光开关为微环谐振器开关或马赫曾德干涉仪 MZI开关。  Combining the first aspect or the first possible implementation of the first aspect or the second possible implementation of the first aspect or the third possible implementation of the first aspect or the fourth possible implementation of the first aspect The implementation manner or the fifth possible implementation manner of the first aspect, in the sixth possible implementation manner, the optical switch is a micro ring resonator switch or a Mach-Zehnder interferometer MZI switch.
结合第一方面或第一方面的第一种可能的实现方式或第一方面的第二种 可能的实现方式或第一方面的第三种可能的实现方式或第一方面的第四种可 能的实现方式或第一方面的第五种可能的实现方式或第一方面的第六种可能 的实现方式, 在第七种可能的实现方式中, 所述至少一条光波导、 光分束器、 光合束器和光开关中的光学结构为硅、 绝缘衬底上的硅 SOI或 III-V族化合物 中的任一种。 第二方面, 提供了一种光学数值全加方法, 包括:  Combining the first aspect or the first possible implementation of the first aspect or the second possible implementation of the first aspect or the third possible implementation of the first aspect or the fourth possible implementation of the first aspect The fifth possible implementation manner of the first aspect or the sixth possible implementation manner of the first aspect, in a seventh possible implementation, the at least one optical waveguide, the optical beam splitter, and the photosynthetic The optical structure in the beam splitter and optical switch is any one of silicon, a silicon SOI or a III-V compound on an insulating substrate. In a second aspect, an optical value addition method is provided, including:
获取所输入的待相加信号和低位进位信号;  Acquiring the input to-be-added signal and the lower carry signal;
根据所述待相加信号和低位进位信号, 控制基于光导向逻辑的开关的状 态, 以控制输入光在至少一条光波导中的走向;  Controlling, according to the to-be-added signal and the lower carry signal, a state of the switch based on the light guiding logic to control a direction of the input light in the at least one optical waveguide;
根据输出光的情况获取相加结果和高位进位信号;  Obtaining the addition result and the high carry signal according to the condition of the output light;
将所述高位进位信号作为所述待相加信号的下一次相加计算的低位进位 信号进行输出。  The upper carry signal is output as a lower carry signal of the next addition calculation of the signal to be added.
在第一种可能的实现方式中, 所述低位进位信号为电信号,所述高位进位 信号为光信号; In a first possible implementation manner, the lower carry signal is an electrical signal, and the high carry The signal is an optical signal;
所述将所述高位进位信号作为所述待相加信号的下一次相加计算的低位 进位信号进行输出, 包括:  And outputting the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal, including:
将所述高位进位信号转换成电信号;  Converting the high carry signal into an electrical signal;
将转换成电信号的所述高位进位信号作为所述待相加信号的下一次相加 计算的低位进位信号进行输出。  The high carry signal converted into an electric signal is output as a lower carry signal of the next addition calculation of the signal to be added.
结合第二方面,在第二种可能的实现方式中, 所述低位进位信号包括第一 低位进位光信号和第二低位进位光信号,所述高位进位信号包括第一高位进位 光信号和第二高位进位光信号;  With reference to the second aspect, in a second possible implementation manner, the lower carry signal includes a first lower carry optical signal and a second lower carry optical signal, and the high carry signal includes a first high carry light signal and a second High carry light signal;
所述将所述高位进位信号作为所述待相加信号的下一次相加计算的低位 进位信号进行输出, 包括:  And outputting the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal, including:
将所述第一高位进位信号作为所述待相加信号的下一次相加计算的第一 低位进位光信号进行输出;  And outputting the first high-order carry signal as a first lower-level carry optical signal of the next addition calculation of the to-be-added signal;
将所述第二高位进位信号作为所述待相加信号的下一次相加计算的第二 低位进位光信号进行输出;  And outputting the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal;
其中,所述第一低位进位光信号和第二低位进位光信号的组合表示低位进 位, 所述第一高位进位光信号和第二高位进位光信号的组合表示高位进位。 第三方面, 提供了一种光学数值全加装置, 包括:  The combination of the first lower carry optical signal and the second lower carry optical signal represents a lower carry, and the combination of the first higher carry optical signal and the second higher carry optical signal represents a higher carry. In a third aspect, an optical value full adding device is provided, including:
第一获取单元, 用于获取所输入的待相加信号和低位进位信号; 控制单元, 用于根据所述待相加信号和低位进位信号,控制基于光导向逻 辑的开关的状态, 以控制输入光在至少一条光波导中的走向;  a first acquiring unit, configured to acquire the input to-be-added signal and a low-level carry signal; and a control unit, configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal, to control the input The direction of light in at least one of the optical waveguides;
第二获取单元, 用于根据输出光的情况获取相加结果和高位进位信号; 第一输出单元,用于将所述高位进位信号作为所述待相加信号的下一次相 加计算的低位进位信号进行输出。  a second obtaining unit, configured to obtain an addition result and a high-order carry signal according to a condition of the output light; and a first output unit configured to use the high-order carry signal as a low-position carry of the next addition calculation of the to-be-added signal The signal is output.
在第一种可能的实现方式中, 所述低位进位信号为电信号,所述高位进位 信号为光信号;  In a first possible implementation manner, the lower carry signal is an electrical signal, and the high carry signal is an optical signal;
所述第一输出单元包括:  The first output unit includes:
转换单元, 用于将所述高位进位信号转换成电信号;  a conversion unit, configured to convert the high carry signal into an electrical signal;
第二输出单元,用于将转换成电信号的所述高位进位信号作为所述待相加 信号的下一次相加计算的低位进位信号进行输出。 a second output unit, configured to use the high-order carry signal converted into an electrical signal as the to-be-added The lower carry signal of the next addition of the signal is output.
结合第三方面,在第二种可能的实现方式中, 所述低位进位信号包括第一 低位进位光信号和第二低位进位光信号,所述高位进位信号包括第一高位进位 光信号和第二高位进位光信号;  With reference to the third aspect, in a second possible implementation manner, the lower carry signal includes a first lower carry optical signal and a second lower carry optical signal, and the high carry signal includes a first high carry light signal and a second High carry light signal;
所述第一输出单元包括:  The first output unit includes:
第三输出单元,用于将所述第一高位进位信号作为所述待相加信号的下一 次相加计算的第一低位进位光信号进行输出;  a third output unit, configured to output the first high-order carry signal as a first lower-level carry optical signal of the next addition calculation of the to-be-added signal;
第四输出单元,用于将所述第二高位进位信号作为所述待相加信号的下一 次相加计算的第二低位进位光信号进行输出;  a fourth output unit, configured to output the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal;
其中,所述第一低位进位光信号和第二低位进位光信号的组合表示低位进 位, 所述第一高位进位光信号和第二高位进位光信号的组合表示高位进位。 采用本发明的一种光学数值全加器、 光学数值全加方法及装置的技术方 案, 可以使器件工作时无需高强度的泵浦光注入, 制作工艺与 CMOS工艺兼 容, 器件的实现难度和制作成本降低, 以及使全加运算过程延迟小、运算速度 快和功耗低。 附图说明  The combination of the first lower carry optical signal and the second lower carry optical signal represents a lower carry, and the combination of the first higher carry optical signal and the second higher carry optical signal represents a higher carry. By adopting the optical numerical full adder, the optical numerical full adding method and the device technical solution of the invention, the device can be operated without high-intensity pump light injection, the manufacturing process is compatible with the CMOS process, and the realization difficulty and fabrication of the device are realized. The cost is reduced, and the delay of the full-addition process is small, the operation speed is fast, and the power consumption is low. DRAWINGS
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施 例中所需要使用的附图作筒单地介绍,显而易见地, 下面描述中的附图仅仅是 本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的 前提下, 还可以根据这些附图获得其他的附图。  In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings to be used in the embodiments will be briefly described below. Obviously, the drawings in the following description are only the present invention. In some embodiments, other drawings may be obtained from those of ordinary skill in the art in light of the inventive work.
图 1 为现有技术中的一种光学全加器的结构示意图;  1 is a schematic structural view of an optical full adder in the prior art;
图 2为本发明的一种光学全加器的一个实施例的结构示意图;  2 is a schematic structural view of an embodiment of an optical full adder of the present invention;
图 3为图 2所示的二进制光学全加器中的全加单元的结构示意图; 图 4为本发明中微环谐振器开关的结构示意图;  3 is a schematic structural view of a full-addition unit in the binary optical full adder shown in FIG. 2; FIG. 4 is a schematic structural view of a micro-ring resonator switch according to the present invention;
图 5为图 3所示的全加单元的光路结构示意图;  Figure 5 is a schematic view showing the optical path structure of the fully-added unit shown in Figure 3;
图 6为本发明的一种光学全加器的另一个实施例的结构示意图; 图 7为图 6所示的光学全加器中的全加单元的结构示意图;  6 is a schematic structural view of another embodiment of an optical full adder according to the present invention; FIG. 7 is a schematic structural view of a full adder unit in the optical full adder shown in FIG.
图 8为图 7所示的光全加单元的光路结构图; 图 9为本发明一种光学数值全加方法的一个实施例的流程图; 图 10为本发明一种光学数值全加方法的另一个实施例的流程图; 图 11为本发明一种光学数值全加方法的又一个实施例的流程图; 图 12为本发明一种光学数值全加装置的一个实施例的结构示意图; 图 13为本发明一种光学数值全加装置的另一个实施例的结构示意图; 图 14为本发明一种光学数值全加装置的又一个实施例的结构示意图。 具体实施方式 Figure 8 is a view showing the optical path of the optical total adding unit shown in Figure 7; 9 is a flow chart of an embodiment of an optical value total adding method according to the present invention; FIG. 10 is a flow chart of another embodiment of an optical value total adding method according to the present invention; FIG. 12 is a schematic structural view of an embodiment of an optical value full adding device according to the present invention; FIG. 13 is another embodiment of an optical numerical full adding device according to the present invention; FIG. 14 is a schematic structural view of still another embodiment of an optical value full adding device according to the present invention. detailed description
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清 楚、 完整地描述, 显然, 所描述的实施例仅仅是本发明一部分实施例, 而不是 全部的实施例。基于本发明中的实施例, 本领域普通技术人员在没有作出创造 性劳动前提下所获得的所有其他实施例, 都属于本发明保护的范围。  BRIEF DESCRIPTION OF THE DRAWINGS The technical solutions in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative work are within the scope of the present invention.
本发明的光学数值全加器包括: 进行级联的多个光学全加单元,各光学全 加单元包括: 光输入端、 用于输入待相加信号的信号输入端、 至少一个低位进 位信号输入端、用于输出相加结果的信号输出端、至少一个高位进位信号输出 端、 多条光波导和基于光学导向逻辑的光开关; 进行级联的至少两个光学全加 单元中,任一个光学全加单元的高位进位信号输出端与其下一级的光学全加单 元的低位进位信号输入端相连。 各光学全加单元还可包括: 光分束器、 光合束 器。各光学全加单元具体包括两个信号输入端, 其中一个信号输入端用于输入 第一待相加电信号, 另一个信号输入端用于输入第二待相加电信号。  The optical value full adder of the present invention comprises: a plurality of optical full add units for cascading, each optical full add unit comprising: an optical input end, a signal input end for inputting a signal to be added, and at least one low carry signal input a signal output terminal for outputting an addition result, at least one high-position carry signal output terminal, a plurality of optical waveguides, and an optical switch based on optical guiding logic; and at least two optical total adding units for cascading, any one of optical The high carry signal output of the full add unit is connected to the lower carry signal input of the optical full add unit of the next stage. Each of the optical total adding units may further include: an optical beam splitter and an optical combiner. Each of the optical full adding units specifically includes two signal input terminals, one of which is used for inputting a first to-be-phased power-on signal, and the other of which is for inputting a second to-be-phased power-on signal.
下面以具体的两个实施例来详细描述本发明的光学数值全加器。  The optical value full adder of the present invention will be described in detail below in two specific embodiments.
图 2为本发明的一种光学全加器的一个实施例的结构示意图。 图 2表示 n 个全加单元构成的级联结构, 可进行 n位二进制数的加法运算(设 AJN与 BJN 分别表示 n位二进制数, Α^Α,,.. .ΑΑ-i.. .A! , ΒΙΝη ...Β,Β^. , .Β! ) , 其中 ΑΗ Βη表示最高位, A Bi表示最低位。 前一级全加单元的输出高位进位光信号 经过光电转换后与后一级全加单元的输入低位进位电信号相连。 801^=0^11...8181_1...81为该结构的输出结果, Cn表示最高位的进位项。 2 is a schematic view showing the structure of an embodiment of an optical full adder of the present invention. Figure 2 shows a cascade structure of n full-addition units, which can perform addition of n-bit binary numbers (set AJN and BJN to represent n-bit binary numbers, respectively), Α^Α,, .. .ΑΑ-i.. .A ! , Β ΙΝη ...Β,Β^. , .Β! ) , where Α Η η η represents the highest bit and A Bi represents the lowest bit. The output high-level carry light signal of the first-stage full-addition unit is connected to the input low-level carry electric signal of the subsequent one-stage full-addition unit after photoelectric conversion. 8 01 ^=0^ 11 ...8 1 8 1 _ 1 ... 8 1 is the output of the structure, and C n is the carry term of the highest bit.
实现多位二进制数全加运算的核心是全加单元,本发明的全加单元是基于 光学导向逻辑,对于全加器来说,输入包括待计算的两个信号和低位进位信号, 输出包括运算结果信号和高位进位信号。图 3为图 2所示的二进制光学全加器 中的全加单元的结构示意图, 该全加单元可以实现 1位二进制数的全加运算 , 真值表如表 1所示。 The core of the multi-bit binary number full-add operation is a full-addition unit. The full-addition unit of the present invention is based on optical steering logic. For a full adder, the input includes two signals to be calculated and a low-position carry signal, and the output includes operations. The resulting signal and the high carry signal. Figure 3 is a binary optical full adder shown in Figure 2. In the structure diagram of the full-addition unit, the full-addition unit can realize the full-addition operation of the 1-bit binary number, and the truth table is as shown in Table 1.
表 1 图 3所示的光学全加单元的真值表  Table 1 The truth table of the optical full-add unit shown in Figure 3
Figure imgf000008_0001
输入和输出的逻辑值以电信号的电平高低或者光信号的光强来表示,其中 每个信号的含义如下:
Figure imgf000008_0001
The logic values of the input and output are represented by the level of the electrical signal or the intensity of the optical signal, where each signal has the following meaning:
、 Β1: 表示待计算的两个电信号, 本实施例中信号的高低电平分别表示 逻辑 1和 0; , Β 1: represents two electrical signals to be calculated, the high and low levels of the signal in this embodiment respectively represent logic 1 and 0;
Q_i : 表示本单元的低位进位电信号; Q_ i : indicates the low carry signal of this unit;
S1: 表示本单元的计算结果, 本实施例中有光(或者强光)表示 1 , 无光 (或者弱光)表示 0; S 1: indicates the calculation result of the unit. In this embodiment, light (or strong light) indicates 1 and no light (or weak light) indicates 0;
Q: 表示本单元的输出高位进位光信号;  Q: indicates the output high carry light signal of this unit;
输入光: 本单元的输入光源。  Input light: Input light source for this unit.
本发明的输入光源不用为高强度的泵浦光, 可以是普通光源。  The input light source of the present invention does not need to be high intensity pump light, and may be an ordinary light source.
图 3所示的全加单元的工作原理如下:待计算的电信号和低位进位进位信 号通过调制结构与光路中的光导向逻辑开关相连接, 如马赫曾德干涉仪 (Mach-Zehnder Interferometer, MZI)开关, 以及图 4所示的微环谐振器开关等, 电信号的不同输入可以控制开关的状态从而控制光波在光路中的走向,最终根 据输出端中光的有无(或者光强的强弱)便可以得到判断得出运算结果信号和 高位进位信号,从而实现 1位二进制数的全加运算。其中每个电信号可以与多 个光开关的调制结构相连, 与同一电信号相连的多个光开关同步工作。  The operation principle of the full-addition unit shown in Fig. 3 is as follows: the electrical signal to be calculated and the low-position carry signal are connected to the light-guided logic switch in the optical path through a modulation structure, such as a Mach-Zehnder Interferometer (MZI). Switch, and the micro-ring resonator switch shown in Figure 4, the different inputs of the electrical signal can control the state of the switch to control the direction of the light wave in the optical path, and finally according to the presence or absence of light in the output (or strong light intensity) Weak) can be judged to obtain the operation result signal and the high-order carry signal, thereby realizing the full addition of the 1-bit binary number. Each of the electrical signals can be connected to a modulation structure of a plurality of optical switches, and a plurality of optical switches connected to the same electrical signal operate in synchronization.
图 5为图 3所示的全加单元的光路结构示意图, 包括若干条光波导、光分 束器、 光合束器、 光开关及其调制结构。 微环 1 的调制结构与待计算信号 相连, 微环 2和微环 3的调制结构与待计算信号 相连, 微环 4和微环 5的 调制结构与低位进位信号 Cl4相连。 微环谐振器光开关的结构如图 4所示, 包 括微环谐振器及相邻的波导,微环谐振器与相邻的波导相互耦合, 光从输入端 波导输入后会与微环谐振器发生相互作用从而改变光波的走向。当微环谐振器 处于谐振状态时, 光将耦合进入微环并从下载端输出; 当微环谐振器处于非谐 振状态时, 光将不经过微环从直通端直接输出。 对于一定波长的光来说, 微环 的谐振状态与微环的有效折射率直接相关,因此可以采用改变波导有效折射率 的方式来改变微环的谐振状态。 对于硅材料来说, 采用的方法包括热光效应, 载流子色散效应等。利用热光效应调节是通过对微环波导进行加热或降温来改 变波导的有效折射率, 可以采用在波导上方加热电极的方式; 载流子色散效应 是另一种常见的改变硅波导有效折射率的方法,目前高速的硅基电光调制往往 采用这种方式,即利用外加电信号改变硅波导中的载流子浓度从而改变硅材料 的折射率。 除了硅之外, 利用三五族材料等的电光效应也可以实现微环光开关 的功能。 FIG. 5 is a schematic diagram of the optical path structure of the fully-added unit shown in FIG. 3, including a plurality of optical waveguides, an optical beam splitter, an optical combiner, an optical switch, and a modulation structure thereof. Modulation structure of microring 1 and signal to be calculated Connected, the modulation structure of the microring 2 and the microring 3 is connected to the signal to be calculated, and the modulation structure of the microring 4 and the microring 5 is connected to the lower carry signal C l4 . The structure of the microring resonator optical switch is as shown in FIG. 4, and includes a microring resonator and an adjacent waveguide. The microring resonator is coupled with the adjacent waveguide, and the light is input from the input end waveguide and the microring resonator is connected. Interactions occur to change the direction of the light wave. When the microring resonator is in resonance, light will couple into the microring and output from the download; when the microring resonator is in a non-resonant state, light will be output directly from the through end without passing through the microring. For a certain wavelength of light, the resonant state of the microring is directly related to the effective refractive index of the microring. Therefore, the resonant state of the microring can be changed by changing the effective refractive index of the waveguide. For silicon materials, the methods used include thermo-optic effects, carrier dispersion effects, and the like. The thermo-optic effect adjustment is to change the effective refractive index of the waveguide by heating or cooling the micro-ring waveguide, and the method of heating the electrode above the waveguide can be adopted; the carrier dispersion effect is another common change of the effective refractive index of the silicon waveguide. In the current method, high-speed silicon-based electro-optical modulation is often used in such a manner that the applied carrier voltage is used to change the carrier concentration in the silicon waveguide to change the refractive index of the silicon material. In addition to silicon, the function of the micro-ring optical switch can also be realized by the electro-optic effect of the three-five materials.
值得说明的是, 图 5所示的全加单元的光路结构示意图仅为一种举例,根 据本发明的原理,采用的其它的光路结构实现全加单元及多位数值计算的全加 器都在本发明的保护范围内。  It should be noted that the optical path structure diagram of the fully-added unit shown in FIG. 5 is only an example. According to the principle of the present invention, the other optical path structures used to implement the full-addition unit and the multi-bit numerical calculation full adder are Within the scope of protection of the present invention.
以表 1所示的真值表中第 6行为例描述全加单元的工作过程, Α^Ι , Β^Ο, Cl4=l , 假定微环谐振器在输入电信号为 0时谐振, 电信号为 1时不谐振, 则 与信号 相连的微环处于谐振状态, 其他微环处于非谐振状态。 光在该结构 中的传输路径如图 5中箭头指向所示。 光从输入端进入, 经过微环 1时, 由于 微环处于非谐振状态, 光从直通端直接通过, 经过分束器后分成两束, 经过微 环 2和 3时, 由于微环处于谐振状态, 光从下载端输出。 微环 4和 5处于非谐 振状态, 光经过时, 从直通端直接通过, 最终输出端 &无光(或者光强弱) 表示该位的运算结果为 0, 高位进位端 G有光(或者光强强)表示后一级进位 信号为 1。 因此, 得到了表 1所示真值表中所示的结果, 实现了 1位二进制数 全加的功能。多个 1位二进制的全加单元级联可以实现多位二进制数的加法运 算。 The working process of the full-addition unit is described by the sixth behavior example in the truth table shown in Table 1, Α^Ι, Β^Ο, C l4 = l , assuming that the micro-ring resonator resonates when the input electrical signal is 0, When the signal is 1, it does not resonate, then the microring connected to the signal is in a resonant state, and the other microrings are in a non-resonant state. The transmission path of light in the structure is shown by the arrow pointing in FIG. Light enters from the input end. When passing through the microring 1, since the microring is in a non-resonant state, light passes directly from the through end, passes through the beam splitter and is split into two beams. When passing through the microrings 2 and 3, the microring is in resonance. , Light is output from the download side. The microrings 4 and 5 are in a non-resonant state. When the light passes, the light passes directly from the through end. The final output terminal & no light (or weak light) indicates that the operation result of the bit is 0, and the high carry end G has light (or light). Strong) indicates that the post-level carry signal is 1. Therefore, the results shown in the truth table shown in Table 1 are obtained, and the function of adding 1-bit binary numbers is realized. A multi-bit binary number addition can be implemented by multiple 1-bit binary full-addition unit cascades.
本发明中的多条光波导、光分束器、光合束器和光开关中的光学结构为硅、 绝缘衬底上的硅 SOI或 III-V族化合物中的任一种。 根据本发明实施例提供的一种光学数值全加器,工作时无需高强度的泵浦 光注入, 制作工艺与 CMOS工艺兼容, 器件的实现难度和制作成本降低。 The optical structure in the plurality of optical waveguides, optical beam splitters, optical combiners, and optical switches in the present invention is any one of silicon, a silicon SOI or a III-V compound on an insulating substrate. According to an embodiment of the present invention, an optical numerical full adder does not require high-intensity pump light injection during operation, and the fabrication process is compatible with a CMOS process, and the implementation difficulty and manufacturing cost of the device are reduced.
图 6为本发明的一种光学全加器的另一个实施例的结构示意图。与前述实 施例不同的是, 本实施例的全加单元中, 进位信号都采用光信号表示, 全加单 元之间的级联无需光电转换, 进一步提升了器件的性能。  Figure 6 is a schematic view showing the structure of another embodiment of an optical full adder of the present invention. Different from the foregoing embodiments, in the full-addition unit of the embodiment, the carry signals are represented by optical signals, and the cascade between the full add units does not require photoelectric conversion, which further improves the performance of the device.
图 6为用于 n位二进制数 (
Figure imgf000010_0001
- . -B! ) 的加法运算 的级联结构, 由 n个全加单元的进位端级联而成。 在本实施例中, 进位信号由 C和 C*两个光信号表示, 其优势在于, 输入低位进位信号和输出高位进位信 号都是光信号,在级联的过程中, 前一级和后一级的进位信号可以直接进行级 联, 避免了前述实施例中的光电转换环节, 降低了系统的复杂度。 其中, C和 C*两个信号的逻辑值始终是相反的。
Figure 6 is for n-bit binary numbers (
Figure imgf000010_0001
- . -B! ) The cascading structure of the addition operation is formed by cascading the carry ends of n all-added units. In this embodiment, the carry signal is represented by two optical signals C and C*, and the advantage is that the input low carry signal and the output high carry signal are both optical signals, and in the process of cascading, the previous stage and the latter one The level carry signals can be directly cascaded, avoiding the photoelectric conversion link in the foregoing embodiment, and reducing the complexity of the system. Among them, the logical values of the two signals C and C* are always opposite.
图 7为图 6所示的光学全加器中的全加单元的结构示意图。与前述实施例 中的全加单元相比, 该全加单元的输入和输出有所不同, 具体含义如下:  Fig. 7 is a schematic structural view of a full addition unit in the optical full adder shown in Fig. 6. Compared with the full-add unit in the foregoing embodiment, the input and output of the full-add unit are different, and the specific meanings are as follows:
A15 B1:待计算的两个电信号,本实施例中信号的高低电平分别表示 1和 0; S1: 该单元的计算结果, 本例中有光(或者强光)表示 1 , 无光(或者弱 光 )表示 0; A 15 B 1: Two electrical signals to be calculated, the high and low levels of the signal in this embodiment respectively represent 1 and 0; S 1: the calculation result of the unit, in this example, there is light (or strong light) indicating 1 No light (or weak light) means 0;
Q_!, C*l4 : 前一级的进位光信号, Cl4=l且 C*l4=0表示有进位, Q_!=0 且 C*i-l=l表示无进位; Q_!, C* l4 : Carry light signal of the previous stage, C l4 =l and C* l4 =0 means there is carry, Q_!=0 and C*il=l means no carry;
Q, C*, : 本单元输出的进位光信号, d=l且 c o表示有进位, d=0且 C]=l表示无进位;  Q, C*, : The carry light signal output by this unit, d=l and c o means there is carry, d=0 and C]=l means no carry;
输入光: 本单元的输入光源。  Input light: Input light source for this unit.
其实现 1位二进制数全加运算的真值表如表 2所示:  The truth table for implementing the 1-bit binary number full addition operation is shown in Table 2:
表 2 图 7所示的光学全加单元的真值表  Table 2 The truth table of the optical full-add unit shown in Figure 7.
Figure imgf000010_0002
图 8为图 7所示的光全加单元的光路结构图, 同样包括若干光波导、光分 束器、 光合束器、 光开关及其调制结构等。 微环谐振器 1、 2、 3、 4的调制结 构与待计算电信号 相连, 微环谐振器 5、 6、 7、 8的调制结构与待计算电信 号 相连。 以表 所示的真值表中第 6行为例描述其工作过程, 光在该结构 中的传输路径如图 8 中箭头指向所示。 待计算的两个电信号 AF1 , B 0, 假 定微环谐振器在输入电信号为 0时谐振, 电信号为 1时不谐振, 则与 A相连 的微环谐振器处于非谐振状态, 与 B相连的微环谐振器处于谐振状态。 低位 进位信号为 1 , 则 端有强光输入, ( *14端无强光输入。 当光经过与 ^相连 的微环谐振器时, 从直通端直接通过, 当光经过与 连的微环谐振器时, 从下载端输出。最终输出端 无光(或者光强弱)表示该单元的运算结果为 0, 高位进位端 Q有光(或者光强强) , 而 无光(或者光强弱) , 表示该单元 的高位进位信号为 1。 因此得到了如表 2所示的真值表中所示的计算结果。 多 个 1位二进制全加单元级联可以实现多位二进制数的加法运算。
Figure imgf000010_0002
Fig. 8 is a view showing the optical path structure of the optical total adding unit shown in Fig. 7, which also includes a plurality of optical waveguides, a beam splitter, an optical combiner, an optical switch, a modulation structure thereof, and the like. The modulation structure of the microring resonators 1, 2, 3, 4 is connected to the electrical signal to be calculated, and the modulation structure of the microring resonators 5, 6, 7, 8 is connected to the electrical signal to be calculated. The working process is described in the sixth behavior example in the truth table shown in the table. The transmission path of the light in the structure is as indicated by the arrow in FIG. The two electrical signals A F 1 , B 0 to be calculated assume that the microring resonator resonates when the input electrical signal is 0, and when the electrical signal is 1, does not resonate, then the microring resonator connected to A is in a non-resonant state. The microring resonator connected to B is in a resonant state. The low carry signal is 1, and the end has a strong light input. (The * 14 has no glare input. When the light passes through the microring resonator connected to ^, it passes directly from the through end, and the light resonates through the connected microring. When outputting from the download terminal, the final output has no light (or weak light), indicating that the operation result of the unit is 0, and the high-level carry terminal Q has light (or light intensity), and no light (or weak light) , indicating that the high-order carry signal of the unit is 1. Therefore, the calculation results shown in the truth table shown in Table 2 are obtained. A plurality of 1-bit binary full-addition unit cascades can realize addition of multi-bit binary numbers.
值得说明的是, 图 8所示的全加单元的光路结构示意图仅为一种举例,根 据本发明的原理,采用的其它的光路结构实现全加单元及多位数值计算的全加 器都在本发明的保护范围内。  It should be noted that the optical path structure diagram of the fully-added unit shown in FIG. 8 is only an example. According to the principle of the present invention, the other optical path structures used to implement the full-addition unit and the multi-digit numerical calculation full adder are Within the scope of protection of the present invention.
根据本发明实施例提供的一种光学数值全加器,工作时无需高强度的泵浦 光注入, 制作工艺与 CMOS工艺兼容, 器件的实现难度和制作成本降低; 且 全加单元之间的级联无需光电转换, 降低了运算中的延迟和功耗, 进一步提升 了器件的性能。  An optical numerical full adder according to an embodiment of the invention does not require high-intensity pump light injection during operation, and the manufacturing process is compatible with the CMOS process, and the implementation difficulty and the manufacturing cost of the device are reduced; The combination does not require photoelectric conversion, which reduces the delay and power consumption in the operation, further improving the performance of the device.
图 9为本发明一种光学数值全加方法的一个实施例的流程图。如图 9所示, 该方法包括以下步骤:  9 is a flow chart of an embodiment of an optical value total addition method of the present invention. As shown in Figure 9, the method includes the following steps:
步骤 S101 , 获取所输入的待相加信号和低位进位信号。  Step S101: Acquire an input to-be-added signal and a low-position carry signal.
步骤 S102, 根据所述待相加信号和低位进位信号, 控制基于光导向逻辑 的开关的状态, 以控制输入光在至少一条光波导中的走向。  Step S102, controlling a state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
步骤 S103 , 根据输出光的情况获取相加结果和高位进位信号。  Step S103, obtaining an addition result and a high carry signal according to the condition of the output light.
步骤 S104, 将所述高位进位信号作为所述待相加信号的下一次相加计算 的低位进位信号进行输出。  Step S104, outputting the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal.
获取的所输入的待相加信号一般包括两个待相加电信号,两个待相加电信 号可以是多位二进制数, 本实施例可以按照位数从低到高的顺序,对两个待相 加电信号的每一位以及低位进位信号分别进行相加以获得相加结果和高位进 位信号。 The acquired input signal to be added generally includes two signals to be added, and the two signals to be added may be multi-bit binary numbers. In this embodiment, the number of bits can be from low to high. Waiting for phase Each bit of the power-on signal and the low-level carry signal are separately added to obtain an addition result and a high-order carry signal.
在每一位的相加过程中, 可以采用如图 5或如图 8所示的光路结构图,基 于光导向逻辑的光开关连接各条光路,待相加电信号和低位进位信号通过光开 关的调制结构与光路中的光导向逻辑开关相连接,电信号的不同输入可以控制 开关的状态从而控制输入光在光路中的走向,最后根据输出光的有无或者光强 的强弱便可以得出相加结果和高位进位信号,将高位进位信号作为待相加信号 的下一次相加计算的低位进位信号进行输出。其具体实现过程可以参考前述实 施例。  In the process of adding each bit, an optical path structure diagram as shown in FIG. 5 or as shown in FIG. 8 may be adopted, and an optical switch based on the light guiding logic is connected to each optical path, and the electric signal to be added and the low carry signal pass through the optical switch. The modulation structure is connected with the light guiding logic switch in the optical path. The different inputs of the electrical signal can control the state of the switch to control the direction of the input light in the optical path, and finally according to the presence or absence of the output light or the intensity of the light intensity. The addition result and the high carry signal are output, and the high carry signal is output as the lower carry signal of the next addition calculation of the signal to be added. The specific implementation process can refer to the foregoing embodiment.
根据本发明实施例的一种光学数值全加方法, 计算过程基于光的导向逻 辑, 通过控制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低。  An optical value total addition method according to an embodiment of the present invention, the calculation process is based on the steering logic of light, and the full addition operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
图 10为本发明一种光学数值全加方法的另一个实施例的流程图。 如图 10 所示, 该方法包括以下步骤:  Figure 10 is a flow chart showing another embodiment of an optical value full addition method of the present invention. As shown in Figure 10, the method includes the following steps:
步骤 S201 , 获取所输入的待相加信号和低位进位信号, 所述低位进位信 号为电信号。  Step S201: Acquire an input to-be-added signal and a low-position carry signal, and the low-position carry signal is an electrical signal.
步骤 S202, 根据所述待相加信号和低位进位信号, 控制基于光导向逻辑 的开关的状态, 以控制输入光在至少一条光波导中的走向。  Step S202, controlling the state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
步骤 S203 , 根据输出光的情况获取相加结果和高位进位信号, 所述高位 进位信号为光信号。  Step S203: Acquire an addition result and a high carry signal according to the condition of the output light, and the high carry signal is an optical signal.
步骤 S204, 将所述高位进位信号转换成电信号。  Step S204: Convert the high carry signal into an electrical signal.
步骤 S205 , 将转换成电信号的所述高位进位信号作为所述待相加信号的 下一次相加计算的低位进位信号进行输出。  Step S205, outputting the high-order carry signal converted into an electrical signal as a lower carry signal of the next addition calculation of the to-be-added signal.
本实施例的步骤 S201-步骤 S203与前述实施例的步骤 S101-步骤 S103相 同, 本实施例中, 低位进位信号为电信号, 高位进位信号为光信号, 步骤 S204 和步骤 S205是对前述实施例的步骤 S104的进一步的细化,由于输出的高位进 位信号为光信号,由于要求将高位进位信号作为待相加信号的下一次相加计算 的低位进位信号,所以在该高位进位信号作为待相加信号的下一次相加计算的 低位进位信号进行输出前, 需要将高位进位信号转换成电信号。其具体实现过 程可以参考前述实施例中的描述。  Step S201 to step S203 of this embodiment are the same as steps S101 to S103 of the foregoing embodiment. In this embodiment, the lower carry signal is an electrical signal, and the high carry signal is an optical signal, and steps S204 and S205 are for the foregoing embodiment. Further refinement of step S104, since the output high carry signal is an optical signal, since the high carry signal is required as the lower carry signal of the next addition calculation of the signal to be added, the high carry signal is used as the phase to be phased Before the output of the lower carry signal of the next addition of the signal is output, it is necessary to convert the high carry signal into an electrical signal. The specific implementation process can refer to the description in the foregoing embodiment.
根据本发明实施例的一种光学数值全加方法, 计算过程基于光的导向逻 辑, 通过控制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低。 图 11为本发明一种光学数值全加方法的又一个实施例的流程图。 如图 11 所示, 该方法包括以下步骤: An optical value total addition method according to an embodiment of the present invention, the calculation process is based on light steering logic The full-add operation is realized by controlling the direction of the light, which has a small delay, a fast calculation speed, and low power consumption. Figure 11 is a flow chart showing still another embodiment of an optical value addition method of the present invention. As shown in Figure 11, the method includes the following steps:
步骤 S301 , 获取所输入的待相加信号和低位进位信号, 所述低位进位信 号包括第一低位进位光信号和第二低位进位光信号。  Step S301: Acquire an input to-be-added signal and a lower carry signal, where the lower carry signal includes a first lower carry light signal and a second lower carry light signal.
步骤 S302, 根据所述待相加信号和低位进位信号, 控制基于光导向逻辑 的开关的状态, 以控制输入光在至少一条光波导中的走向。  Step S302, controlling the state of the switch based on the light guiding logic according to the to-be-added signal and the low-level carry signal to control the direction of the input light in the at least one optical waveguide.
步骤 S303 , 根据输出光的情况获取相加结果和高位进位信号, 所述高位 进位信号包括第一高位进位光信号和第二高位进位光信号。  Step S303: Acquire an addition result and a high carry signal according to the condition of the output light, where the high carry signal includes a first high carry light signal and a second high carry light signal.
步骤 S304, 将所述第一高位进位信号作为所述待相加信号的下一次相加 计算的第一低位进位光信号进行输出。  Step S304, the first high-order carry signal is output as the first lower-level carry optical signal of the next addition calculation of the to-be-added signal.
步骤 S305 , 将所述第二高位进位信号作为所述待相加信号的下一次相加 计算的第二低位进位光信号进行输出, 其中, 所述第一低位进位光信号和第二 低位进位光信号的组合表示低位进位,所述第一高位进位光信号和第二高位进 位光信号的组合表示高位进位。  Step S305, outputting the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal, wherein the first low carry light signal and the second low carry light The combination of signals represents a low carry, and the combination of the first high carry light signal and the second high carry light signal represents a high carry.
与前述实施例不同的是, 本实施例中,低位进位信号和高位进位信号都采 用两个光信号的组合表示低位进位和高位进位,因此高位进位信号作为待相加 信号的下一次相加计算的低位进位信号时, 无需进行光电转换, 降低了运算中 的延迟和功耗, 进一步提升了器件的性能。  Different from the foregoing embodiment, in the present embodiment, both the low carry signal and the high carry signal use a combination of two optical signals to indicate a low carry and a high carry, so the high carry signal is used as the next addition calculation of the signal to be added. When the low carry signal is used, no photoelectric conversion is required, which reduces the delay and power consumption in the operation, further improving the performance of the device.
根据本发明实施例的一种光学数值全加方法, 计算过程基于光的导向逻 辑, 通过控制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低; 且 高位进位信号作为待相加信号的下一次相加计算的低位进位信号时,无需进行 光电转换, 进一步降低了运算中的延迟和功耗。  An optical value total addition method according to an embodiment of the present invention, the calculation process is based on the guiding logic of light, and the full-add operation is realized by controlling the direction of the light, the delay is small, the calculation speed is fast, and the power consumption is low; and the high-position carry signal is used as When the lower carry signal of the next addition calculation is to be added, the photoelectric conversion is not required, and the delay and power consumption in the operation are further reduced.
图 12为本发明一种光学数值全加装置的一个实施例的结构示意图。 如图 12所示, 该装置 1000包括:  Figure 12 is a schematic view showing the structure of an embodiment of an optical value adding device according to the present invention. As shown in Figure 12, the apparatus 1000 includes:
第一获取单元 11 , 用于获取所输入的待相加信号和低位进位信号。  The first obtaining unit 11 is configured to acquire the input to-be-added signal and the low-level carry signal.
控制单元 12, 用于根据所述待相加信号和低位进位信号, 控制基于光导 向逻辑的开关的状态, 以控制输入光在至少一条光波导中的走向。  The control unit 12 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
第二获取单元 13 , 用于根据输出光的情况获取相加结果和高位进位信号。 第一输出单元 14, 用于将所述高位进位信号作为所述待相加信号的下一 次相加计算的低位进位信号进行输出。 The second obtaining unit 13 is configured to obtain an addition result and a high carry signal according to the condition of the output light. a first output unit 14 configured to use the high-order carry signal as a next step of the signal to be added The sub-addition calculation of the lower carry signal is output.
根据本发明实施例的一种光学数值全加装置, 计算过程基于光的导向逻 辑, 通过控制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低。  An optical value full adding device according to an embodiment of the present invention, the calculation process is based on the steering logic of light, and the full-add operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
图 13为本发明一种光学数值全加装置的另一个实施例的结构示意图。 如 图 13所示, 该装置 2000包括:  Figure 13 is a schematic view showing the structure of another embodiment of an optical value adding device according to the present invention. As shown in Figure 13, the apparatus 2000 includes:
第一获取单元 21 , 用于获取所输入的待相加信号和低位进位信号, 所述 低位进位信号为电信号。  The first obtaining unit 21 is configured to acquire the input to-be-added signal and the low-level carry signal, and the low-position carry signal is an electrical signal.
控制单元 22, 用于根据所述待相加信号和低位进位信号, 控制基于光导 向逻辑的开关的状态, 以控制输入光在至少一条光波导中的走向。  The control unit 22 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
第二获取单元 23 , 用于根据输出光的情况获取相加结果和高位进位信号, 所述高位进位信号为光信号。  The second obtaining unit 23 is configured to obtain an addition result and a high carry signal according to the condition of the output light, where the high carry signal is an optical signal.
第一输出单元 24, 用于将所述高位进位信号作为所述待相加信号的下一 次相加计算的低位进位信号进行输出。  The first output unit 24 is configured to output the high-order carry signal as a lower carry signal of the next addition calculation of the to-be-added signal.
在本实施例中,第一输出单元 24包括:转换单元 241和第二输出单元 242。 转换单元 241 , 用于将所述高位进位信号转换成电信号。  In the present embodiment, the first output unit 24 includes a conversion unit 241 and a second output unit 242. The converting unit 241 is configured to convert the high carry signal into an electrical signal.
第二输出单元 242, 用于将转换成电信号的所述高位进位信号作为所述待 相加信号的下一次相加计算的低位进位信号进行输出。  The second output unit 242 is configured to output the high-order carry signal converted into an electrical signal as a lower carry signal of the next addition calculation of the to-be-added signal.
根据本发明实施例的一种光学数值全加装置, 计算过程基于光的导向逻 辑, 通过控制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低。  An optical value full adding device according to an embodiment of the present invention, the calculation process is based on the steering logic of light, and the full-add operation is realized by controlling the direction of the light, which has small delay, fast calculation speed, and low power consumption.
图 14为本发明一种光学数值全加装置的又一个实施例的结构示意图。 如 图 14所示, 该装置 3000包括:  Figure 14 is a schematic view showing the structure of still another embodiment of an optical value adding device according to the present invention. As shown in Figure 14, the apparatus 3000 includes:
第一获取单元 31 , 用于获取所输入的待相加信号和低位进位信号, 所述 低位进位信号包括第一低位进位光信号和第二低位进位光信号。  The first obtaining unit 31 is configured to acquire the input to-be-added signal and the lower carry signal, where the lower carry signal includes a first lower carry light signal and a second lower carry light signal.
控制单元 32, 用于根据所述待相加信号和低位进位信号, 控制基于光导 向逻辑的开关的状态, 以控制输入光在至少一条光波导中的走向。  The control unit 32 is configured to control a state of the switch based on the light guiding logic according to the to-be-added signal and the low carry signal to control the direction of the input light in the at least one optical waveguide.
第二获取单元 33 , 用于根据输出光的情况获取相加结果和高位进位信号, 所述高位进位信号包括第一高位进位光信号和第二高位进位光信号。  The second obtaining unit 33 is configured to obtain an addition result and a high-order carry signal according to the condition of the output light, where the high-order carry signal includes a first high-order carry light signal and a second high-order carry light signal.
第一输出单元 34, 用于将所述高位进位信号作为所述待相加信号的下一 次相加计算的低位进位信号进行输出。  The first output unit 34 is configured to output the high-order carry signal as a lower carry signal of the next addition calculation of the signal to be added.
在本实施例中, 第一输出单元 34包括: 第三输出单元 341和第四输出单 元 342。 In this embodiment, the first output unit 34 includes: a third output unit 341 and a fourth output list Yuan 342.
第三输出单元 341 , 用于将所述第一高位进位信号作为所述待相加信号的 下一次相加计算的第一低位进位光信号进行输出。  The third output unit 341 is configured to output the first upper carry signal as the first lower carry optical signal of the next addition calculation of the to-be-added signal.
第四输出单元 342, 用于将所述第二高位进位信号作为所述待相加信号的 下一次相加计算的第二低位进位光信号进行输出; 其中,所述第一低位进位光 信号和第二低位进位光信号的组合表示低位进位,所述第一高位进位光信号和 第二高位进位光信号的组合表示高位进位。  a fourth output unit 342, configured to output the second upper carry signal as a second lower carry optical signal of the next addition calculation of the to-be-added signal; wherein the first lower carry optical signal and The combination of the second lower carry optical signal represents a low carry, and the combination of the first high carry light signal and the second higher carry light signal represents a high carry.
根据本发明实施例的一种光学数值全加装置,基于光的导向逻辑,通过控 制光的走向来实现全加运算, 其延迟小、 计算速度快、 功耗低; 且高位进位信 号作为待相加信号的下一次相加计算的低位进位信号时, 无需进行光电转换, 进一步降低了运算中的延迟和功耗。  An optical value full adding device according to an embodiment of the present invention, based on the guiding logic of light, realizes a full addition operation by controlling the direction of the light, the delay is small, the calculation speed is fast, and the power consumption is low; and the high carry signal is used as the phase to be phased When the lower carry signal of the next addition of the signal is added, no photoelectric conversion is required, which further reduces the delay and power consumption in the operation.
需要说明的是, 对于前述的各方法实施例, 为了筒单描述, 故将其都表述 为一系列的动作组合,但是本领域技术人员应该知悉,本发明并不受所描述的 动作顺序的限制,因为根据本发明,某些步骤可以采用其他顺序或者同时进行。 其次, 本领域技术人员也应该知悉,说明书中所描述的实施例均属于优选实施 例, 所涉及的动作和模块并不一定是本发明所必须的。  It should be noted that, for each of the foregoing method embodiments, for the description of the cartridge, it is expressed as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the described action sequence. Because certain steps may be performed in other orders or concurrently in accordance with the present invention. In addition, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.
在上述实施例中,对各个实施例的描述都各有侧重, 某个实施例中没有详 述的部分, 可以参见其他实施例的相关描述。  In the above embodiments, the descriptions of the various embodiments are different, and the details are not described in the specific embodiments. For details, refer to related descriptions of other embodiments.
通过以上的实施方式的描述,所属领域的技术人员可以清楚地了解到本发 明可以用硬件实现, 或固件实现, 或它们的组合方式来实现。 当使用软件实现 时,可以将上述功能存储在计算机可读介质中或作为计算机可读介质上的一个 或多个指令或代码进行传输。 计算机可读介质包括计算机存储介质和通信介 质,其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介 质。 存储介质可以是计算机能够存取的任何可用介质。 以此为例但不限于: 计 算机可读介质可以包括 RAM、 ROM, EEPROM、 CD-ROM或其他光盘存储、 磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据 结构形式的期望的程序代码并能够由计算机存取的任何其他介质。此外。任何 连接可以适当的成为计算机可读介质。 例如, 如果软件是使用同轴电缆、 光纤 光缆、 双绞线、 数字用户线(DSL )或者诸如红外线、 无线电和微波之类的无 线技术从网站、 服务器或者其他远程源传输的, 那么同轴电缆、 光纤光缆、 双 绞线、 DSL或者诸如红外线、 无线和微波之类的无线技术包括在所属介质的 定影中。 如本发明所使用的, 盘(Disk )和碟(disc ) 包括压缩光碟(CD )、 激光碟、 光碟、 数字通用光碟(DVD )、 软盘和蓝光光碟, 其中盘通常磁性的 复制数据, 而碟则用激光来光学的复制数据。上面的组合也应当包括在计算机 可读介质的保护范围之内。 Through the description of the above embodiments, those skilled in the art can clearly understand that the present invention can be implemented by hardware implementation, firmware implementation, or a combination thereof. When implemented in software, the functions described above may be stored in or transmitted as one or more instructions or code on a computer readable medium. Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another. A storage medium may be any available media that can be accessed by a computer. By way of example and not limitation, computer readable media may comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage media or other magnetic storage device, or can be used for carrying or storing in the form of an instruction or data structure. The desired program code and any other medium that can be accessed by the computer. Also. Any connection may suitably be a computer readable medium. For example, if the software is using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or none such as infrared, radio, and microwave Wire technology is transmitted from a website, server or other remote source, then coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, wireless and microwave are included in the fixing of the associated medium. As used in the present invention, a disk and a disc include a compact disc (CD), a laser disc, a disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.
总之, 以上所述仅为本发明技术方案的较佳实施例而已, 并非用于限定本 发明的保护范围。凡在本发明的精神和原则之内,所作的任何修改、等同替换、 改进等, 均应包含在本发明的保护范围之内。  In summary, the above description is only a preferred embodiment of the technical solution of the present invention, and is not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims

权 利 要 求 Rights request
1、 一种光学数值全加器, 其特征在于, 包括: 1. An optical numerical full adder, characterized in that it includes:
进行级联的至少两个光学全加单元,所述至少两个光学全加单元中的各光 学全加单元包括: 光输入端、 用于输入待相加信号的信号输入端、 至少一个低 位进位信号输入端、用于输出相加结果的信号输出端、至少一个高位进位信号 输出端、 至少一条光波导和基于光学导向逻辑的光开关; At least two optical full-adding units are cascaded. Each optical full-adding unit in the at least two optical full-adding units includes: an optical input terminal, a signal input terminal for inputting a signal to be added, and at least one low-bit carry. A signal input terminal, a signal output terminal for outputting the addition result, at least one high-bit carry signal output terminal, at least one optical waveguide and an optical switch based on optical guidance logic;
所述进行级联的至少两个光学全加单元中,任一个光学全加单元的所述至 少一个高位进位信号输出端与其下一级的光学全加单元的所述至少一个低位 进位信号输入端相连。 Among the at least two optical full-adding units in cascade, the at least one high-bit carry signal output terminal of any optical full-adding unit and the at least one low-bit carry signal input terminal of the optical full-adding unit of the next stage connected.
2、 如权利要求 1所述的光学数值全加器, 其特征在于, 所述各光学全加 单元还包括: 光分束器、 光合束器。 2. The optical numerical full adder according to claim 1, characterized in that each of the optical full adder units further includes: an optical beam splitter and an optical beam combiner.
3、 如权利要求 1或 2所述的光学数值全加器, 其特征在于, 所述各光学 全加单元具体包括两个信号输入端,其中一个信号输入端用于输入第一待相加 电信号, 另一个信号输入端用于输入第二待相加电信号。 3. The optical numerical full adder according to claim 1 or 2, characterized in that each of the optical full adding units specifically includes two signal input terminals, one of which is used to input the first power to be added. signal, and the other signal input terminal is used to input the second electrical signal to be added.
4、 如权利要求 3所述的光学数值全加器, 其特征在于, 所述第一待相加 电信号和所述第二待相加电信号均为多位二进制数; 4. The optical numerical full adder according to claim 3, wherein the first electrical signal to be added and the second electrical signal to be added are multi-digit binary numbers;
所述各光学全加单元用于按照位数从低到高的顺序,对所述第一待相加电 信号和所述第二待相加电信号的每一位以及低位进位信号分别进行相加以获 得相加结果和高位进位信号。 Each of the optical full adding units is used to add each bit of the first electrical signal to be added, the second electrical signal to be added and the low-bit carry signal in order from low to high bits. Added to obtain the addition result and the high-order carry signal.
5、 如权利要求 1-4任意一项所述的光学数值全加器, 其特征在于, 还包 括: 至少一个光电转换器; 5. The optical numerical full adder according to any one of claims 1 to 4, further comprising: at least one photoelectric converter;
所述各光学全加单元包括用于输入低位进位电信号的一个所述低位进位 信号输入端、 用于输出高位进位光信号的一个所述高位进位信号输出端; 所述进行级联的至少两个光学全加单元中,任一个光学全加单元的所述高 位进位信号输出端与一个光电转换器的一端相连,所述光电转换器的另一端与 下一级光学全加单元的所述低位进位信号输入端相连,所述光电转换器用于将 所述高位进位信号输出端输出的结果转换成电信号输出至所述下一级光学全 加单元的所述低位进位信号输入端。 Each of the optical full-adding units includes a low-carry signal input terminal for inputting a low-carry electrical signal, and a high-carry signal output terminal for outputting a high-carry optical signal; the at least two cascaded Among the optical full-adding units, the high voltage of any optical full-adding unit The carry signal output end is connected to one end of a photoelectric converter, and the other end of the photoelectric converter is connected to the low-bit carry signal input end of the next-stage optical full-add unit. The photoelectric converter is used to convert the high-bit carry signal into the high-bit carry signal. The result output by the carry signal output terminal is converted into an electrical signal and output to the low-bit carry signal input terminal of the next-stage optical full addition unit.
6、 如权利要求 1-4任意一项所述的光学数值全加器, 其特征在于, 所述 各光学全加单元包括分别用于输入第一低位进位光信号和第二低位进位光信 号的两个所述低位进位输入端、分别用于输出第一高位进位光信号和第二高位 进位光信号的两个所述高位进位输出端,所述第一低位进位光信号和第二低位 进位光信号的组合表示低位进位,所述第一高位进位光信号和第二高位进位光 信号的组合表示高位进位; 6. The optical numerical full adder according to any one of claims 1 to 4, characterized in that each of the optical full adding units includes a first low-order carry optical signal and a second low-order carry optical signal respectively. The two low-bit carry input terminals and the two high-bit carry output terminals respectively used to output the first high-bit carry optical signal and the second high-bit carry optical signal, the first low-bit carry optical signal and the second low-bit carry optical signal The combination of signals represents a low-bit carry, and the combination of the first high-bit carry optical signal and the second high-bit carry optical signal represents a high-bit carry;
所述进行级联的至少两个光学全加单元中,任一个光学全加单元的输出所 述第一高位进位光信号的高位进位输出端与其下一级的所述输入第一低位进 位光信号的低位进位输入端相连,输出所述第二高位进位光信号的高位进位输 出端与其下一级的所述输入第二低位进位光信号的低位进位输入端相连。 Among the at least two optical full-adding units in cascade, the high-order carry output terminal of any optical full-addition unit outputting the first high-order carry optical signal and the input first low-order carry optical signal of the next stage The low-order carry input terminal is connected, and the high-order carry output terminal that outputs the second high-order carry optical signal is connected to the low-order carry input terminal of the next stage that inputs the second low-order carry optical signal.
7、 如权利要求 1-6任意一项所述的光学数值全加器, 其特征在于, 所述 光开关为微环谐振器开关或马赫曾德干涉仪 MZI开关。 7. The optical numerical full adder according to any one of claims 1 to 6, characterized in that the optical switch is a microring resonator switch or a Mach-Zehnder interferometer MZI switch.
8、 如权利要求 1-7任意一项所述的光学数值全加器, 其特征在于, 所述 至少一条光波导、 光分束器、 光合束器和光开关中的光学结构为硅、 绝缘衬底 上的硅 soi或 m-v族化合物中的任一种。 8. The optical numerical full adder according to any one of claims 1 to 7, characterized in that the optical structures in the at least one optical waveguide, optical beam splitter, optical beam combiner and optical switch are silicon, insulating lining Any one of silicon soi or m-v group compounds on the bottom.
9、 一种光学数值全加方法, 其特征在于, 包括: 9. An optical numerical full addition method, characterized by including:
获取所输入的待相加信号和低位进位信号; Get the input signal to be added and the low-bit carry signal;
根据所述待相加信号和低位进位信号, 控制基于光导向逻辑的开关的状 态, 以控制输入光在至少一条光波导中的走向; According to the signal to be added and the low-bit carry signal, the state of the switch based on the light guidance logic is controlled to control the direction of the input light in at least one optical waveguide;
根据输出光的情况获取相加结果和高位进位信号; Obtain the addition result and high-bit carry signal according to the output light conditions;
将所述高位进位信号作为所述待相加信号的下一次相加计算的低位进位 信号进行输出。 The high-bit carry signal is output as the low-bit carry signal of the next addition calculation of the signal to be added.
10、如权利要求 9所述的方法,其特征在于,所述低位进位信号为电信号, 所述高位进位信号为光信号; 10. The method of claim 9, wherein the low-order carry signal is an electrical signal, and the high-order carry signal is an optical signal;
所述将所述高位进位信号作为所述待相加信号的下一次相加计算的低位 进位信号进行输出, 包括: Outputting the high-order carry signal as the low-order carry signal for the next addition calculation of the signal to be added includes:
将所述高位进位信号转换成电信号; Convert the high-bit carry signal into an electrical signal;
将转换成电信号的所述高位进位信号作为所述待相加信号的下一次相加 计算的低位进位信号进行输出。 The high-bit carry signal converted into an electrical signal is output as a low-bit carry signal for the next addition calculation of the signal to be added.
11、 如权利要求 9所述的方法, 其特征在于, 所述低位进位信号包括第一 低位进位光信号和第二低位进位光信号,所述高位进位信号包括第一高位进位 光信号和第二高位进位光信号; 11. The method of claim 9, wherein the low carry signal includes a first low carry optical signal and a second low carry optical signal, and the high carry signal includes a first high carry optical signal and a second low carry optical signal. High carry optical signal;
所述将所述高位进位信号作为所述待相加信号的下一次相加计算的低位 进位信号进行输出, 包括: Outputting the high-order carry signal as the low-order carry signal for the next addition calculation of the signal to be added includes:
将所述第一高位进位信号作为所述待相加信号的下一次相加计算的第一 低位进位光信号进行输出; Output the first high-bit carry signal as the first low-bit carry optical signal for the next addition calculation of the signal to be added;
将所述第二高位进位信号作为所述待相加信号的下一次相加计算的第二 低位进位光信号进行输出; Output the second high-order carry signal as the second low-order carry optical signal of the next addition calculation of the signal to be added;
其中,所述第一低位进位光信号和第二低位进位光信号的组合表示低位进 位, 所述第一高位进位光信号和第二高位进位光信号的组合表示高位进位。 Wherein, the combination of the first low-bit carry optical signal and the second low-bit carry optical signal represents a low-bit carry, and the combination of the first high-bit carry optical signal and the second high-bit carry optical signal represents a high-bit carry.
12、 一种光学数值全加装置, 其特征在于, 包括: 12. An optical numerical full addition device, characterized in that it includes:
第一获取单元, 用于获取所输入的待相加信号和低位进位信号; The first acquisition unit is used to acquire the input signal to be added and the low-bit carry signal;
控制单元, 用于根据所述待相加信号和低位进位信号,控制基于光导向逻 辑的开关的状态, 以控制输入光在至少一条光波导中的走向; A control unit configured to control the state of the switch based on the light guidance logic according to the signal to be added and the low-bit carry signal to control the direction of the input light in at least one optical waveguide;
第二获取单元, 用于根据输出光的情况获取相加结果和高位进位信号; 第一输出单元,用于将所述高位进位信号作为所述待相加信号的下一次相 加计算的低位进位信号进行输出。 The second acquisition unit is used to acquire the addition result and the high-bit carry signal according to the output light; the first output unit is used to use the high-bit carry signal as the low-bit carry for the next addition calculation of the signal to be added. The signal is output.
13、 如权利要求 12所述的装置, 其特征在于, 所述低位进位信号为电信 号, 所述高位进位信号为光信号; 所述第一输出单元包括: 13. The device according to claim 12, wherein the low-order carry signal is an electrical signal, and the high-order carry signal is an optical signal; The first output unit includes:
转换单元, 用于将所述高位进位信号转换成电信号; A conversion unit for converting the high-bit carry signal into an electrical signal;
第二输出单元,用于将转换成电信号的所述高位进位信号作为所述待相加 信号的下一次相加计算的低位进位信号进行输出。 The second output unit is configured to output the high-bit carry signal converted into an electrical signal as a low-bit carry signal for the next addition calculation of the signal to be added.
14、 如权利要求 12所述的装置, 其特征在于, 所述低位进位信号包括第 一低位进位光信号和第二低位进位光信号,所述高位进位信号包括第一高位进 位光信号和第二高位进位光信号; 14. The device of claim 12, wherein the low carry signal includes a first low carry optical signal and a second low carry optical signal, and the high carry signal includes a first high carry optical signal and a second low carry optical signal. High carry optical signal;
所述第一输出单元包括: The first output unit includes:
第三输出单元,用于将所述第一高位进位信号作为所述待相加信号的下一 次相加计算的第一低位进位光信号进行输出; A third output unit configured to output the first high-order carry signal as the first low-order carry optical signal for the next addition calculation of the signal to be added;
第四输出单元,用于将所述第二高位进位信号作为所述待相加信号的下一 次相加计算的第二低位进位光信号进行输出; The fourth output unit is used to output the second high-order carry signal as the second low-order carry optical signal for the next addition calculation of the signal to be added;
其中,所述第一低位进位光信号和第二低位进位光信号的组合表示低位进 位, 所述第一高位进位光信号和第二高位进位光信号的组合表示高位进位。 Wherein, the combination of the first low-bit carry optical signal and the second low-bit carry optical signal represents a low-bit carry, and the combination of the first high-bit carry optical signal and the second high-bit carry optical signal represents a high-bit carry.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2646366C1 (en) * 2016-12-07 2018-03-02 Частное образовательное учреждение высшего образования "ЮЖНЫЙ УНИВЕРСИТЕТ (ИУБиП)" Optoelectronic compromise summator
RU2682410C2 (en) * 2017-09-07 2019-03-19 Федеральное государственное бюджетное образовательное учреждение высшего образования "Ростовский государственный экономический университет (РИНХ)" Optoelectronic compromise summator

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106444207A (en) * 2016-10-18 2017-02-22 中国科学院半导体研究所 Integrated all-optical switch
CN107872740B (en) * 2017-12-25 2023-03-28 清华大学 All-optical data routing device
CN111240400B (en) * 2020-01-20 2023-10-20 光子算数(北京)科技有限责任公司 Optical division module, photonic neural network chip, chip system and optical divider

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042814A (en) * 1976-06-28 1977-08-16 The United States Of America As Represented By The Secretary Of The Navy Electro-optic binary adder
US5136530A (en) * 1990-07-26 1992-08-04 Yao Li Ultrafast digital optical signal processing using a Venn diagram based spatial encoding technique
JPH11231959A (en) * 1998-02-18 1999-08-27 Yukichi Sugimura Optical '00' cut adder
CN102081512A (en) * 2011-01-13 2011-06-01 清华大学 Optical binary carry adder
CN102520904A (en) * 2011-12-28 2012-06-27 中国科学院半导体研究所 Binary optical adder based on micro-ring resonators

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7216141B2 (en) * 2003-11-06 2007-05-08 International Business Machines Corporaiton Computing carry-in bit to most significant bit carry save adder in current stage
CN101526715A (en) * 2008-03-04 2009-09-09 电子科技大学 Full-optical logic gate
CN102684680B (en) * 2012-04-25 2014-10-15 南通大学 Four-bit three-valued reversible full adder
CN102902507A (en) * 2012-10-16 2013-01-30 南京航空航天大学 Four-digit reversible serial/parallel adder based on reversible shift registers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042814A (en) * 1976-06-28 1977-08-16 The United States Of America As Represented By The Secretary Of The Navy Electro-optic binary adder
US5136530A (en) * 1990-07-26 1992-08-04 Yao Li Ultrafast digital optical signal processing using a Venn diagram based spatial encoding technique
JPH11231959A (en) * 1998-02-18 1999-08-27 Yukichi Sugimura Optical '00' cut adder
CN102081512A (en) * 2011-01-13 2011-06-01 清华大学 Optical binary carry adder
CN102520904A (en) * 2011-12-28 2012-06-27 中国科学院半导体研究所 Binary optical adder based on micro-ring resonators

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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RU2682410C2 (en) * 2017-09-07 2019-03-19 Федеральное государственное бюджетное образовательное учреждение высшего образования "Ростовский государственный экономический университет (РИНХ)" Optoelectronic compromise summator

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