WO2015088320A1

WO2015088320A1 - Process of texturing silicon surface for optimal sunlight capture in solar cells

Info

Publication number: WO2015088320A1
Application number: PCT/MY2014/000170
Authority: WO
Inventors: Gunawan Witjaksono; A. S. M. Mukter Uz ZAMAN; Nurul Huda ABDUL RAZAK
Original assignee: Mimos Berhad
Priority date: 2013-12-09
Filing date: 2014-06-10
Publication date: 2015-06-18
Also published as: MY164423A

Abstract

A process of treating a silicon substrate surface for optimizing sunlight capture in the fabrication of solar cells is disclosed. Each of the two sides of the silicon substrate is textured with a laser source to roughen its surface by fabricating nanoscale structures thereon. Surface texturing may be conducted on both sides of a crystalline silicon wafer by flipping over to repeat our process on the other side such that sunhght reflectivity is minimized and photon trapping is maximized. The process may be conducted in room temperature and vacuum in a dry-etch processing environment. The substrate may undergo translation in the X- Y axes for control of the substrate's movement to achieve the requisite texturing by the laser beam of a pulse laser of Nd-YAG source in 533 nm and 1024 nm wavelengths at > 75 joules/pulse with translation speed of < 0.5 mm/second. Our process is suitable for solar cells that includes heteroj unction structures, specifically, with intrinsic thin layer (HIT) structure and particularly on crystalline silicon (c-Si) (p-type) substrate which may include exposure to nano-second to femto-second range pulsed laser on dry thin film solar cell wafer.

Description

Process of texturing silicon surface for

optimal sunlight capture in solar cells

TECHNICAL FIELD

[001] This invention generally relates to the fabrication of solar cells, including he teroj unction solar cells with intrinsic thin layer (HIT) structure. Specifically, it concerns how the silicon substrate or wafer surface may be treated to optimize the resultant solar cell's efficiency by minimizing reflectance and maximises light trapping and absorption.

BACKGROUND ART

[002] Efforts to improve efficiency of solar cells, particularly heterojunction solar cells with intrinsic thin layer structure (HIT solar cells) are either hindered or limited by one or combination of the following factors: (i) optical loss due to light scattering, back reflection and photon absorption losses; (ii) resistance losses due to bad ohmic contacts between metal contact points; and (iii) recombination loss due to heterojunction interface surface quality and surface defects on dangling bond which increases the interface-defect densities. To mitigate the first factor, i.e. optical loss from light scattering and back reflection, some of the prior art efforts known are as follows.

[003] In United States Published Application No. US 2010/0186802 (Borden), structures with triangular edges are textured on the substrate by a masking oxide layer on the front and back of the cell. Holes are then patterned over the masking oxide, resulting in triangular structures with sharp edges textured on the surface. Conventional photolithographic process is used in the texturing but there is no mention of laser texturing.

[004] In PCT Published Application No. WO 2011/022687 (Sionyx) laser process is used to texture sufaces with micron-sized and/or nano-sized features. The texturing is not applied to the entire wafer substrate surface but only to specific regions and/or layers, e.g. to facilitate coupling, deposition or growth instead of for anti-reflectivity or absorption of light.

[005] In United States Patent No. US-8,399,331 (Solexel) pulsed laser processing with picosecond pulse length is used to texture surfaces into pyramidal structures which tips are flattened or truncated. The texturing only is for ablation or patterning of metalization layers rather than for solar intake. The laser processing requires the use of a template which is reusable. In PCT Published Application No. WO 2011/072179 (Solexel) laser ablation is achieved by pulsed picosecond laser processing. To achieve surface texturing, however, it must be complemented with potassium hydroxide (KOH) alkali etching to enhance the texturing into pyramidal structures with sharp tips.

[006] In United States Patent No. US-8,309,389 (SiOnyx) discloses pulsed femtosecond, picosecond and nanosecond laser processes for texturing surfaces of specific regions with features created in the average sizes of between 50 nm to 10 microns. However, this laser texturing is directed to removal of damaged portions by etching and does not result in any specific or consistent nanoscale feature that might be useful for bight absorption and anti-reflectance.

[007] In United States Patent No. US-7,884,446 (Harvard) discloses pulsed laser source at femtosecond to form submicron spikes on semiconductor substrate using 3-dimensional translation, i.e. over XYZ axes. The spikes have high profile heights of 100 nm to 500 nm and are not in pyrimidal shapes. In U.S. Published Application No. US-2009/0194160 (Chin), rod-shape nanostructures are formed using laser-interference lithography. [008] It would thus be desirable to provide for a method of laser processing a silicon substrate surface so that nanostructures may be patterned on the surface to avoid, reduce or mitigate optical loss due to light scattering and back reflection in the fabrication of solar cells, particularly, heterojunction structure with intrinsic thin layer (HIT) solar cells. SUMMARY OF INVENTION [009] Our proposed invention generally proposes to utilize the heterostructure design and to texture surfaces which are the key combination of features for a heterostructure (HET) solar cell design to give high quality and higher efficiency on the solar cells. The optimum heterostructure solar cell endeavours to give a conversion efficiency of 23.35% due to lower defect state, higher quantum efficiency and excellent carrier collection. Besides optimizing the heterostructure to produce high efficiency solar cell, texturing on silicon and metal surfaces is also proposed to further enhance the conversion efficiency.

[010] In particular, our invention endeavours to improve efficiency of solar cells, particularly HIT solar cells, by texturing the silicon surface of the wafer into nanostructure patterns such that the aforesaid optical loss. Our invention also endeavours to provide new fabrication processes which are more cost-effective and lower the fabrication cost of heterojunction solar cells. This may include repeating nano-pulse laser processing to modify or texture silicon surfaces, including repeating the texturing on both sides by flipping over the crystaUine silicon (c-Si) substrate so that, for example, the emitter and back surface field (BSF) layers may be similarly laser-processeed and textured.

[011] It is thus a purpose of our invention to texture the silicon substrate surfaces in a manner so as to increase photon absorption and entrapment thereby. Surface texturing may modify photon paths on the interfaces and gives higher chance for photons to reach active region and to produce more currents. Surface texturing may be performed on the both sides of c-Si wafer, emitter layer, BSF layers and both metal contacts.

[012] To these ends, we disclose a process of treating a silicon substrate surface for optimizing sunlight capture in the fabrication of solar cells wherein at least one side of the silicon substrate is textured with a laser source to roughen its surface by fabricating nanoscale structures thereon. Preferably, the surface texturing is conducted on substantially each of the two sides of a crystaUine silicon wafer such that sunlight reflectivity is minimized and photon trapping is maximized. More preferably, the process is conducted in room temperature and vacuum in a dry-etch processing environment.

[013] In one aspect of our invention, the substrate or wafer is flipped over so that our texturing process may be repeated on the other side. The substrate preferably undergoes translation in the X-Y axes for control of the substrate's movement to achieve the texturing by the laser source. Preferably, the laser power used is > 75 joules/pulse with slow translation motion. More preferably, the translation speed is < 0.5 mm/second to pattern the textured surface.

[014] In a second aspect of our process, the laser source is a pulse laser, including from Nd-YAG source, conducted in a dry etching environment, wherein the wavelengths selected includes 533 nm and 1024 nm. Preferably, the solar cells for which our process may be employed generally includes heterojunction structures, and specifically, intrinsic thin layer (HIT) structure.

[015] In a third aspect, the texturing process is performed on both surfaces of the crystalline silicon (c-Si) (p-type) substrate using laser processing which, preferably, includes exposing nano-second to femto-second range pulsed laser on dry thin film solar cell wafer.

LIST OF ACCOMPANYING DRAWINGS

[016] The drawings accompanying this specification as listed below may provide a better understanding of our invention and its advantages when referred to in conjunction with the detailed description that follows. These drawings are exemplary and non-limiting embodiments of our process:

[017] FIGURE 1 shows an overall flow chart of our proposed process for fabricating solar cells, including heterojunction (HET) solar cells with intrinsic thin layer (HIT) wherein the left portion of the flow concerns surface texturing of silicon substrate. [018] FIGURE 2 elaborates on the process steps of the surface texturing portion of FIG. l's overall flow chart, in which nano-pulse laser texturing is used. [019] FIGURE 3 illustrates a schematic profile of surfaces which have been textured by a process according to our invention.

[020] FIGURE 4 indicates a simulated absorption spectrum of the proposed HET solar cell using AFORS-HET modelling;

[021] FIGURE 5 displays scanning electromicrographs (SEM) of an actual textured surface with a laser texturing mode according to our invention;

[022] FIGURE 6 presents a graph on the obtained reflectance from a surface that has been textured with our invention; and

[023] FIGURE 7 reveals in detail the rounded tip profile of the nanostructure resulting from our laser texturing of surfaces.

DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

[024] With reference to FIGURE 1, which illustrates an overall flow chart of our proposed process for fabricating solar cells such as the he teroj unction (HET) solar cells with intrinsic thin layer (HIT). The overall process starts with the surface texturing of silicon 100 (shown on the left), which is the subject of the present patent application. Subsequent stages of the process may include passivating defects to create an intrinsic amorphous silicon a-SiOx:H 200 on the textured surface and later patterning and treating the contact grids 300 to enhance metal contacts to the transparent conducting oxide (TCO) films, which stages may be covered elsewhere.

[025] Generally, our invention comprises a process for treating a silicon substrate surface for optimizing sunlight capture in the fabrication of solar cells wherein at least one side and preferably both sides of said silicon substrate is textured with a laser source to roughen its surface by fabricating nanoscale structures thereon. The texturing involves modifying the silicon surface with laser-based process to produce surface nanostructures on the surface for better light absorption and reduce back reflection. Our surface texturing process may be applied to substantially the whole of the silicon wafer surface as part of the fabrication of solar cells thereon.

[026] FIGURE 2 elaborates on the process steps of the silicon surface texturing portion of FIG. l's overall flow chart, in which nano-pulse laser texturing is used. Preferably, our surface texturing process is applied or conducted on both sides of a crystalline silicon wafer so that sunlight reflectivity is minimized and photon trapping is maximised in the complete solar cell. Our process is preferably conducted in room temperature and vacuum in dry-etch processing environment 102 which may be provided by a conventional dry-etching chamber. Although our laser- texturing process does not require vacuum, it is a preferred condition to minimise dust and other contaminants from compromising the surface to be laser-textured.

[027] In the initial Step 102, the silicon wafer or substrate is placed inside the dry-etch processing chamber at room temperature. The substrate is preferably secured or held in a manner such that it does not move during the nano-pulse laser processing. Rough and soft pumping action 104 is carried out so that the chamber achieves a certain degree of vacuum. Pumping action starts with rough pumping to lower the pressure from atmospheric to a low, near vacuum pressure of about 10³ atm. This is followed by soft pumping in which the pressure is further lowered to between 10³ to 10 ⁴ atm. It should be noted that our laser-texturing process do not require high vacuum conditions.

[028] Once the wafer is ready, the laser system may now be prepared by turning on its power and directing the laser light 106 onto a designated surface area of the substrate (whether as a sample area or entire area of the wafer and depending on exposure time permissible, die array layout and manufacturing design) through an optically open window of the chamber. The exposure of the wafer surface to the laser beam requires parameter settings on the movement translation 108 in X-Y axes. Hence, if the wafer's position is fixed, then the laser beam's movements need to be translated with the parameter settings. Alternatively, with a fixed laser beam, the wafer movement may be translated by a predetermined set of parameter settings. In either setting, the parameters determining movement and translation are to enable the laser beam to give the optimal surface roughness and good and uniform texturing 110 across the wafer surface in vacuum.

[029] To this end, the main parameters set are designed to control and adjut laser power and specific wavelengths to provide optimal beam incidence to the silicon surface and the movement translated 108 designed for sufficient time to allow for the laser beam to etch the surface with adequate energy transmitted to form the texture. During the laser beaming process, neutral gas is supplied so that a steady flow of fluid 112 is provided during the texturing process to remove any material residue arising from the laser processing. Transition along XY-axes, removal of residue by fluid flow and suction out and laser texturing will continue 114 until the entire surface of the wafer is fully textured. Once the texturing is completed on the whole wafer surface, the wafer may be flipped over 116 so that the process may be repeated to have the laser beam pattern the texture on the back side of c-Si surface.

[030] The main parameter settings of the laser beam texturing process are as follows: The laser power employed is at least 75 joules per pulse (> 75 J/pulse) with slow translation motion. Preferably, the translation speed is less than 0.5 mm per second (< 0.5 mm/s) to allow for more time per distance such that sufficient laser energy may be expended on the silicon surface to pattern the textured surface. The laser source is preferably a pulse laser source, including that of Nd:YaG (neodymium-doped yttrium aluminum garnet; i.e. using Nd:Y3AlsOi2 crystal as a lasing medium for solid-state lasers, in a dry etching environment. The preferred or selected wavelengths of the pulse laser includes 533 nm and 1024 nm. Generally, the surfaces which have been textured with patterns using our nano- pulse laser process are that of the doped emitter layer in order to reduce solar reflectivity and thus increase photon-conversion to electricity. While nano-second pulse laser is specifically described here, our pulse laser process may include laser pulse exposure in the range of nano-second to femto-second range on dry thin film solar cell wafer. The surfaces to be textured are on both sides of the crystalline silicon (c-Si) substrate which is to initiate creation of amorphous thin layers and improve photon chances to go into the absorbing layer. These textured surfaces are integrated in the high-efficiency heterostructure solar cell.

[031] In FIGURE 3, a schematic profile of surfaces which may be textured by a process according to our invention is shown. Specifically, the schematic transverse profile 130 of the crystalline silicon (c-Si) wafer 131 is shown in this drawing whereby intermediate surfaces of a heterojunction (HET) solar cell 134a (top) and 134b (bottom) are textured, including the topmost silicon surface 135a, 135b and metal contacts 136. On the front side, the various surfaces to be textured include an emitter layer 133 which surface is textured 135a for reducing light reflection and improving light absorption by entrapping photons. Multiple layers of surfaces may be textured in the fabrication of the heterojunction intrinsic thin layer (HIT) solar cells 132 on the silicon wafer 131.

[032] The texturing may initially be made on the crystalline c-Si(n-type) 134a surface before the amorphous a-SiOx:H passivation layer 138a is laid over the textured surface followed by the amorphous i-type a-Si layer 137a. The a- SiC:H(n+) emitter layer 133 may then be grown on the top side of the wafer. On the rear side, after the wafer has been flipped over 116, the same texturing process may be repeated whereby, after the c-Si (p-type) layer 134b has been textured, the passivation layer 138b of intrinsic a-SiOx:H may be laid. This is to be followed by amorphous i-type a-Si 137b before the back surface field (BSF) layer 139 is grown and which surface is then textured.

[033] The textured surface of the BSF layer 139 is intended to replace the conventional transparent conductive oxide (TCO) layer which is usually provided on top of the amorphous i-Si window layer and passivation layer. With the textured surfaces of our BSF layer 139 on both sides, the photo-absorption efficiency is improved by reducing reflectance (optical) loss (or "black-body radiation" loss) as well as reducing "recombination" loss in solar cells. Such textured surfaces on Si surfaces would allow more photons passing through active (absorbing) layer and immediately generate the electric current. [034] Another way of improving heterostructure (HET) solar cells is to provide wider bandgap for the window layer, passivation layers and intrinsic amorphous layers so that electrons (holes) cannot recombine with holes (electrons) and cannot diffuse through the barrier formed by the heterojunction. A simulated absorption spectrum of the proposed HET solar cell using AFORS-HET modelling is shown in FIGURE 4 wherein it is found that the junction between the conduction band and valence band is ideal. [035] This is because using an appropriate intrinsic layer like a-Si layer on both sides of c-Si wafer modifies the bandgap interface and produces better efficiency. The detailed structure includes p-type substrate, pasivation layer, i.e. intrinsic layer such as a-SiO:H, amorphous intrinsic Si layer and amorphouse emitter layer, i.e. doped SiC, which contributes to the wide bandgap layer. Such an emitter layer and the bandgap layer, i.e. SiC, allow more photons to pass through to reach the absorber layer. The combination of emitter a-SiC:H and intrinsic a-SiOx:H, which is patterned on the both side of the c-Si, reduces dangling bonds and provides more efficiency due to the wider bandgap and surface passivation. The intrinsic amorphous silicon a-SiOx:H also gives a large influence on the nucleation and nanocrystallites.

[036] P-doped crystalline silicon (c-Si) wafer is preferred in our methodology and trials conducted. P-type c-Si wafers have excellent lifetime performance because prime grade c-Si should have the special characteristics in which minority carrier in material is maintained in optimal value so that high current and voltage may always be generated. P-type c-Si has as majority holes but as minority electrons as carriers. Our invention is to improve the ability of heterostructure solar cell to maintain the minority carriers without losses. If the minority carriers have losses then the device's efficiency will become less in due course and the energy generated would not be enough to power any equipment. In theory, electrons possess higher mobility in their characteristics compared to holes. A p-type c-Si substrate is not expensive like an n-type c-Si substrate. Additionally, back surface field (BSF) may be improved to collect more carriers that may be generated from the rear side. BSF also can raise the short circuit current. BSF can be formed as a junction between high and low doped of the same type of dopant.

[037] FIGURE 5 displays scanning electromicrographs (SEM) of actual surfaces textured with various laser texturing modes conducted in our experiments to find the optimal surface texturing in arriving at our invention. Three of the laser texturing modes' parameter settings are reproduced in the table below.

Table 1

Parameter settings for experimental modes of laser texturing

Note: For infrared and infrared + Green mode, only translational speed of 2 mm/s is implemented.

[038] The reflectance in percentage terms for each of the green, infrared and combination of green + infrared laser beams that we have experimented with in our trials are reproduced in Table 2 below.

Table 2

Reflectance measured for surface textured by laser beams

[039] A flat, polished crystalline silicon wafer has an average reflectance of 38%. For a sample surface with small dots, the average reflectance is 36%, which is just 2% less than that of the polished c-Si wafer. For surfaces with crater-like structures, the reflectance may be decreased down to 29%. More interesting reduction has been obtained in normal pyramid-like structures, with an average reflectance of 18%.

[040] FIG. 5(a) and 5(b) show the surface morphology of the resultant laser texturing, i.e. variable exposure time is 78 joules per pulse in infrared (IR) mode only for 30 seconds. In FIG 5(c) the holographic view of a large area of the textured surface is shown.

[041] FIGURE 6 presents a graph on the obtained wide-spectrum reflectance from a surface that has been textured with our invention. The textured surface reflectivity results shown in FIG. 2 are given at various power, scanning speed, and modes. The reflectivity is measured in the sunlight spectrum, covering from 400 nm to 1200 nm. From the graph, it may be seen that low reflectivity can be achieved by texturing the surface. Improvement is significant without the need for the conventional TCO layer deposition which would require high temperature processing and is thus costly. With our process, such high temperature process is avoided and our entire fabrication process may be performed at room temperature, thus reduces surface damage, and which contributes to a high efficiency solar cell.

[042] Textured surface also determines the quality of subsequent thin layer formation thereon. Rough edges on textured surface will create defects on the interface which reduces solar efficiency due to defect trapping. It is thus desirable that the textured surfaces have smooth or patterns with rounded edges or tips to produces better transition for the thin layer interface.

[043] FIGURE 7 shows (a) SEM of a textured surface 701 after being deposited with an intrinsic thin layer thereon. The textured nano-features has smooth and rounded tips 702, as shown in schematic drawing (b), resulting in high-quality intrinsic thin layer thus producing better thin film growth and with fewer defects. FIG 7(b) also shows multiple thin layer stackings on the textured surface. The rounded textured surface is required to produce uniform and smooth thin layer. Some of the parameters for deposition or growth of the various a-Si, c-Si and BSF layers that we have experimented with are reproduced in Table 3 below.

Table 3

Parameters used for fabrication of a-Si, c-Si and BSF layers

[044] Surface texturing fabrication in this invention is done using dry-etch process to improve yield, manufacturability, and cost. Our approach of dry-etch process enables nano-pulse laser exposure to be conducted at room temperature (RT) to texture the surfaces. This may be contrasted with the high temperature environment required for conventional TCO layer deposition. The lower temperature fabrication gives advantages of higher yield and efficiency due to less damage resulting from the fabrication processs. Higher open circuit voltage (V c) of solar cells fabricated from the low temperature process during deposition of a-Si layers has been reported. [045] It has also been reported that higher process temperature produces less Voc, thus reducing efficiency. As our invention using nano-pulse laser exposure at optimized power and mode at room temperature to reduce the surface damage during texturing, the subsequent growth of intrinsic thin layer may be performed in moderate temperature, i.e sputtering equipment, in order to get solar cells with higher Voc. The texturing of silicon surface by laser processing also helps to passivate the defects on dangling bond so that the self-formation of intrinsic a-SiOx:H layer grown on both front and back sides of c-Si substrate have reduced tunneling effects. The intrinsic amorphous silicon a-SiOx:H gives a large influence on the nucleation and nanocrystaUites by passivating the defects on dangling bond. It also terminates the hydrogen on the c-Si wafer surface and thus avoid epitaxial growth.

[046] Apart from the aforesaid advantages of our process, there are many other aspects of our invention that may be implemented in alternative forms, variations, substitution or modifications, particularly in respect of parameter settings of the laser beam, dry etching environment and translation speed. Similarly, machines, apparatuses or hardware systems for processing silicon wafers according to the teachnings herein may be correspondingly modified, adapted or customized to enable different implementations of our invention as understood by a person skilled in the art without departing from our inventive principle or method, e.g. the amount of energy required to texture the silicon surface by varying the laser oscillator power and length of time and beam area according to calculations by such a skilled person. Such variations, alternatives, substitutes, analogs or equivalents are to be considered as falling within the letter and scope of the following claims.

Claims

1. A process of treating a silicon substrate surface for enhancing electromagnetic radiation absorption in the fabrication of solar cells wherein at least one side of said sihcon substrate is textured with a laser source to roughen its surface by fabricating nanoscale structures thereon.

2. The process according to Claim 1 wherein the surface texturing is conducted on substantially each of the two sides of a crystalline silicon wafer such that electromagnetic radiation reflectivity is minimized and photon trapping is maximized.

3. The process according to Claim 1 conducted in room temperature and vacuum in dry-etch processing environment.

4. The process according to Claim 1 wherein the substrate or wafer is flipped over for texturing to be repeated on the other side.

5. The process according to Claim 1 wherein the substrate surface undergoes XY axes transition for control of substrate's movement to achieve the texturing by the laser source.

6. The process according to Claim 5 wherein the fabrication employs at least one of the following parameters:

laser power used is > 75 joules/pulse with slow translation motion;

translation speed is < 0.5 mm/second to pattern the textured surface.

7. The process according to Claim 1 wherein the laser source is pulse laser, comprising Nd-YaG, conducted in a dry etching environment.

8. The process according to Claim 7 wherein the wavelengths of the pulse laser selected includes 533 nm and 1024 nm.

9. The process according to Claim 1 wherein the solar cells to be fabricated has a he teroj unction structure including a intrinsic thin layer (HIT) structure wherein texturing is performed on both surfaces of the cirystalline silicon (c-Si) (p-type) substrate.

10. The process according to Claim 99 wherein the laser processing includes exposing nano-second to femto-second range pulsed laser on dry thin film solar cell wafer.

11. A silicon wafer, including a solar cell, textured according to the process of any one or combination of Claims 1 to 10.

12. An apparatus for dry-etch fabrication of solar cells adapted for running a process according to any one or combination of Claims 1 to 10.

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