WO2017026997A1 - Processing device operation enablement - Google Patents

Processing device operation enablement Download PDF

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Publication number
WO2017026997A1
WO2017026997A1 PCT/US2015/044315 US2015044315W WO2017026997A1 WO 2017026997 A1 WO2017026997 A1 WO 2017026997A1 US 2015044315 W US2015044315 W US 2015044315W WO 2017026997 A1 WO2017026997 A1 WO 2017026997A1
Authority
WO
WIPO (PCT)
Prior art keywords
processing device
pins
pinout
profile
contacts
Prior art date
Application number
PCT/US2015/044315
Other languages
French (fr)
Inventor
Siamak Tavallaei
Chanh V. Hua
Pari RAJARAM
Gerald K. Kleyn
Original Assignee
Hewlett Packard Enterprise Development Lp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Enterprise Development Lp filed Critical Hewlett Packard Enterprise Development Lp
Priority to PCT/US2015/044315 priority Critical patent/WO2017026997A1/en
Publication of WO2017026997A1 publication Critical patent/WO2017026997A1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2844Fault-finding or characterising using test interfaces, e.g. adapters, test boxes, switches, PIN drivers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889Interfaces, e.g. between probe and tester

Definitions

  • Printed circuit boards and sockets are typically designed to accept a single type of processing device from a single vendor.
  • a new printed circuit board or socket having a different connection configuration is often needed to accommodate a processing device from a different vendor.
  • multiple printed circuit boards and sockets having multiple connection configurations are typically needed when multiple processing devices from multiple vendors are implemented.
  • FIG. 1A shows a simplified isometric view of a processing assembly, according to an example of the present disclosure
  • FIG. 1 B shows a simplified exploded side view, partially in cross section, of a processing assembly, according to another example of the present disclosure
  • FIG. 2 shows a block diagram of the board depicted in FIG. 1A, according to an example of the present disclosure
  • FIG. 3 shows a block diagram of the board depicted in FIG. 1 B, according to an example of the present disclosure.
  • FIG. 4 depicts a flow diagram of a method for enabling operation of a processing device having a plurality of pins, according to an example of the present disclosure.
  • a processing device may be detected to have been placed into electrical communication with a receiving apparatus, such as the board or a socket, and information regarding the processing device may be identified.
  • a pinout profile of the processing device may be determined from the identified information regarding the processing device, for instance, from a table that identifies correlations between multiple processing devices and their respective pinout profiles.
  • properties of one or both of the contacts on the receiving apparatus and the pins in the processing device 120 may be programmed such that functions of the contacts are compatible with the functions of the pins in the processing device to which the contacts are respectively in electrical communication.
  • the programming may be performed to enable voltage to applied to a pin at the level identified for that particular pin, to enable a particular type of data signals to be communicated over a pin as identified for that particular pin, etc.
  • the methods and apparatuses disclosed herein therefore enable processing devices having different configurations, e.g., pinout profiles, number of pins, pinout configurations, etc., to operate with a board and/or socket.
  • a manufacturer or vendor of the board and/or socket may not be required to fabricate or obtain particular boards and/or sockets to be used with particular processing devices.
  • the same board and/or socket may be employed to enable operation of multiple types of processing devices.
  • the same pinout arrangement on the board and/or socket may be used to mount different processing devices from different companies. This compatibility with multiple different processing devices may save costs as different boards and/or sockets may not need to be fabricated or obtained whenever a decision is made to use a different processing device.
  • FIG. 1 A shows a simplified isometric view of a processing assembly 100, according to an example of the present disclosure.
  • the processing assembly 100 may include a board 1 10 and a controller 1 12.
  • the board 1 10 may be a printed circuit board (PCB) and the controller 1 12 may be a baseboard management controller (BMC) or other type of controller that is to perform various functions in the board 1 10.
  • the board 1 10 may include a plurality of contacts (not shown) to which a plurality of pins (not shown) of a processing device 120 may be electrically connected. That is, for instance, the plurality of contacts may be receptacles into which the pins of the processing device 120 may be inserted or may otherwise be contacted.
  • the contacts in the board 1 10 may equivalently be referenced as pins.
  • the processing device 120 may be a central processing unit (CPU), a microprocessor, a processor, an application specific integrated circuit (ASIC), a system-on-chip (SoC), or the like.
  • the processing device 120 may be a processing device manufactured by any of a plurality of different vendors or manufacturers. As different vendors typically design and fabricate their processing devices differently from each other, the processing devices from different vendors may have different pinout profiles as compared to each other. In addition, the same vendor may offer multiple processing devices that have different pinout profiles with respect to each other.
  • the processing assembly 100, 100' disclosed herein may enable processing devices 120 having different pinout profiles to be properly connected to the board 1 10. That is, in one example, the processing assembly 100, 100' may enable processing devices 120 having different pinout profiles to function as defined by the respective processing device 120 vendors, i.e., receive power over the pins that are defined to receive power, send/receive data over the pins that are defined to send/receive data, etc. In another example, the processing assembly 100, 100' may enable the processing devices 120 having different pinout profiles to function by programming the properties of the pins in the processing devices 120 to match a pinout profile of the board 1 10.
  • the "pinout profile" of a processing device 120 may be defined as a cross-reference between the pins of the processing device 120 and the functions of the pins.
  • the functions may be defined as whether the pins are power-related or signaling related, i.e., whether power is to be supplied through the pins or data or signals are to be supplied through the pins.
  • the "pinout profile" of the board 1 10 may be defined as a cross-reference between the contacts of the board 1 10 and the functions of the contacts.
  • the functions may be defined as whether the contacts are power-related or signaling related, i.e., whether power is to be supplied through the contacts or data or signals are to be supplied through the contacts.
  • the memory device 122 may be a non-volatile memory device that is to be placed into electrical communication with the controller 1 12.
  • the memory device 122 may have stored thereon information regarding the processing device 120, which may include any of the name of the processing device 120 manufacturer, the model name of the processing device 120, the serial number of the processing device 120, or the like.
  • the information may be stored in the processing device 120 itself.
  • the information may be stored in the memory device 122 instead of the processing device 120 because it may not be desirable for manufacturers of the processing devices 120 to modify their designs and fabrication processes such that the controller 122 may readily access this information, for instance, without powering on the processing device 120.
  • the processing device 120 manufacturer may also fabricate and program the memory device 122 with the information regarding the processing device 120.
  • the controller 1 12 may access or otherwise identify the information regarding the processing device 120 and may use that information to determine the pinout profile of the processing device 120. Based upon the identified information, the controller 1 12 may determine the pinout profile of the processing device 120. In addition, based upon the determined pinout profile, the controller 1 12 may program properties of one or both of the contacts on the board and the pins on the processing device 120 to enable the processing device 120 to properly operate on the board 1 10.
  • the properties may include functions of the contacts and/or the pins, the voltages applied over a set of the pins, the order in which voltages are applied over the set of the pins, the defined outputs of the pins, the defined outputs of the contacts, the defined activation statuses of the contacts, etc.
  • FIG. 1 B there is shown a simplified exploded side view, partially in cross section, of a processing assembly 100', according to another example of the present disclosure.
  • the processing assembly 100' includes the same features as the processing assembly 100 depicted in FIG. 1A, except that the processing assembly 1 10' is depicted as also including a socket 130.
  • the board 1 10 may include a plurality of contacts 1 14 that may be in electrical communication with the controller 1 12.
  • the board 1 10 may include conductive traces or wires formed between the controller 1 12 and the contacts 1 14.
  • the contacts 1 14 may be in electrical communication with other devices on the board 1 10, for instance, interfaces to a power source, an input/output interface, a universal serial bus (USB) port, a serial bus port, an l 2 C bus, and the like.
  • the socket 130 may include a plurality of socket pins 132 that are to be placed into electrical communication with the contacts 1 14.
  • the socket 130 may also include a plurality of socket contacts 134 that are to be placed into electrical communication with pins 124 on the processing device 120.
  • the socket 130 may be designed and fabricated to be mated with the board 1 10. That is, the number of socket pins 132 and their arrangement may closely mirror the number and arrangement of the contacts 1 14. However, the number and arrangement of socket contacts 134 may not be designed for any particular processing device 120. Instead, for instance, the socket 130 may be designed and fabricated as a universal socket, i.e., to be in electrical communication with any of a number of differently configured processing devices available, for instance, from multiple vendors.
  • the socket 130 may be fabricated with a number of socket contacts 134 that is equal to or larger than the number of socket contacts contained on known processing devices having the largest number of pins 124.
  • the socket 130 may be fabricated with a number of memory channels that is equal to or larger than in known processing devices, a number of PCIe lanes that is equal to or larger than in known processing devices, a number of SATA ports that is equal to or larger than in known processing devices, a number of USB ports that is equal to or larger than in known processing devices, a number of N IC ports that is equal to or larger than in known processing devices, etc.
  • the socket 130 may also define an envelope for electrical, thermal, and cooling operating ranges.
  • the socket 130 may further define a set of socket contacts 134 for special functions such as video, serial rapid input/output (SRIO), general purpose input/output (GPIO), management interface, etc.
  • SRIO serial rapid input/output
  • GPIO general purpose input/output
  • the number of socket contacts 134 and their functions that a processing device 120 uses may correspond to the number of pins 124 contained in the processing device 120 and the functions of the pins 124.
  • the pins 124 when the processing assembly 100' is assembled, the pins 124 may be inserted or otherwise placed into electrical communication with the socket contacts 134 and the socket pins 132 may be placed into electrical contact with the contacts 1 14.
  • electrical energy e.g., voltage
  • placement of the respective pins 124, 132 into electrical communication with respective contacts 134, 1 14 may include insertion of the pins 124, 132 into respective ones of the contacts 134, 1 14.
  • placement of the respective pins 124, 132 into electrical communication with respective contacts 134, 1 14 may include other forms of electrical contact, for instance, through the use of solder, through physical contact without insertion, through use of a separate wire or connector, etc.
  • the memory device 122 may include a pin 124 that is to be placed into electrical communication with a socket contact 134 and the socket contact 134 is to be placed into electrical communication with a contact 1 14 on the board 1 10.
  • the controller 1 12 may thus read data, e.g., information regarding the processing device 120, from the memory device 122. In one regard, for instance, the controller 1 12 may identify the information regarding the processing device 120 from the memory device 122 without having to first supply power to the processing device 120.
  • a programmable device 140 that is depicted as being positioned between the socket pins 132 and the socket contacts 134.
  • the programmable device 140 may be any suitable device that the controller 1 12 may program such that some or all of the socket contacts 134 may have the same property as the pins 124 to which the socket contacts 134 are respectively in electrical communication. Thus, for instance, if a first pin 124 is in electrical communication with a first socket contact 134 and the first pin 124 has a property in which the first pin 124 is to receive a predetermined voltage, the controller 1 12 may program the programmable device 140 such that the first socket contact 134 is to output the predetermined voltage.
  • the programmable device 140 may be a switching mechanism, a multiplexer, a power FET, an eFUSE, a programmable crossbar switch, or the like.
  • each of the socket pins 132 and the socket contacts 134 are depicted as being connected to the programmable device 140, it should be understood that at least some of the socket pins 132 may be directly connected to respective socket contacts 134, i.e., without going through the programmable device 140, to, for instance, reduce or minimize loading on the programmable device 140.
  • the connections shown in FIG. 1 B may be logical representations of connections rather than physical connections.
  • the programmable device 140 is provided in the board 1 10.
  • the controller 1 12 may program the programmable device 140 such that some or all of the contacts 1 14 have the same property as the respective pins 124 to which the contacts 1 14 are in electrical communication.
  • each of the socket pins 132 may be in direct electrical communication with a corresponding one of the pins 124 on the processing device 120.
  • the socket 130 may thus function in this example merely as an interface between the processing device 120 and the board 1 10.
  • the processing device 120 may be placed into direct electrical communication with the board 1 10 without the socket 130 as shown in FIG. 1A.
  • the board 1 10 may have a number of contacts 1 14 similar to the number of socket contacts 134 discussed above to enable any of a number of processing devices 120 available from multiple vendors to be placed into electrical communication with the contacts 1 14.
  • FIG. 2 there is shown a block diagram 200 of the board 1 10 depicted in FIG. 1A, according to an example.
  • the board 1 10 is depicted as including the controller 1 12, a data store 202 on which is stored a table 204, and a machine-readable storage medium 210.
  • the data store 202 may be volatile and/or non-volatile memory, such as DRAM, EEPROM, MRAM, phase change RAM (PCRAM), memristor, flash memory, and the like.
  • the controller 1 12 may fetch, decode, and execute instructions, such as instructions 212-218 stored on the machine-readable storage medium 210.
  • the instructions 212 may control processes to detect that a plurality of pins 124 of a processing device 120 are in electrical communication with a plurality of contacts 1 14, 134 in a receiving apparatus, in which the receiving apparatus may be the board 1 10 as shown in FIG. 1A or the socket 130 depicted in FIG. 1 B and the contacts may be the contacts 1 14 in the board 1 10 or the socket contacts 134 in the socket 130.
  • the instructions 214 may control processes to identify information regarding the processing device 120 and the instructions 216 may control processes to determine a pinout profile of the processing device 120 from the identified information of the processing device 120.
  • the instructions 218 may control processes to program, based upon the determined pinout profile, properties of the plurality of contacts 1 14 or 134 in the receiving apparatus 1 10 or 130 to match the pinout profile of the processing device 120 and/or the plurality of pins 124 of the processing device 120 to match a pinout profile of the plurality of contacts 1 14 or 134 in the receiving apparatus 1 10 or 134.
  • the controller 1 12 may include one or more electronic circuits that include electronic components for performing the functionalities of the instructions 212-218. These processes are described in detail below with respect to FIG. 4.
  • the machine-readable storage medium 210 may be any electronic, magnetic, optical, or other physical storage device that contains or stores executable instructions.
  • the machine-readable storage medium 210 may be, for example, Random Access Memory (RAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a storage device, an optical disc, and the like.
  • the machine-readable storage medium 210 may be a non-transitory machine-readable storage medium, where the term "non-transitory" does not encompass transitory propagating signals.
  • machine-readable storage medium 210 may be encoded with a series of executable instructions 212-218 to enable operation of any of a number of different processing devices with a common board 1 10 or socket 130.
  • the table 204 may include entries of a plurality of pinout profiles of a plurality of different processing devices.
  • the table 204 may include an entry for each of a plurality of different processing devices for which there is a possibility that the processing device may be placed into electrical communication with the board 1 10 or the socket 130.
  • the table 204 may include entries for each of a plurality processing devices that are available from major known processing device vendors and manufacturers.
  • the table 204 may include a corresponding pinout profile for that processing device.
  • the table 204 may list the processing device and in other columns, the table 204 may list the pinout profile for that processing device.
  • the pinout profile of a processing device 120 may include an identification of the functions each of the pins 124 in the processing device 120 is to perform.
  • the pinout profile may identify which of the pins 124 are power-related and which of the pins 124 are signaling related.
  • the pinout profile may also identify which of the pins 124 are to interface a power source, an input/output interface, a USB port, a display, a serial bus port, a management interface port, and the like.
  • the pinout profile of the processing device 120 may further include various other information, such as the timing at which the pins 124 are to receive voltages during a startup routine, the timing at which voltages are to be removed from the pins 124 during a power down routine, etc.
  • the data store 202 may also store the pinout profile of the board 1 10 and/or the socket 130 either within the table 204 or as data separate from the table 204.
  • the controller 1 12 may detect that a processing device 120 has been placed into electrical communication with the contacts 1 14 and may identify information regarding the processing device 120.
  • the information regarding the processing device 120 may include, for instance, an identification of the processing device 120 type, a serial number, a product number, etc., and the processing device 120 may search the table 204 for an entry containing the matching information.
  • the table 204 may be searchable or queried through use of a keyword, in this case, the information regarding the processing device 120.
  • the controller 1 12 may also identify the pinout profile corresponding to that matching entry and may program a programmable device 220a-220n, in which the variable "n" represents an integer value equal to or greater than one, to enable the processing device 120 to operate with the board 1 10 according to the identified pinout profile.
  • a programmable device 220a-220n in which the variable "n" represents an integer value equal to or greater than one, to enable the processing device 120 to operate with the board 1 10 according to the identified pinout profile.
  • the programmable device 220a-220n may be programmed are discussed elsewhere herein.
  • the board 1 10 may further include an input/output interface 206 through which the controller 1 12 and/or the processing device 120 may communicate with an external device(s) (not shown).
  • the input/output interface 206 may include hardware and/or software to enable the controller 1 12 and/or the processing device 120 to communicate with the external device(s).
  • the input/output interface 206 may enable a wired or wireless connection to the output device(s).
  • the input/output interface 206 may further include a network interface card and/or may also include hardware and/or software to enable the controller 1 12 and/or the processing device 120 to communicate with various input and/or output devices, such as a keyboard, a mouse, a display, another computing device, etc.
  • FIG. 3 there is shown a block diagram 300 of the board 1 10 depicted in FIG. 1 B, according to an example.
  • the board 1 10 depicted in FIG. 3 is depicted as including all of the features depicted in the board 1 10 in FIG. 2. As such, the descriptions of those features are omitted with respect to FIG. 3. Instead, the descriptions of those features with respect to FIG. 2 are intended to also apply to the features depicted in FIG. 3.
  • a pin of the memory device 122 may be in electrical communication with a contact 1 14 of the board 1 10.
  • the pin of the memory device 122 may be in direct electrical communication with the contact 1 14 of the board 1 10 or the pin may be in electrical communication with the contact 1 14 via a connection through a socket contact 134.
  • the controller 1 12 may access the memory device 122 as discussed above to identify information regarding the processing device 120. In other examples, however, the controller 1 12 may identify the information regarding the processing device 120 directly from the processing device 120.
  • the controller 1 12 may also program one or more of the programmable devices 220a-220n to cause one or both of the contacts 1 14 or 134 in the receiving apparatus to be programmed to match the pinout profile of the processing device 120 and the pins 124 of the processing device 120 to be programmed to match a pinout profile of the plurality of contacts 1 14 or 134 in the receiving apparatus.
  • the receiving apparatus may be one of the board 1 10 or the socket 130.
  • the programmable device(s) 220a-220n may be similar to the programmable device 140 depicted in FIG. 1 B.
  • a first programmable device 220a may be differently programmable from a second programmable device 220b.
  • the first programmable device 220a may control the programming of a first group of contacts 1 14 and/or socket contacts 134 and the second programmable device 220b may control the programming of a second group of contacts 1 14, 134.
  • the first group of contacts 1 14, 134 may be a group of contacts through which power is to be delivered to the processing device 120 and the second group of contacts 1 14, 134 may be a group of contacts through which data signaling is to be communicated with the processing device 120.
  • the first programmable device 220a may program the first group of contacts 1 14, 134 to output power at the correct voltage.
  • the second programmable device 220b may program individual ones of the second group of contacts 1 14, 134 to communicate different types of data by, for instance, directing the different types of data to the correct ones of the second group of contacts 1 14, 134.
  • one of the programmable devices 220a may control programming of the contacts 1 14, 134 with regard to power-related control and another one of the programmable devices 220b may control programming of the contacts 1 14, 134 with regard to the signal-related control.
  • the programmable devices 220a-220n may control programming of the contacts 1 14, 134 based upon the spatial locations of the contacts 1 14, 134.
  • a first programmable device 220a may control the programming of a first set of contacts 1 14, 134 positioned at one spatial location and a second programmable device 220b may control the programming of a second set of contacts 1 14, 134 positioned at another spatial location.
  • the controller 1 12 may program the programmable device(s) 220a-220n to enable the processing device 120 to operate with the board 1 10 according to the identified pinout profile of the processing device 120.
  • the controller 1 12 may cause the pins 124 of the processing device 120 to be programmed to have properties that match the properties of the contacts 1 14, 134 of the receiving apparatus 1 10, 130 to which the pins 124 are in electrical communication as identified in the pinout profile of the receiving apparatus 1 10, 130.
  • FIG. 4 there is shown a flow diagram of a method 400 for enabling operation of a processing device having a plurality of pins, according to an example of the present disclosure.
  • the method 400 depicted in FIG. 4 may include additional operations and that some of the operations described therein may be removed and/or modified without departing from the scope of the method 400.
  • the description of the method 400 is made with reference to the features depicted in FIGS. 1 A-3 for purposes of illustration and thus, it should be understood that the method 400 may be implemented in apparatuses having architectures different from those shown in FIGS. 1A-3.
  • the controller 1 12 of the board 1 10 may implement or execute the instructions 212-218 stored on the machine-readable storage medium 210 to perform the method 400.
  • the controller 1 12 may execute the instructions 212 to detect that the pins 124 of a processing device 120 are in electrical communication with a plurality of contacts 1 14, 134 in a receiving apparatus 1 10, 130.
  • the controller 1 12 may make this determination through any suitable detection technique.
  • the controller 1 12 may also detect that a memory device 122, if present, is in electrical communication with a contact 1 14, 134 in a similar manner.
  • the controller 1 12 may execute the instructions 214 to identify information regarding the processing device 120.
  • the controller 1 12 may access the information regarding the processing device 120 from the memory device 122.
  • the controller 120 may access the information regarding the processing device 120 from the processing device 120.
  • the controller 120 may access the information regarding the processing device 120 from another source, such as through receipt of the information from a user or other external source.
  • the controller 1 12 may execute the instructions 216 to determine a pinout profile of the processing device 120 from the identified information of the processing device 120. As discussed above, the controller 1 12 may determine the pinout profile of the processing device 120 through performance of a search or query into an table 204 that includes entries for a plurality of processing devices and their corresponding pinout profiles. Once found, the controller 1 12 may perform a comparison between the pinout profile of the receiving apparatus 1 10, 130 to determine differences between the pinout profiles. The determined differences may be used to generate a mapping between the contacts 1 14, 134 in the receiving apparatus 1 10, 130 and the pins 124 in the processing device 120, or vice versa.
  • the controller 1 12 may execute the instructions 218 to program, based upon the determined pinout profile, properties of one or both of the plurality of contacts 1 14, 134 in the receiving apparatus 1 10, 130 to match the pinout profile of the processing device 120 and the plurality of pins 124 of the processing device 120 to match a pinout profile of the plurality of contacts 1 14, 134 in the receiving apparatus 1 10, 130.
  • the controller 1 12 may program the programmable device(s) 220a-220n in any of the manners discussed above with respect to FIG. 3 to perform this programming.
  • the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of the contacts 1 14, 134 map to the properties of the pins 124 to which the contacts 1 14, 134 are respectively in electrical communication.
  • the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of the pins 124 map to the properties of the contacts 1 14, 134 to which the pins 124 are respectively in electrical communication.
  • the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of some of the pins 124 map to the properties of the contacts 1 14, 134 to which those pins 124 are respectively in electrical communication and some of the contacts 1 14, 134 map to the properties of the pins 124 to which those contacts 1 14, 134 are respectively in electrical communication.
  • Some or all of the operations set forth in the method 400 may be contained as utilities, programs, or subprograms, in any desired computer accessible medium.
  • the method 400 may be embodied by computer programs, which may exist in a variety of forms both active and inactive. For example, they may exist as machine readable instructions, including source code, object code, executable code or other formats. Any of the above may be embodied on a non-transitory computer readable storage medium.
  • non-transitory computer readable storage media include computer system RAM, ROM, EPROM, EEPROM, and magnetic or optical disks or tapes. It is therefore to be understood that any electronic device capable of executing the above-described functions may perform those functions enumerated above.
  • RAM random access memory
  • ROM read-only memory
  • EPROM erasable programmable read-only memory
  • EEPROM electrically erasable programmable read-only memory
  • magnetic or optical disks or tapes any electronic device capable of executing the above-described functions may perform those functions enumerated above.

Abstract

According to an example, operation of a processing device having a plurality of pins may be enabled through a detection that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in a receiving apparatus. In addition, information regarding the processing device may be identified and a pinout profile of the processing device may be determined from the identified information of the processing device. Based upon the determined pinout profile, properties of one or both of: the plurality of contacts to match the pinout profile of the processing device and the plurality of pins to match a pinout profile of the plurality of contacts in the receiving apparatus may be programmed.

Description

PROCESSING DEVICE OPERATION ENABLEMENT
BACKGROUND
[0001] Printed circuit boards and sockets are typically designed to accept a single type of processing device from a single vendor. In this regard, a new printed circuit board or socket having a different connection configuration is often needed to accommodate a processing device from a different vendor. Thus, multiple printed circuit boards and sockets having multiple connection configurations are typically needed when multiple processing devices from multiple vendors are implemented.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] Features of the present disclosure are illustrated by way of example and not limited in the following figure(s), in which like numerals indicate like elements, in which:
[0003] FIG. 1A shows a simplified isometric view of a processing assembly, according to an example of the present disclosure;
[0004] FIG. 1 B shows a simplified exploded side view, partially in cross section, of a processing assembly, according to another example of the present disclosure
[0005] FIG. 2 shows a block diagram of the board depicted in FIG. 1A, according to an example of the present disclosure;
[0006] FIG. 3 shows a block diagram of the board depicted in FIG. 1 B, according to an example of the present disclosure; and
[0007] FIG. 4 depicts a flow diagram of a method for enabling operation of a processing device having a plurality of pins, according to an example of the present disclosure.
DETAILED DESCRIPTION
[0008] For simplicity and illustrative purposes, the present disclosure is described by referring mainly to an example thereof. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be readily apparent however, that the present disclosure may be practiced without limitation to these specific details. In other instances, some methods and structures have not been described in detail so as not to unnecessarily obscure the present disclosure. As used herein, the terms "a" and "an" are intended to denote at least one of a particular element, the term "includes" means includes but not limited to, the term "including" means including but not limited to, and the term "based on" means based at least in part on.
[0009] Additionally, It should be understood that the elements depicted in the accompanying figures may include additional components and that some of the components described in those figures may be removed and/or modified without departing from scopes of the elements disclosed herein. It should also be understood that the elements depicted in the figures may not be drawn to scale and thus, the elements may have different sizes and/or configurations other than as shown in the figures.
[0010] Disclosed herein are methods and apparatuses to enable operation of a processing device with a board. That is, a processing device may be detected to have been placed into electrical communication with a receiving apparatus, such as the board or a socket, and information regarding the processing device may be identified. In addition, a pinout profile of the processing device may be determined from the identified information regarding the processing device, for instance, from a table that identifies correlations between multiple processing devices and their respective pinout profiles. Based upon the pinout profile the processing device, properties of one or both of the contacts on the receiving apparatus and the pins in the processing device 120 may be programmed such that functions of the contacts are compatible with the functions of the pins in the processing device to which the contacts are respectively in electrical communication. Thus, for instance, the programming may be performed to enable voltage to applied to a pin at the level identified for that particular pin, to enable a particular type of data signals to be communicated over a pin as identified for that particular pin, etc.
[001 1] The methods and apparatuses disclosed herein therefore enable processing devices having different configurations, e.g., pinout profiles, number of pins, pinout configurations, etc., to operate with a board and/or socket. In other words, through implementation of the methods and apparatuses disclosed herein, a manufacturer or vendor of the board and/or socket may not be required to fabricate or obtain particular boards and/or sockets to be used with particular processing devices. Instead, the same board and/or socket may be employed to enable operation of multiple types of processing devices. Thus, for instance, the same pinout arrangement on the board and/or socket may be used to mount different processing devices from different companies. This compatibility with multiple different processing devices may save costs as different boards and/or sockets may not need to be fabricated or obtained whenever a decision is made to use a different processing device.
[0012] FIG. 1 A shows a simplified isometric view of a processing assembly 100, according to an example of the present disclosure. As shown, the processing assembly 100 may include a board 1 10 and a controller 1 12. The board 1 10 may be a printed circuit board (PCB) and the controller 1 12 may be a baseboard management controller (BMC) or other type of controller that is to perform various functions in the board 1 10. Additionally, the board 1 10 may include a plurality of contacts (not shown) to which a plurality of pins (not shown) of a processing device 120 may be electrically connected. That is, for instance, the plurality of contacts may be receptacles into which the pins of the processing device 120 may be inserted or may otherwise be contacted. Although particularly referenced herein as contacts, the contacts in the board 1 10 may equivalently be referenced as pins.
[0013] The processing device 120 may be a central processing unit (CPU), a microprocessor, a processor, an application specific integrated circuit (ASIC), a system-on-chip (SoC), or the like. The processing device 120 may be a processing device manufactured by any of a plurality of different vendors or manufacturers. As different vendors typically design and fabricate their processing devices differently from each other, the processing devices from different vendors may have different pinout profiles as compared to each other. In addition, the same vendor may offer multiple processing devices that have different pinout profiles with respect to each other.
[0014] In one regard, and as discussed in greater detail herein, the processing assembly 100, 100' disclosed herein may enable processing devices 120 having different pinout profiles to be properly connected to the board 1 10. That is, in one example, the processing assembly 100, 100' may enable processing devices 120 having different pinout profiles to function as defined by the respective processing device 120 vendors, i.e., receive power over the pins that are defined to receive power, send/receive data over the pins that are defined to send/receive data, etc. In another example, the processing assembly 100, 100' may enable the processing devices 120 having different pinout profiles to function by programming the properties of the pins in the processing devices 120 to match a pinout profile of the board 1 10.
[0015] As used herein, the "pinout profile" of a processing device 120 may be defined as a cross-reference between the pins of the processing device 120 and the functions of the pins. The functions may be defined as whether the pins are power-related or signaling related, i.e., whether power is to be supplied through the pins or data or signals are to be supplied through the pins. Likewise, the "pinout profile" of the board 1 10 may be defined as a cross-reference between the contacts of the board 1 10 and the functions of the contacts. The functions may be defined as whether the contacts are power-related or signaling related, i.e., whether power is to be supplied through the contacts or data or signals are to be supplied through the contacts.
[0016] According to an example, the memory device 122 may be a non-volatile memory device that is to be placed into electrical communication with the controller 1 12. The memory device 122 may have stored thereon information regarding the processing device 120, which may include any of the name of the processing device 120 manufacturer, the model name of the processing device 120, the serial number of the processing device 120, or the like. In addition or alternatively, the information may be stored in the processing device 120 itself. The information may be stored in the memory device 122 instead of the processing device 120 because it may not be desirable for manufacturers of the processing devices 120 to modify their designs and fabrication processes such that the controller 122 may readily access this information, for instance, without powering on the processing device 120. In any regard, the processing device 120 manufacturer may also fabricate and program the memory device 122 with the information regarding the processing device 120.
[0017] As discussed in greater detail herein below, the controller 1 12 may access or otherwise identify the information regarding the processing device 120 and may use that information to determine the pinout profile of the processing device 120. Based upon the identified information, the controller 1 12 may determine the pinout profile of the processing device 120. In addition, based upon the determined pinout profile, the controller 1 12 may program properties of one or both of the contacts on the board and the pins on the processing device 120 to enable the processing device 120 to properly operate on the board 1 10. The properties may include functions of the contacts and/or the pins, the voltages applied over a set of the pins, the order in which voltages are applied over the set of the pins, the defined outputs of the pins, the defined outputs of the contacts, the defined activation statuses of the contacts, etc.
[0018] Turning now to FIG. 1 B, there is shown a simplified exploded side view, partially in cross section, of a processing assembly 100', according to another example of the present disclosure. The processing assembly 100' includes the same features as the processing assembly 100 depicted in FIG. 1A, except that the processing assembly 1 10' is depicted as also including a socket 130.
[0019] As shown, the board 1 10 may include a plurality of contacts 1 14 that may be in electrical communication with the controller 1 12. For instance, the board 1 10 may include conductive traces or wires formed between the controller 1 12 and the contacts 1 14. In other examples, however, the contacts 1 14 may be in electrical communication with other devices on the board 1 10, for instance, interfaces to a power source, an input/output interface, a universal serial bus (USB) port, a serial bus port, an l2C bus, and the like. The socket 130 may include a plurality of socket pins 132 that are to be placed into electrical communication with the contacts 1 14. The socket 130 may also include a plurality of socket contacts 134 that are to be placed into electrical communication with pins 124 on the processing device 120.
[0020] According to an example, the socket 130 may be designed and fabricated to be mated with the board 1 10. That is, the number of socket pins 132 and their arrangement may closely mirror the number and arrangement of the contacts 1 14. However, the number and arrangement of socket contacts 134 may not be designed for any particular processing device 120. Instead, for instance, the socket 130 may be designed and fabricated as a universal socket, i.e., to be in electrical communication with any of a number of differently configured processing devices available, for instance, from multiple vendors.
[0021] By way of example, the socket 130 may be fabricated with a number of socket contacts 134 that is equal to or larger than the number of socket contacts contained on known processing devices having the largest number of pins 124. Similarly, the socket 130 may be fabricated with a number of memory channels that is equal to or larger than in known processing devices, a number of PCIe lanes that is equal to or larger than in known processing devices, a number of SATA ports that is equal to or larger than in known processing devices, a number of USB ports that is equal to or larger than in known processing devices, a number of N IC ports that is equal to or larger than in known processing devices, etc. The socket 130 may also define an envelope for electrical, thermal, and cooling operating ranges. The socket 130 may further define a set of socket contacts 134 for special functions such as video, serial rapid input/output (SRIO), general purpose input/output (GPIO), management interface, etc. As such, the number of socket contacts 134 and their functions that a processing device 120 uses may correspond to the number of pins 124 contained in the processing device 120 and the functions of the pins 124.
[0022] According to an example, when the processing assembly 100' is assembled, the pins 124 may be inserted or otherwise placed into electrical communication with the socket contacts 134 and the socket pins 132 may be placed into electrical contact with the contacts 1 14. In this regard, electrical energy, e.g., voltage, may be supplied from the board 1 10 to the processing device 120 and data signals may be communicated between the board 1 10 and the processing device 120. As used herein, in one example, placement of the respective pins 124, 132 into electrical communication with respective contacts 134, 1 14 may include insertion of the pins 124, 132 into respective ones of the contacts 134, 1 14. In another example, placement of the respective pins 124, 132 into electrical communication with respective contacts 134, 1 14 may include other forms of electrical contact, for instance, through the use of solder, through physical contact without insertion, through use of a separate wire or connector, etc.
[0023] As also shown in FIG. 1 B, the memory device 122 may include a pin 124 that is to be placed into electrical communication with a socket contact 134 and the socket contact 134 is to be placed into electrical communication with a contact 1 14 on the board 1 10. The controller 1 12 may thus read data, e.g., information regarding the processing device 120, from the memory device 122. In one regard, for instance, the controller 1 12 may identify the information regarding the processing device 120 from the memory device 122 without having to first supply power to the processing device 120.
[0024] Further shown in FIG. 1 B is a programmable device 140 that is depicted as being positioned between the socket pins 132 and the socket contacts 134. The programmable device 140 may be any suitable device that the controller 1 12 may program such that some or all of the socket contacts 134 may have the same property as the pins 124 to which the socket contacts 134 are respectively in electrical communication. Thus, for instance, if a first pin 124 is in electrical communication with a first socket contact 134 and the first pin 124 has a property in which the first pin 124 is to receive a predetermined voltage, the controller 1 12 may program the programmable device 140 such that the first socket contact 134 is to output the predetermined voltage. By way of example, the programmable device 140 may be a switching mechanism, a multiplexer, a power FET, an eFUSE, a programmable crossbar switch, or the like. Additionally, although each of the socket pins 132 and the socket contacts 134 are depicted as being connected to the programmable device 140, it should be understood that at least some of the socket pins 132 may be directly connected to respective socket contacts 134, i.e., without going through the programmable device 140, to, for instance, reduce or minimize loading on the programmable device 140. Moreover, it should be understood that the connections shown in FIG. 1 B may be logical representations of connections rather than physical connections.
[0025] According to another example, the programmable device 140 is provided in the board 1 10. In this example, which may also apply to processing assembly 100 depicted in FIG. 1A, the controller 1 12 may program the programmable device 140 such that some or all of the contacts 1 14 have the same property as the respective pins 124 to which the contacts 1 14 are in electrical communication. In this example, each of the socket pins 132 may be in direct electrical communication with a corresponding one of the pins 124 on the processing device 120. The socket 130 may thus function in this example merely as an interface between the processing device 120 and the board 1 10. In other examples, the processing device 120 may be placed into direct electrical communication with the board 1 10 without the socket 130 as shown in FIG. 1A. In these examples, the board 1 10 may have a number of contacts 1 14 similar to the number of socket contacts 134 discussed above to enable any of a number of processing devices 120 available from multiple vendors to be placed into electrical communication with the contacts 1 14.
[0026] With reference now to FIG. 2, there is shown a block diagram 200 of the board 1 10 depicted in FIG. 1A, according to an example. The board 1 10 is depicted as including the controller 1 12, a data store 202 on which is stored a table 204, and a machine-readable storage medium 210. The data store 202 may be volatile and/or non-volatile memory, such as DRAM, EEPROM, MRAM, phase change RAM (PCRAM), memristor, flash memory, and the like.
[0027] The controller 1 12 may fetch, decode, and execute instructions, such as instructions 212-218 stored on the machine-readable storage medium 210. Particularly, the instructions 212 may control processes to detect that a plurality of pins 124 of a processing device 120 are in electrical communication with a plurality of contacts 1 14, 134 in a receiving apparatus, in which the receiving apparatus may be the board 1 10 as shown in FIG. 1A or the socket 130 depicted in FIG. 1 B and the contacts may be the contacts 1 14 in the board 1 10 or the socket contacts 134 in the socket 130. The instructions 214 may control processes to identify information regarding the processing device 120 and the instructions 216 may control processes to determine a pinout profile of the processing device 120 from the identified information of the processing device 120. The instructions 218 may control processes to program, based upon the determined pinout profile, properties of the plurality of contacts 1 14 or 134 in the receiving apparatus 1 10 or 130 to match the pinout profile of the processing device 120 and/or the plurality of pins 124 of the processing device 120 to match a pinout profile of the plurality of contacts 1 14 or 134 in the receiving apparatus 1 10 or 134. As an alternative or in addition to retrieving and executing instructions, the controller 1 12 may include one or more electronic circuits that include electronic components for performing the functionalities of the instructions 212-218. These processes are described in detail below with respect to FIG. 4.
[0028] The machine-readable storage medium 210 may be any electronic, magnetic, optical, or other physical storage device that contains or stores executable instructions. Thus, the machine-readable storage medium 210 may be, for example, Random Access Memory (RAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a storage device, an optical disc, and the like. In some implementations, the machine-readable storage medium 210 may be a non-transitory machine-readable storage medium, where the term "non-transitory" does not encompass transitory propagating signals. As described in detail below, machine-readable storage medium 210 may be encoded with a series of executable instructions 212-218 to enable operation of any of a number of different processing devices with a common board 1 10 or socket 130.
[0029] The table 204, which may be an abstraction table, may include entries of a plurality of pinout profiles of a plurality of different processing devices. For instance, the table 204 may include an entry for each of a plurality of different processing devices for which there is a possibility that the processing device may be placed into electrical communication with the board 1 10 or the socket 130. Thus, for instance, the table 204 may include entries for each of a plurality processing devices that are available from major known processing device vendors and manufacturers. In addition, for each of the processing devices, the table 204 may include a corresponding pinout profile for that processing device. Thus, for instance, in one column, the table 204 may list the processing device and in other columns, the table 204 may list the pinout profile for that processing device.
[0030] As discussed above, the pinout profile of a processing device 120 may include an identification of the functions each of the pins 124 in the processing device 120 is to perform. By way of example, the pinout profile may identify which of the pins 124 are power-related and which of the pins 124 are signaling related. The pinout profile may also identify which of the pins 124 are to interface a power source, an input/output interface, a USB port, a display, a serial bus port, a management interface port, and the like. The pinout profile of the processing device 120 may further include various other information, such as the timing at which the pins 124 are to receive voltages during a startup routine, the timing at which voltages are to be removed from the pins 124 during a power down routine, etc. Moreover, the data store 202 may also store the pinout profile of the board 1 10 and/or the socket 130 either within the table 204 or as data separate from the table 204.
[0031] As discussed in greater detail herein below, the controller 1 12 may detect that a processing device 120 has been placed into electrical communication with the contacts 1 14 and may identify information regarding the processing device 120. The information regarding the processing device 120 may include, for instance, an identification of the processing device 120 type, a serial number, a product number, etc., and the processing device 120 may search the table 204 for an entry containing the matching information. In one regard, therefore, the table 204 may be searchable or queried through use of a keyword, in this case, the information regarding the processing device 120. The controller 1 12 may also identify the pinout profile corresponding to that matching entry and may program a programmable device 220a-220n, in which the variable "n" represents an integer value equal to or greater than one, to enable the processing device 120 to operate with the board 1 10 according to the identified pinout profile. Various manners in which the programmable device 220a-220n may be programmed are discussed elsewhere herein.
[0032] The board 1 10 may further include an input/output interface 206 through which the controller 1 12 and/or the processing device 120 may communicate with an external device(s) (not shown). The input/output interface 206 may include hardware and/or software to enable the controller 1 12 and/or the processing device 120 to communicate with the external device(s). The input/output interface 206 may enable a wired or wireless connection to the output device(s). The input/output interface 206 may further include a network interface card and/or may also include hardware and/or software to enable the controller 1 12 and/or the processing device 120 to communicate with various input and/or output devices, such as a keyboard, a mouse, a display, another computing device, etc.
[0033] Turning now to FIG. 3, there is shown a block diagram 300 of the board 1 10 depicted in FIG. 1 B, according to an example. The board 1 10 depicted in FIG. 3 is depicted as including all of the features depicted in the board 1 10 in FIG. 2. As such, the descriptions of those features are omitted with respect to FIG. 3. Instead, the descriptions of those features with respect to FIG. 2 are intended to also apply to the features depicted in FIG. 3.
[0034] As shown in FIG. 3, a pin of the memory device 122 may be in electrical communication with a contact 1 14 of the board 1 10. The pin of the memory device 122 may be in direct electrical communication with the contact 1 14 of the board 1 10 or the pin may be in electrical communication with the contact 1 14 via a connection through a socket contact 134. In any regard, the controller 1 12 may access the memory device 122 as discussed above to identify information regarding the processing device 120. In other examples, however, the controller 1 12 may identify the information regarding the processing device 120 directly from the processing device 120.
[0035] The controller 1 12 may also program one or more of the programmable devices 220a-220n to cause one or both of the contacts 1 14 or 134 in the receiving apparatus to be programmed to match the pinout profile of the processing device 120 and the pins 124 of the processing device 120 to be programmed to match a pinout profile of the plurality of contacts 1 14 or 134 in the receiving apparatus. As discussed above with respect to FIG. 2, the receiving apparatus may be one of the board 1 10 or the socket 130.
[0036] The programmable device(s) 220a-220n may be similar to the programmable device 140 depicted in FIG. 1 B. In addition, a first programmable device 220a may be differently programmable from a second programmable device 220b. For instance, the first programmable device 220a may control the programming of a first group of contacts 1 14 and/or socket contacts 134 and the second programmable device 220b may control the programming of a second group of contacts 1 14, 134. In this example, the first group of contacts 1 14, 134 may be a group of contacts through which power is to be delivered to the processing device 120 and the second group of contacts 1 14, 134 may be a group of contacts through which data signaling is to be communicated with the processing device 120. Depending upon the pinout profile of the processing device 120, the first programmable device 220a may program the first group of contacts 1 14, 134 to output power at the correct voltage. In addition, the second programmable device 220b may program individual ones of the second group of contacts 1 14, 134 to communicate different types of data by, for instance, directing the different types of data to the correct ones of the second group of contacts 1 14, 134. [0037] By way of example, therefore, one of the programmable devices 220a may control programming of the contacts 1 14, 134 with regard to power-related control and another one of the programmable devices 220b may control programming of the contacts 1 14, 134 with regard to the signal-related control. In other examples, however, the programmable devices 220a-220n may control programming of the contacts 1 14, 134 based upon the spatial locations of the contacts 1 14, 134. In these examples, a first programmable device 220a may control the programming of a first set of contacts 1 14, 134 positioned at one spatial location and a second programmable device 220b may control the programming of a second set of contacts 1 14, 134 positioned at another spatial location.
[0038] In still further examples in which the controller 1 12 is able to program the pins 124 of the processing device 120, the controller 1 12 may program the programmable device(s) 220a-220n to enable the processing device 120 to operate with the board 1 10 according to the identified pinout profile of the processing device 120. In these examples, the controller 1 12 may cause the pins 124 of the processing device 120 to be programmed to have properties that match the properties of the contacts 1 14, 134 of the receiving apparatus 1 10, 130 to which the pins 124 are in electrical communication as identified in the pinout profile of the receiving apparatus 1 10, 130.
[0039] With reference now to FIG. 4, there is shown a flow diagram of a method 400 for enabling operation of a processing device having a plurality of pins, according to an example of the present disclosure. It should be understood that the method 400 depicted in FIG. 4 may include additional operations and that some of the operations described therein may be removed and/or modified without departing from the scope of the method 400. The description of the method 400 is made with reference to the features depicted in FIGS. 1 A-3 for purposes of illustration and thus, it should be understood that the method 400 may be implemented in apparatuses having architectures different from those shown in FIGS. 1A-3. [0040] Generally speaking, the controller 1 12 of the board 1 10 may implement or execute the instructions 212-218 stored on the machine-readable storage medium 210 to perform the method 400.
[0041] At block 402, the controller 1 12 may execute the instructions 212 to detect that the pins 124 of a processing device 120 are in electrical communication with a plurality of contacts 1 14, 134 in a receiving apparatus 1 10, 130. The controller 1 12 may make this determination through any suitable detection technique. The controller 1 12 may also detect that a memory device 122, if present, is in electrical communication with a contact 1 14, 134 in a similar manner.
[0042] At block 404, the controller 1 12 may execute the instructions 214 to identify information regarding the processing device 120. In a first example in which the memory device 122 is present and in electrical communication with the controller 1 12, the controller 1 12 may access the information regarding the processing device 120 from the memory device 122. In a second example in which the memory device 122 is not present, the controller 120 may access the information regarding the processing device 120 from the processing device 120. Alternatively, the controller 120 may access the information regarding the processing device 120 from another source, such as through receipt of the information from a user or other external source.
[0043] At block 406, the controller 1 12 may execute the instructions 216 to determine a pinout profile of the processing device 120 from the identified information of the processing device 120. As discussed above, the controller 1 12 may determine the pinout profile of the processing device 120 through performance of a search or query into an table 204 that includes entries for a plurality of processing devices and their corresponding pinout profiles. Once found, the controller 1 12 may perform a comparison between the pinout profile of the receiving apparatus 1 10, 130 to determine differences between the pinout profiles. The determined differences may be used to generate a mapping between the contacts 1 14, 134 in the receiving apparatus 1 10, 130 and the pins 124 in the processing device 120, or vice versa. [0044] At block 408, the controller 1 12 may execute the instructions 218 to program, based upon the determined pinout profile, properties of one or both of the plurality of contacts 1 14, 134 in the receiving apparatus 1 10, 130 to match the pinout profile of the processing device 120 and the plurality of pins 124 of the processing device 120 to match a pinout profile of the plurality of contacts 1 14, 134 in the receiving apparatus 1 10, 130. The controller 1 12 may program the programmable device(s) 220a-220n in any of the manners discussed above with respect to FIG. 3 to perform this programming. By way of example, the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of the contacts 1 14, 134 map to the properties of the pins 124 to which the contacts 1 14, 134 are respectively in electrical communication. In another example, the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of the pins 124 map to the properties of the contacts 1 14, 134 to which the pins 124 are respectively in electrical communication. In a further example, the controller 1 12 may program the programmable device(s) 220a-220n such that the properties of some of the pins 124 map to the properties of the contacts 1 14, 134 to which those pins 124 are respectively in electrical communication and some of the contacts 1 14, 134 map to the properties of the pins 124 to which those contacts 1 14, 134 are respectively in electrical communication.
[0045] Some or all of the operations set forth in the method 400 may be contained as utilities, programs, or subprograms, in any desired computer accessible medium. In addition, the method 400 may be embodied by computer programs, which may exist in a variety of forms both active and inactive. For example, they may exist as machine readable instructions, including source code, object code, executable code or other formats. Any of the above may be embodied on a non-transitory computer readable storage medium.
[0046] Examples of non-transitory computer readable storage media include computer system RAM, ROM, EPROM, EEPROM, and magnetic or optical disks or tapes. It is therefore to be understood that any electronic device capable of executing the above-described functions may perform those functions enumerated above. [0047] Although described specifically throughout the entirety of the instant disclosure, representative examples of the present disclosure have utility over a wide range of applications, and the above discussion is not intended and should not be construed to be limiting, but is offered as an illustrative discussion of aspects of the disclosure.
[0048] What has been described and illustrated herein is an example of the disclosure along with some of its variations. The terms, descriptions and figures used herein are set forth by way of illustration only and are not meant as limitations. Many variations are possible within the spirit and scope of the disclosure, which is intended to be defined by the following claims - and their equivalents - in which all terms are meant in their broadest reasonable sense unless otherwise indicated.

Claims

What is claimed is:
1 . A method for enabling operation of a processing device having a plurality of pins, said method comprising:
detecting that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in a receiving apparatus;
identifying information regarding the processing device;
determining, by a controller, a pinout profile of the processing device from the identified information of the processing device;
programming, by the controller, based upon the determined pinout profile, properties of one or both of:
the plurality of contacts to match the pinout profile of the processing device; and
the plurality of pins to match a pinout profile of the plurality of contacts in the receiving apparatus.
2. The method according to claim 1 , wherein determining the pinout profile of the processing device further comprises:
accessing a table that includes entries of a plurality of pinout profiles for a plurality of different processing devices, wherein the entries are searchable based upon respective information regarding the plurality of different processing devices;
identifying the entry in the table pertaining to the identified information regarding the processing device;
identifying the pinout profile listed in the identified entry in the table; and determining the pinout profile of the plurality of pins of the processing device to be the identified pinout profile.
3. The method according to claim 1 , wherein identifying the information regarding the processing device further comprises:
accessing the information regarding the processing device from data stored on one of: the processing device; and
a non-volatile memory device associated with the processing device.
4. The method according to claim 1 , wherein the receiving apparatus is a socket, and wherein detecting that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in a receiving apparatus further comprises detecting that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in the socket, wherein the socket contains a plurality of socket pins in electrical communication with a plurality of board contacts in a printed circuit board, and wherein programming further comprises programming the plurality of socket pins to match the pinout profile of the processing device.
5. The method according to claim 1 , wherein the receiving apparatus is a printed circuit board, and wherein detecting that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in a receiving apparatus further comprises detecting that the plurality of pins of the processing device are in electrical communication with a plurality of contacts in the printed circuit board.
6. The method according to claim 1 , wherein programming further comprises programming functions of one or both of the plurality of contacts and the plurality of pins prior to providing power to the processing device through one of the plurality of pins of the processing device.
7. The method according to claim 1 , wherein the pinout profile identifies definitions of the plurality of pins of the processing device, and wherein programming further comprises one or both of:
programming properties of the plurality of contacts in the receiving apparatus to match the definitions of the plurality of pins of the processing device identified in the pinout profile; and programming, based upon the definitions of the plurality of pins of the processing device, the plurality of pins of the processing device to match the pinout profile of the receiving apparatus.
8. The method according to claim 1 , wherein the pinout profile of the processing device identifies timings at which power is to be at least one of supplied to a set of the plurality of pins of the processing device and removed from the set of the plurality of pins of the processing device and wherein the method further comprises at least one of:
providing power through the set of the plurality of pins of the processing device according to the timings at which power is to be supplied to the set of the plurality of pins identified in the pinout profile of the processing device; and
removing power from the set of the plurality of pins of the processing device according to the timings at which power is to be removed from the set of the plurality of pins identified in the pinout profile of the processing device.
9. The method according to claim 1 , wherein programming further comprises programming properties of one or both of the plurality of contacts and the plurality of pins to at least one of:
define functions of the plurality of contacts;
define functions of the plurality of pins;
have voltages applied over a set of the plurality of pins;
define an order in which voltages are applied over the set of the plurality of pins;
define an order in which voltages are removed from the set of the plurality of pins;
define outputs of the plurality of pins;
define outputs of the plurality of contacts; and
define activation statuses of the plurality of contacts.
10. A receiving apparatus to enable operation of a processing device, said receiving apparatus comprising: a plurality of contacts;
a controller; and
a machine-readable storage on which is stored machine-readable instructions that are to cause the controller to:
detect that a plurality of pins of a the processing device are in electrical communication with the plurality of contacts;
identify information regarding the processing device; determine a pinout profile of the processing device from the identified information of the processing device;
program, based upon the determined pinout profile, properties of one or both of:
the plurality of contacts to match the pinout profile of the processing device; and
the plurality of pins to match a pinout profile of the plurality of contacts in the receiving apparatus.
1 1 . The receiving apparatus according to claim 10, wherein, to determine the pinout profile of the processing device, the machine-readable instructions are further to cause the controller to:
access a table that includes entries of a plurality of pinout profiles for a plurality of different processing devices, wherein the entries are searchable based upon respective information regarding the plurality of different processing devices;
identify the entry in the table pertaining to the identified information regarding the processing device;
identify the pinout profile listed in the identified entry in the table; and determine the pinout profile of the plurality of pins of the processing device to be the identified pinout profile.
12. The receiving apparatus according to claim 10, wherein the pinout profile identifies definitions of the plurality of pins of the processing device, and wherein to program the properties, the machine readable instructions are further to cause the controller to one or both of:
program properties of the plurality of contacts to match the definitions of the plurality of pins identified in the pinout profile; and
program, based upon the definitions of the plurality of pins of the processing device, the plurality of pins to match the pinout profile of the receiving apparatus.
13. The receiving apparatus according to claim 10, wherein, to program the properties, the machine readable instructions are further to cause the controller to program the properties of one or both of the plurality of contacts and the plurality of pins to at least one of:
define functions of the plurality of contacts;
define functions of the plurality of pins;
have voltages applied over a set of the plurality of pins;
define an order in which voltages are applied over the set of the plurality of pins;
define an order in which voltages are removed from the set of the plurality of pins;
define outputs of the plurality of pins;
define outputs of the plurality of contacts; and
define activation statuses of the plurality of contacts.
14. A non-transitory machine readable storage medium on which is stored machine readable instructions that when executed by a controller, cause the controller to:
detect that a plurality of pins of a the processing device are in electrical communication with the plurality of contacts;
identify information regarding the processing device;
determine a pinout profile of the processing device from the identified information of the processing device;
program, based upon the determined pinout profile, properties of one or both of: the plurality of contacts to match the pinout profile of the processing device; and
the plurality of pins to match a pinout profile of the plurality of contacts in the receiving apparatus.
15. The non-transitory machine readable storage medium according to claim 14, wherein the machine readable instructions are further to cause the controller to:
access a table that includes entries of a plurality of pinout profiles for a plurality of different processing devices, wherein the entries are searchable based upon respective information regarding the plurality of different processing devices;
identify the entry in the table pertaining to the identified information regarding the processing device;
identify the pinout profile listed in the identified entry in the table; and determine the pinout profile of the plurality of pins of the processing device to be the identified pinout profile.
PCT/US2015/044315 2015-08-07 2015-08-07 Processing device operation enablement WO2017026997A1 (en)

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US20080143379A1 (en) * 2006-12-15 2008-06-19 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
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