Large, complex SoCs comprise interconnections of various functional blocks, which blocks frequently running on different clock domains. By effectively controlling the clocks within the SoC, this invention provides a means to halt execution of a SoC and to then single or n-cycle step its execution in...http://www.google.fr/patents/US7055117?utm_source=gb-gplus-shareBrevet US7055117 - System and method for debugging system-on-chips using single or n-cycle stepping
System and method for debugging system-on-chips using single or n-cycle stepping
