A non-volatile memory device has an array of memory cells arranged in rows and columns. The memory cells can be externally accessed for programming, erasing and reading operations. Test rows of memory cells are provided in the array to allow for memory cell disturb conditions. The test rows are not externally...http://www.google.fr/patents/US7248515?utm_source=gb-gplus-shareBrevet US7248515 - Non-volatile memory with test rows for disturb detection
Non-volatile memory with test rows for disturb detection
