An integrated circuit first-in, first-out ("FIFO") memory device comprises an input bus for receiving data, an input buffer coupled to the input bus for storing the data and at least one dynamic random access memory ("DRAM") array coupled to the input buffer. A write pointer is operative for storing...http://www.google.fr/patents/US5901100?utm_source=gb-gplus-shareBrevet US5901100 - First-in, first-out integrated circuit memory device utilizing a dynamic random access memory array for data storage implemented in conjunction with an associated static random access memory cache
First-in, first-out integrated circuit memory device utilizing a dynamic ...
