The present invention discloses a processor system comprising a processor (31) and at least a first memory (32) and a second memory (34, 36, 37). The first memory (32) is normally faster than the second one, and means for memory allocation (38, 41, 48) perform the periodically static allocation of data...http://www.google.fr/patents/US20010021959?utm_source=gb-gplus-shareBrevet US20010021959 - Static cache
Numéro de demande: 09/784,070 Numéro de publication: US 2001/0021959 A1 Date de dépôt: 16 févr. 2001 Brevet délivré: US6865736 ( Date de délivrance 8 mars 2005)
