A device which reduces jitter and narrows the frequency spectrum of a jitter-ridden clock signal includes a basic unit having a plurality of series connected delay elements outputs from each delay element are all connected to an AND/NAND gate. A front end of the device locates missing clock pulses and...http://www.google.fr/patents/US6246276?utm_source=gb-gplus-shareBrevet US6246276 - Clock signal cleaning circuit
