A method for comprehensively testing embedded RAM devices and a means for detecting if any of the cells within the embedded RAM devices have a slow write recovery time. The preferred mode of the present invention utilizes built-in self-test (BIST) techniques for testing the embedded RAM's within a VLSI...http://www.google.fr/patents/US5471482?utm_source=gb-gplus-shareBrevet US5471482 - VLSI embedded RAM test
