Method and apparatus for implementing a task-based interface in a logic verification system is described. In some examples, a task server and a context memory are implemented in a hardware accelerator for a task. The task server is configured for communication with the logic design. A task stub configured...http://www.google.fr/patents/US20100083289?utm_source=gb-gplus-shareBrevet US20100083289 - Method and Apparatus for Implementing a Task-Based Interface in a Logic Verification System
Method and Apparatus for Implementing a Task-Based Interface in a Logic ...
Numéro de demande: 12/239,706 Numéro de publication: US 2010/0083289 A1 Date de dépôt: 26 sept. 2008 Brevet délivré: US8161502 ( Date de délivrance 17 avr. 2012)
