A manufacturing method for stacked, non-volatile memory device provides a plurality of bitline layers and wordline layers with charge trapping structures. The bitline layers have a plurality of bitlines formed on an insulating layer, such as silicon on insulator technologies. The wordline layers are...http://www.google.fr/patents/US7473589?utm_source=gb-gplus-shareBrevet US7473589 - Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same
Stacked thin film transistor, non-volatile memory devices and methods for ...
