In a method of fabricating a semiconductor device, a dielectric layer is formed over a conductive region. A dual damascene structure including a trench and a via is formed within the dielectric layer. A liner is formed over the dual damascene structure. The liner is selectively removed from above the...http://www.google.fr/patents/US7332428?utm_source=gb-gplus-shareBrevet US7332428 - Metal interconnect structure and method
