A pair of caches having a dependency checking structure for accesses between them is provided. One of the pair of caches is accessed from the decode stage of the instruction processing pipeline, while the other is accessed from the execute stage. The dependency checking structure monitors...http://www.google.fr/patents/US5787474?utm_source=gb-gplus-shareBrevet US5787474 - Dependency checking structure for a pair of caches which are accessed from different pipeline stages of an instruction processing pipeline
Dependency checking structure for a pair of caches which are accessed from ...
