The objective of this invention is to reduce the layout area while guaranteeing data retention stability in a static type semiconductor memory cell. This SRAM cell is constituted with two MOS transistors 10 and 12 and one inverter circuit 14. The source terminal of PMOS transistor 10 is connected to...http://www.google.fr/patents/US6373745?utm_source=gb-gplus-shareBrevet US6373745 - Semiconductor memory cell and semiconductor memory device
Semiconductor memory cell and semiconductor memory device
