A method of erasing a chalcogenide variable resistance memory cell is provided. The chalcogenide variable resistance memory cell includes a p-doped substrate with an n-well and a chalcogenide variable resistance memory element. The method includes the step of applying to the variable resistance memory...http://www.google.fr/patents/US7643333?utm_source=gb-gplus-shareBrevet US7643333 - Process for erasing chalcogenide variable resistance memory bits
Process for erasing chalcogenide variable resistance memory bits
