An instruction fetch and issuance unit (200) fetches two instruction words and issues at least one instruction word to an instruction decoder (250) per clock cycle. Two multiplexers (220, 230) receive the two fetched instructions and one or both of two of three words stored in an instruction...http://www.google.fr/patents/US5835746?utm_source=gb-gplus-shareBrevet US5835746 - Method and apparatus for fetching and issuing dual-word or multiple instructions in a data processing system
Method and apparatus for fetching and issuing dual-word or multiple ...
