A semiconductor memory device includes an erase line, a common line, and a first transistor coupled between the conductive line and the common line. The memory device includes a plurality of memory cells and bit lines, each memory cell including a program line, a memory transistor, and a tunneling capacitor...http://www.google.fr/patents/US6295226?utm_source=gb-gplus-shareBrevet US6295226 - Memory device having enhanced programming and/or erase characteristics
Memory device having enhanced programming and/or erase characteristics
